Hi Martin, can you send me the assembly? Or show me the opcodes? When I try this it doesn't work. So I must be doing something differently. and Hi! Robert Hirschfeld mentioned you when he and I met last week.
On Wed, Jan 21, 2009 at 11:06 AM, Martin Beck < martin.beck@hpi.uni-potsdam.de> wrote:
Hi Eliot,
Eliot Miranda wrote:
Hi All, anyone know the x86/IA32 really well? If so, read on. Otherwise
save
yourself the yawn.
[...]
(my emphasis added). But neither the Bochs simulator nor my Intel Core
Duo
set the flags when doing sarl $1, %eax when %eax contains -1. Have I misread, or is the manual wrong?
I cannot confirm this. Using this simple C-Program:
int calc(int i) { return i >> 1; }
int main() { printf("%i\n", calc(-1)); }
my GCC 4.3.2 generates a sarl %eax instruction as the assembler output shows. Debugging it with Kdbg shows a change of the flags after the instruction. In fact, CF and SF are set as (more or less) expected. I also have a Intel Core 2 Duo.
Regards, Martin