Dear all,
After seven month, I got the SqueakTrunkOnSpur job on jenkins back going
so that we can see it is working before the release.
Sadly, it is not:
http://build.squeak.org/job/SqueakTrunkOnSpur/604/console
(Some excerpts at the end)
Can someone more knowledgeable than me please investigate?
Best regards
-Tobias
[the end]
Recursive not understood error encountered
/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/lib/squeak/5.0-3386/squeak
Squeak VM version: 5.0-3386 Sat Jun 20 16:31:47 PDT 2015 gcc 4.4.7 [Production Spur VM]
Built from: CoInterpreter VMMaker.oscog-eem.1370 uuid: 779d3751-cd1b-4882-b870-156bf7da752a Jun 20 2015
With: StackToRegisterMappingCogit VMMaker.oscog-eem.1367 uuid: 5d5685bb-29fe-4d36-8ff2-df498dd8cc47 Jun 20 2015
Revision: VM: r3386
http://www.squeakvm.org/svn/squeak/branches/Cog
Date: 2015-06-20 15:42:13 -0700
Plugins: r3347
http://squeakvm.org/svn/squeak/trunk/platforms/Cross/plugins
Build host: Linux mclinux32 2.6.32-431.el6.i686 #1 SMP Fri Nov 22 00:26:36 UTC 2013 i686 i686 i386 GNU/Linux
plugin path: /tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386 [default: /tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/lib/squeak/5.0-3386/]
C stack backtrace & registers:
*/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386/squeak[0x805f1be]
/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386/squeak(error+0x19)[0x805f379]
/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386/squeak[0x809ab91]
/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386/squeak(ceSendFromInLineCacheMiss+0x179)[0x809adf9]
[0x82e794f]
/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386/squeak(interpret+0x86e)[0x809cdce]
/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386/squeak(main+0x2b4)[0x805fa94]
/lib/i686/nosegneg/libc.so.6(__libc_start_main+0xe6)[0xb75f6cb6]
/tmp/d20150624-22621-1fd1bqj/cogspur.r3386/cogspurlinuxht/bin/../lib/squeak/5.0-3386/squeak[0x805c691]
[0x0]
Smalltalk stack dump:
0xbf9d21e4 M ImageSegment>restoreEndianness 0x85b4730: a(n) ImageSegment
0xbf9d221c I ImageSegment>comeFullyUpOnReload: 0x85b4730: a(n) ImageSegment
0xbf9d2250 M SmartRefStream(DataStream)>next 0x851cec8: a(n) SmartRefStream
0xbf9d227c M SmartRefStream(ReferenceStream)>next 0x851cec8: a(n) SmartRefStream
0xbf9d22a8 I SmartRefStream>next 0x851cec8: a(n) SmartRefStream
0xbf9d22c8 I SmartRefStream>scanFrom: 0x851cec8: a(n) SmartRefStream
0xbf9d22f8 I ObjectScanner>scanFrom: 0x851b528: a(n) ObjectScanner
0xbf9d231c M [] in MultiByteFileStream(PositionableStream)>fileInAnnouncing: 0x83105f0: a(n) MultiByteFileStream
0xbf9d2338 M BlockClosure>on:do: 0x8517140: a(n) BlockClosure
0xbf9d2364 I [] in MultiByteFileStream(PositionableStream)>fileInAnnouncing: 0x83105f0: a(n) MultiByteFileStream
0xbf9d238c M [] in MorphicUIManager>displayProgress:at:from:to:during: 0x9d23bb8: a(n) MorphicUIManager
0xbf9d23a8 M BlockClosure>on:do: 0x83111d8: a(n) BlockClosure
0xbf9d23d4 M [] in MorphicUIManager>displayProgress:at:from:to:during: 0x9d23bb8: a(n) MorphicUIManager
0xbf9d23f4 M BlockClosure>ensure: 0x8311270: a(n) BlockClosure
0xbf9d2418 M MorphicUIManager>displayProgress:at:from:to:during: 0x9d23bb8: a(n) MorphicUIManager
0xbf9d2444 M ProgressInitiationException>defaultResumeValue 0x8310418: a(n) ProgressInitiationException
0xbf9d2460 M ProgressInitiationException(Exception)>resume 0x8310418: a(n) ProgressInitiationException
0xbf96d108 M ProgressInitiationException>defaultAction 0x8310418: a(n) ProgressInitiationException
0xbf96d124 M UndefinedObject>handleSignal: 0x8975b00: a(n) UndefinedObject
0xbf96d148 M MethodContext(ContextPart)>handleSignal: 0xaddc2b8: a(n) MethodContext
0xbf96d16c M MethodContext(ContextPart)>handleSignal: 0xadd7028: a(n) MethodContext
0xbf96d190 M MethodContext(ContextPart)>handleSignal: 0x8310058: a(n) MethodContext
0xbf96d1b4 M MethodContext(ContextPart)>handleSignal: 0x83104a8: a(n) MethodContext
Hi Carl,
On Jun 23, 2015, at 7:33 AM, Carl Gundel <basicforge(a)gmail.com> wrote:
> Hey Eliot!
>
> Does this VM allow Newspeak to run on the Raspberry Pi?
The Newspeak and Squeak VMs are different so no. I can include a Newspeak VM fir the pi if people want it, especially since u just got a pi 2, which I'm told is much faster. So how much demand is there? Rob, you want it [but there's nothing to stop you building your own ;)]. Who else?
>
> -Carl
>
> On Saturday, June 20, 2015 at 9:26:18 PM UTC-4, Eliot wrote:
>> ... at http://www.mirandabanda.org/files/Cog/VM/VM.r3386
>>
>> CogVM binaries as per VMMaker.oscog-eem.1370/r3386
>>
>> Add the ARMv5/ARMv6 Cog Spur JIT VM!
>>
>> Add explicit read barriers to primitives which access an argument as the
>> receiver (i.e. the mirror primitives). Don't check if the actual receiver is
>> used. Simplify failure where appropriate cuz the primitives will be retried.
>>
>> Add -fwrapv to all linux gcc builds (to insist on 2's complement arithmetic)
>> and add makeallclean, making makeall do the dirty build.
>>
>> Provide a -exitonwarn command line switch for the Mac and Unix VMs to allow for
>> CI testing of asserts.
>>
>> Unix: restore the SCCS revision after the version number in -version output.
>>
>> Spur:
>> Remember to count shrink requests
>>
>> Cogit:
>> Fix bug in rewriting compiler primitives on module unload, etc. The old code
>> didn't change the assignment to the primitiveFunctionPointer, which is needed
>> for correct management of failing primitive calls on Spur. Simplify the post
>> compile hook to eliminate the label parameter; this is local to the Cogit.
>>
>> ARM Cogit:
>> Use out-of-line literals for compactness.
>> --
>> best,
>> Eliot
Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1374.mcz
==================== Summary ====================
Name: VMMaker.oscog-cb.1374
Author: cb
Time: 22 June 2015, 5:34:35.858 pm
UUID: 888aa558-5941-4f00-9d4d-bb9dbedd1c3a
Ancestors: VMMaker.oscog-cb.1373
Interesting register hack to avoid 1 move instruction in #== with forwarders.
=============== Diff against VMMaker.oscog-cb.1373 ===============
Item was changed:
----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorEqualsEqualsWithForwarders (in category 'bytecode generators') -----
genSpecialSelectorEqualsEqualsWithForwarders
"Override to count inlined branches if followed by a conditional branch.
We borrow the following conditional branch's counter and when about to
inline the comparison we decrement the counter (without writing it back)
and if it trips simply abort the inlining, falling back to the normal send which
will then continue to the conditional branch which will trip and enter the abort."
+ | nextPC postBranchPC targetBytecodePC branchDescriptor counterReg fixup jumpEqual jumpNotEqual
- | nextPC postBranchPC targetBytecodePC branchDescriptor counterReg fixup resultReg jumpEqual jumpNotEqual
counterAddress countTripped unforwardArg unforwardRcvr argReg rcvrReg regMask |
<var: #fixup type: #'BytecodeFixup *'>
<var: #countTripped type: #'AbstractInstruction *'>
<var: #label type: #'AbstractInstruction *'>
<var: #branchDescriptor type: #'BytecodeDescriptor *'>
<var: #jumpEqual type: #'AbstractInstruction *'>
<var: #jumpNotEqual type: #'AbstractInstruction *'>
((coInterpreter isOptimizedMethod: methodObj) or: [needsFrame not]) ifTrue: [ ^ self genSpecialSelectorEqualsEqualsWithForwardersWithoutCounters ].
regMask := 0.
self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target |
branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ].
unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not.
unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not.
"If an operand is an annotable constant, it may be forwarded, so we need to store it into a
register so the forwarder check can jump back to the comparison after unforwarding the constant.
However, if one of the operand is an unnanotable constant, does not allocate a register for it
(machine code will use operations on constants)."
self
allocateEqualsEqualsRegistersArgNeedsReg: unforwardArg
rcvrNeedsReg: unforwardRcvr
into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ].
argReg ifNotNil: [ regMask := self registerMaskFor: argReg ].
rcvrReg ifNotNil: [ regMask := regMask bitOr: (self registerMaskFor: rcvrReg) ].
"Only interested in inlining if followed by a conditional branch."
(branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse:
[^ self genEqualsEqualsNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg].
unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg ].
unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg ].
counterReg := self allocateRegNotConflictingWith: regMask.
self
genExecutionCountLogicInto: [ :cAddress :countTripBranch |
counterAddress := cAddress.
countTripped := countTripBranch ]
counterReg: counterReg.
self assert: (unforwardArg or: [ unforwardRcvr ]).
"If branching the stack must be flushed for the merge"
self ssFlushTo: simStackPtr - 2.
self genEqualsEqualsComparisonArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg.
self ssPop: 2.
branchDescriptor isBranchTrue
ifTrue:
[ fixup := self ensureNonMergeFixupAt: postBranchPC - initialPC.
self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC - initialPC) asUnsignedInteger. ]
ifFalse:
[ fixup := self ensureNonMergeFixupAt: targetBytecodePC - initialPC.
self JumpZero: (self ensureNonMergeFixupAt: postBranchPC - initialPC) asUnsignedInteger. ].
self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress.
self Jump: fixup.
countTripped jmpTarget: self Label.
"inlined version of #== ignoring the branchDescriptor if the counter trips to have normal state for the optimizer"
self ssPop: -2.
self genEqualsEqualsComparisonArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg.
self ssPop: 2.
+
+ "This code necessarily directly falls through the jumpIf: code which pops the top of the stack into TempReg.
+ We therefore directly assign the result to TempReg to save one move instruction"
-
- resultReg := rcvrReg ifNil: [ argReg ].
jumpEqual := self JumpZero: 0.
+ self genMoveFalseR: TempReg.
- self genMoveFalseR: resultReg.
jumpNotEqual := self Jump: 0.
+ jumpEqual jmpTarget: (self genMoveTrueR: TempReg).
- jumpEqual jmpTarget: (self genMoveTrueR: resultReg).
jumpNotEqual jmpTarget: self Label.
+ self ssPushRegister: TempReg.
- self ssPushRegister: resultReg.
(self fixupAt: nextPC - initialPC) targetInstruction = 0 ifTrue: [ branchReachedOnlyForCounterTrip := true ].
^ 0!
Eliot Miranda uploaded a new version of VMMaker to project VM Maker:
http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1373.mcz
==================== Summary ====================
Name: VMMaker.oscog-cb.1373
Author: cb
Time: 22 June 2015, 4:20:40.643 pm
UUID: 4994d85f-07d9-481a-8ab9-68ccfd589507
Ancestors: VMMaker.oscog-rmacnak.1372
slighlty change the code generation of #== in sista Jit to decrease the estimate size of abstract opcodes. We now need 11 in the sista Jit instead of 10 in the regular jit due to the counter logic, but it remains reasonable on the contrary to the previous value of 14.
=============== Diff against VMMaker.oscog-rmacnak.1372 ===============
Item was changed:
----- Method: SistaStackToRegisterMappingCogit>>estimateOfAbstractOpcodesPerBytecodes (in category 'accessing') -----
estimateOfAbstractOpcodesPerBytecodes
"Due to the counter logic, the estimation is higher"
<inline: true>
+ ^ 11!
- self flag: 'we could fix that when #== generates less instructions'.
- ^ 14!
Item was changed:
----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorEqualsEqualsWithForwarders (in category 'bytecode generators') -----
genSpecialSelectorEqualsEqualsWithForwarders
"Override to count inlined branches if followed by a conditional branch.
We borrow the following conditional branch's counter and when about to
inline the comparison we decrement the counter (without writing it back)
and if it trips simply abort the inlining, falling back to the normal send which
will then continue to the conditional branch which will trip and enter the abort."
+ | nextPC postBranchPC targetBytecodePC branchDescriptor counterReg fixup resultReg jumpEqual jumpNotEqual
- | nextPC postBranchPC targetBytecodePC branchDescriptor label counterReg fixup
counterAddress countTripped unforwardArg unforwardRcvr argReg rcvrReg regMask |
<var: #fixup type: #'BytecodeFixup *'>
<var: #countTripped type: #'AbstractInstruction *'>
<var: #label type: #'AbstractInstruction *'>
<var: #branchDescriptor type: #'BytecodeDescriptor *'>
+ <var: #jumpEqual type: #'AbstractInstruction *'>
+ <var: #jumpNotEqual type: #'AbstractInstruction *'>
((coInterpreter isOptimizedMethod: methodObj) or: [needsFrame not]) ifTrue: [ ^ self genSpecialSelectorEqualsEqualsWithForwardersWithoutCounters ].
regMask := 0.
self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target |
branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ].
unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not.
unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not.
"If an operand is an annotable constant, it may be forwarded, so we need to store it into a
register so the forwarder check can jump back to the comparison after unforwarding the constant.
However, if one of the operand is an unnanotable constant, does not allocate a register for it
(machine code will use operations on constants)."
self
allocateEqualsEqualsRegistersArgNeedsReg: unforwardArg
rcvrNeedsReg: unforwardRcvr
into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ].
argReg ifNotNil: [ regMask := self registerMaskFor: argReg ].
rcvrReg ifNotNil: [ regMask := regMask bitOr: (self registerMaskFor: rcvrReg) ].
"Only interested in inlining if followed by a conditional branch."
(branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse:
[^ self genEqualsEqualsNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg].
+ unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg ].
+ unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg ].
+
counterReg := self allocateRegNotConflictingWith: regMask.
self
genExecutionCountLogicInto: [ :cAddress :countTripBranch |
counterAddress := cAddress.
countTripped := countTripBranch ]
counterReg: counterReg.
self assert: (unforwardArg or: [ unforwardRcvr ]).
"If branching the stack must be flushed for the merge"
self ssFlushTo: simStackPtr - 2.
- label := self Label.
-
self genEqualsEqualsComparisonArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg.
+ self ssPop: 2.
+
- self ssPop: 2. "pop by 2 temporarily for the fixups"
branchDescriptor isBranchTrue
ifTrue:
[ fixup := self ensureNonMergeFixupAt: postBranchPC - initialPC.
self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC - initialPC) asUnsignedInteger. ]
ifFalse:
[ fixup := self ensureNonMergeFixupAt: targetBytecodePC - initialPC.
self JumpZero: (self ensureNonMergeFixupAt: postBranchPC - initialPC) asUnsignedInteger. ].
- unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ].
- unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg jumpBackTo: label ].
- self ssPop: -2.
self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress.
self Jump: fixup.
+
countTripped jmpTarget: self Label.
"inlined version of #== ignoring the branchDescriptor if the counter trips to have normal state for the optimizer"
+ self ssPop: -2.
+ self genEqualsEqualsComparisonArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg.
+ self ssPop: 2.
+
+ resultReg := rcvrReg ifNil: [ argReg ].
+ jumpEqual := self JumpZero: 0.
+ self genMoveFalseR: resultReg.
+ jumpNotEqual := self Jump: 0.
+ jumpEqual jmpTarget: (self genMoveTrueR: resultReg).
+ jumpNotEqual jmpTarget: self Label.
+ self ssPushRegister: resultReg.
- self genEqualsEqualsNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg.
(self fixupAt: nextPC - initialPC) targetInstruction = 0 ifTrue: [ branchReachedOnlyForCounterTrip := true ].
^ 0!