Vm-dev March 2016

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VM Maker: VMMaker.oscog-cb.1750.mcz
by commits＠source.squeak.org 30 Mar '16

30 Mar '16

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1750.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1750 Author: cb Time: 30 March 2016, 4:45:49.478 pm UUID: f3fb15a8-3341-47eb-899d-eac3ca8696f3 Ancestors: VMMaker.oscog-cb.1749 fixed a missing option which was triggering compilation warnings. =============== Diff against VMMaker.oscog-cb.1749 =============== Item was changed: ----- Method: CogObjectRepresentationForSpur>>genStoreTrampolineCalled: (in category 'initialization') ----- genStoreTrampolineCalled: trampolineName "This can be entered in one of two states, depending on TempReg. TempReg = 0 => store check TempReg > 0 => immutability failure TempReg holds index + 1 in this case as the value 0 is reserved for store checks. In addition the 0 value is convenient to save one instruction for store checks." | jumpSC | + <option: #IMMUTABILITY> <var: #trampolineName type: #'char *'> <var: #jumpSC type: #'AbstractInstruction *'> <inline: false> cogit zeroOpcodeIndex. cogit CmpCq: 0 R: TempReg. jumpSC := cogit JumpZero: 0. "CannotAssignTo:, we restore the index." cogit SubCq: 1 R: TempReg. cogit compileTrampolineFor: #ceCannotAssignTo:withIndex:valueToAssign: numArgs: 3 arg: ReceiverResultReg arg: TempReg arg: ClassReg arg: nil regsToSave: cogit emptyRegisterMask pushLinkReg: true resultReg: NoReg. "Store check" jumpSC jmpTarget: cogit Label. ^ cogit genTrampolineFor: #remember: called: trampolineName numArgs: 1 arg: ReceiverResultReg arg: nil arg: nil arg: nil regsToSave: cogit emptyRegisterMask pushLinkReg: true resultReg: NoReg appendOpcodes: true!

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VM Maker: VMMaker.oscog-cb.1749.mcz
by commits＠source.squeak.org 30 Mar '16

30 Mar '16

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1749.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1749 Author: cb Time: 30 March 2016, 4:38:46.991 pm UUID: 934efe61-338b-40ad-999c-a1c9bd594736 Ancestors: VMMaker.oscog-cb.1748 fixed a type zip. =============== Diff against VMMaker.oscog-cb.1748 =============== Item was changed: ----- Method: CogObjectRepresentationForSpur>>genStoreWithImmutabilityButNoStoreCheckSourceReg:slotIndex:destReg:scratchReg:needRestoreRcvr: (in category 'compile abstract instructions') ----- genStoreWithImmutabilityButNoStoreCheckSourceReg: sourceReg slotIndex: index destReg: destReg scratchReg: scratchReg needRestoreRcvr: needRestoreRcvr + <var: #mutableJump type: #'AbstractInstruction *'> - <var: #immutableJump type: #'AbstractInstruction *'> <var: #immutabilityFailure type: #'AbstractInstruction *'> | immutabilityFailure mutableJump | "imm check has its own trampoline" mutableJump := self genJumpMutable: destReg scratchReg: scratchReg. cogit MoveCq: index + 1 R: TempReg. "index + 1 as 0 is reserved for store checks" cogit CallRT: ceStoreTrampoline. cogit annotateBytecode: cogit Label. needRestoreRcvr ifTrue: [ cogit putSelfInReceiverResultReg ]. immutabilityFailure := cogit Jump: 0. mutableJump jmpTarget: cogit Label. cogit genTraceStores. "do the store" cogit MoveR: sourceReg Mw: index * objectMemory wordSize + objectMemory baseHeaderSize r: destReg. immutabilityFailure jmpTarget: cogit Label. ^ 0!

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VM Maker: VMMaker.oscog-cb.1748.mcz
by commits＠source.squeak.org 30 Mar '16

30 Mar '16

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1748.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1748 Author: cb Time: 30 March 2016, 3:52:01.732 pm UUID: db420bcd-e4aa-4cad-9543-047274e49915 Ancestors: VMMaker.oscog-nice.1747 Reworked machine code generation of immutability so for common stores it uses a single trampoline for both store checks and immutability checks. I have simulation bug due to large integers, so I am not entirely sure everything is working, but generated code looks good. =============== Diff against VMMaker.oscog-nice.1747 =============== Item was changed: ----- Method: CogObjectRepresentation>>genStoreSourceReg:slotIndex:destReg:scratchReg:inFrame: (in category 'compile abstract instructions') ----- genStoreSourceReg: sourceReg slotIndex: index destReg: destReg scratchReg: scratchReg inFrame: inFrame + <inline: true> + self + cppIf: IMMUTABILITY + ifTrue: + [ ^ self + genStoreWithImmutabilityCheckSourceReg: sourceReg + slotIndex: index + destReg: destReg + scratchReg: scratchReg + needsStoreCheck: true + needRestoreRcvr: false "RcvrResultReg doesn't need to be live across the instructions" ] + ifFalse: + [ ^ self + genStoreSourceReg: sourceReg + slotIndex: index + destReg: destReg + scratchReg: scratchReg + inFrame: inFrame + needsStoreCheck: true ]! - ^ self - genStoreSourceReg: sourceReg - slotIndex: index - destReg: destReg - scratchReg: scratchReg - inFrame: inFrame - needsStoreCheck: true! Item was changed: CogObjectRepresentation subclass: #CogObjectRepresentationForSpur + instanceVariableNames: 'ceScheduleScavengeTrampoline ceSmallActiveContextInMethodTrampoline ceSmallActiveContextInBlockTrampoline ceLargeActiveContextInMethodTrampoline ceLargeActiveContextInBlockTrampoline ceStoreCheckContextReceiverTrampoline ceStoreTrampoline' - instanceVariableNames: 'ceScheduleScavengeTrampoline ceSmallActiveContextInMethodTrampoline ceSmallActiveContextInBlockTrampoline ceLargeActiveContextInMethodTrampoline ceLargeActiveContextInBlockTrampoline ceStoreCheckContextReceiverTrampoline ceCannotAssignToWithIndexTrampoline' classVariableNames: '' poolDictionaries: 'VMBytecodeConstants VMSqueakClassIndices' category: 'VMMaker-JIT'! Item was removed: - ----- Method: CogObjectRepresentationForSpur>>genImmutableCheck:slotIndex:sourceReg:scratchReg:needRestoreRcvr: (in category 'compile abstract instructions') ----- - genImmutableCheck: regHoldingObjectMutated slotIndex: index sourceReg: regHoldingValueToStore scratchReg: scratchReg needRestoreRcvr: needRestoreRcvr - | mutableJump fail | - <var: #mutableJump type: #'AbstractInstruction *'> - <var: #fail type: #'AbstractInstruction *'> - <inline: true> - <option: #IMMUTABILITY> - "Trampoline convention: - - objectMutated passed in ReceiverResultReg - - index (unboxed) passed in TempReg - - valueToStore passed in ClassReg. - Simulated stack is flushed, but if needRestoreRcvr is true - the receiver has to be live after this operation." - self assert: regHoldingObjectMutated == ReceiverResultReg. - self assert: scratchReg == TempReg. - self assert: regHoldingValueToStore == ClassReg. - mutableJump := self genJumpMutable: ReceiverResultReg scratchReg: TempReg. - - "We reach this code if the object mutated is immutable." - cogit MoveCq: index R: TempReg. - "trampoline call and mcpc to bcpc annotation." - cogit CallRT: ceCannotAssignToWithIndexTrampoline. - cogit annotateBytecode: cogit Label. - "restore ReceiverResultReg state if needed, the rest of the state is spilled" - needRestoreRcvr ifTrue: [ cogit putSelfInReceiverResultReg ]. - fail := cogit Jump: 0. - - "We reach this code is the object mutated is mutable" - mutableJump jmpTarget: cogit Label. - - ^ fail! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genJumpBaseHeaderImmutable: (in category 'compile abstract instructions') ----- genJumpBaseHeaderImmutable: baseHeaderReg "baseHeader holds at least the least significant 32 bits of the object" <returnTypeC: #'AbstractInstruction *'> <option: #IMMUTABILITY> + <inline: true> cogit TstCq: objectMemory immutableBitMask R: baseHeaderReg. ^ cogit JumpNonZero: 0! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genJumpBaseHeaderMutable: (in category 'compile abstract instructions') ----- genJumpBaseHeaderMutable: baseHeaderReg "baseHeader holds at least the least significant 32 bits of the object" <returnTypeC: #'AbstractInstruction *'> <option: #IMMUTABILITY> + <inline: true> cogit TstCq: objectMemory immutableBitMask R: baseHeaderReg. ^ cogit JumpZero: 0! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genJumpImmutable:scratchReg: (in category 'compile abstract instructions') ----- + genJumpImmutable: sourceReg scratchReg: scratchReg + <returnTypeC: #'AbstractInstruction *'> + <option: #IMMUTABILITY> + cogit MoveMw: 0 r: sourceReg R: scratchReg. + ^ self genJumpBaseHeaderImmutable: scratchReg! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genStoreSourceReg:slotIndex:destReg:scratchReg:inFrame:needsStoreCheck: (in category 'compile abstract instructions') ----- genStoreSourceReg: sourceReg slotIndex: index destReg: destReg scratchReg: scratchReg inFrame: inFrame needsStoreCheck: needsStoreCheck + + cogit genTraceStores. "do the store" cogit MoveR: sourceReg Mw: index * objectMemory wordSize + objectMemory baseHeaderSize r: destReg. "now the check. needStoreCheck is false if the JIT has figured out that the value stored does not need the check (immediate, nil, true, false)" needsStoreCheck ifTrue: [ ^ self genStoreCheckReceiverReg: destReg valueReg: sourceReg scratchReg: scratchReg inFrame: inFrame ]. ^ 0! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genStoreTrampolineCalled: (in category 'initialization') ----- + genStoreTrampolineCalled: trampolineName + "This can be entered in one of two states, depending on TempReg. + TempReg = 0 => store check + TempReg > 0 => immutability failure + TempReg holds index + 1 in this case as the value 0 is reserved for store checks. + In addition the 0 value is convenient to save one instruction for store checks." + | jumpSC | + <var: #trampolineName type: #'char *'> + <var: #jumpSC type: #'AbstractInstruction *'> + <inline: false> + cogit zeroOpcodeIndex. + cogit CmpCq: 0 R: TempReg. + jumpSC := cogit JumpZero: 0. + + "CannotAssignTo:, we restore the index." + cogit SubCq: 1 R: TempReg. + cogit + compileTrampolineFor: #ceCannotAssignTo:withIndex:valueToAssign: + numArgs: 3 + arg: ReceiverResultReg + arg: TempReg + arg: ClassReg + arg: nil + regsToSave: cogit emptyRegisterMask + pushLinkReg: true + resultReg: NoReg. + + "Store check" + jumpSC jmpTarget: cogit Label. + ^ cogit genTrampolineFor: #remember: + called: trampolineName + numArgs: 1 + arg: ReceiverResultReg + arg: nil + arg: nil + arg: nil + regsToSave: cogit emptyRegisterMask + pushLinkReg: true + resultReg: NoReg + appendOpcodes: true! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genStoreWithImmutabilityAndStoreCheckSourceReg:slotIndex:destReg:scratchReg:needRestoreRcvr: (in category 'compile abstract instructions') ----- + genStoreWithImmutabilityAndStoreCheckSourceReg: sourceReg slotIndex: index destReg: destReg scratchReg: scratchReg needRestoreRcvr: needRestoreRcvr + "Store check code is duplicated to use a single trampoline" + <var: #immutableJump type: #'AbstractInstruction *'> + <var: #trampJump type: #'AbstractInstruction *'> + <var: #jmpImmediate type: #'AbstractInstruction *'> + <var: #jmpDestYoung type: #'AbstractInstruction *'> + <var: #jmpSourceOld type: #'AbstractInstruction *'> + <var: #jmpAlreadyRemembered type: #'AbstractInstruction *'> + | immutableJump trampJump jmpImmediate jmpDestYoung jmpSourceOld rememberedBitByteOffset jmpAlreadyRemembered mask | + + immutableJump := self genJumpImmutable: destReg scratchReg: scratchReg. + + cogit genTraceStores. + + "do the store" + cogit MoveR: sourceReg + Mw: index * objectMemory wordSize + objectMemory baseHeaderSize + r: destReg. + + "store check" + jmpImmediate := self genJumpImmediate: sourceReg. + "Get the old/new boundary in scratchReg" + cogit MoveCw: objectMemory storeCheckBoundary R: scratchReg. + "Is target young? If so we're done" + cogit CmpR: scratchReg R: destReg. "N.B. FLAGS := destReg - scratchReg" + jmpDestYoung := cogit JumpBelow: 0. + "Is value stored old? If so we're done." + cogit CmpR: scratchReg R: sourceReg. "N.B. FLAGS := valueReg - scratchReg" + jmpSourceOld := cogit JumpAboveOrEqual: 0. + "value is young and target is old. + Need to remember this only if the remembered bit is not already set. + Test the remembered bit. Only need to fetch the byte containing it, + which reduces the size of the mask constant." + rememberedBitByteOffset := jmpSourceOld isBigEndian + ifTrue: [objectMemory baseHeaderSize - 1 - (objectMemory rememberedBitShift // 8)] + ifFalse:[objectMemory rememberedBitShift // 8]. + mask := 1 << (objectMemory rememberedBitShift \\ 8). + cogit MoveMb: rememberedBitByteOffset r: destReg R: scratchReg. + cogit AndCq: mask R: scratchReg. + jmpAlreadyRemembered := cogit JumpNonZero: 0. + "We know scratchReg now holds 0, this is convenient because the trampoline + convention expects 0 for store check in scratchReg. What a coincidence ;-)" + "Remembered bit is not set. Call store check to insert dest into remembered table." + trampJump := cogit Jump: 0. + "Here we reach the trampoline for Immutability failure" + immutableJump jmpTarget: (cogit MoveCq: index + 1 R: scratchReg). "index + 1 as 0 is reserved for store checks" + trampJump jmpTarget: (cogit CallRT: ceStoreTrampoline). + cogit annotateBytecode: cogit Label. + needRestoreRcvr ifTrue: [ cogit putSelfInReceiverResultReg ]. + + jmpImmediate jmpTarget: + (jmpDestYoung jmpTarget: + (jmpSourceOld jmpTarget: + (jmpAlreadyRemembered jmpTarget: + cogit Label))). + + ^ 0! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genStoreWithImmutabilityButNoStoreCheckSourceReg:slotIndex:destReg:scratchReg:needRestoreRcvr: (in category 'compile abstract instructions') ----- + genStoreWithImmutabilityButNoStoreCheckSourceReg: sourceReg slotIndex: index destReg: destReg scratchReg: scratchReg needRestoreRcvr: needRestoreRcvr + + <var: #immutableJump type: #'AbstractInstruction *'> + <var: #immutabilityFailure type: #'AbstractInstruction *'> + | immutabilityFailure mutableJump | + + "imm check has its own trampoline" + mutableJump := self genJumpMutable: destReg scratchReg: scratchReg. + cogit MoveCq: index + 1 R: TempReg. "index + 1 as 0 is reserved for store checks" + cogit CallRT: ceStoreTrampoline. + cogit annotateBytecode: cogit Label. + needRestoreRcvr ifTrue: [ cogit putSelfInReceiverResultReg ]. + immutabilityFailure := cogit Jump: 0. + mutableJump jmpTarget: cogit Label. + + cogit genTraceStores. + + "do the store" + cogit MoveR: sourceReg + Mw: index * objectMemory wordSize + objectMemory baseHeaderSize + r: destReg. + + immutabilityFailure jmpTarget: cogit Label. + + ^ 0! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genStoreWithImmutabilityCheckSourceReg:slotIndex:destReg:scratchReg:needsStoreCheck:needRestoreRcvr: (in category 'compile abstract instructions') ----- + genStoreWithImmutabilityCheckSourceReg: sourceReg slotIndex: index destReg: destReg scratchReg: scratchReg needsStoreCheck: needsStoreCheck needRestoreRcvr: needRestoreRcvr + "We know there is a frame as immutability check requires a frame" + "needRestoreRcvr has to be true to keep RcvrResultReg live with the receiver in it across the trampoline" + + "Trampoline convention..." + self assert: destReg == ReceiverResultReg. + self assert: scratchReg == TempReg. + self assert: sourceReg == ClassReg. + + needsStoreCheck + ifTrue: + [ self + genStoreWithImmutabilityAndStoreCheckSourceReg: sourceReg + slotIndex: index + destReg: destReg + scratchReg: scratchReg + needRestoreRcvr: needRestoreRcvr ] + ifFalse: + [ self + genStoreWithImmutabilityButNoStoreCheckSourceReg: sourceReg + slotIndex: index + destReg: destReg + scratchReg: scratchReg + needRestoreRcvr: needRestoreRcvr ]. + ^ 0! Item was changed: ----- Method: CogObjectRepresentationForSpur>>generateObjectRepresentationTrampolines (in category 'initialization') ----- generateObjectRepresentationTrampolines "Do the store check. Answer the argument for the benefit of the code generator; ReceiverResultReg may be caller-saved and hence smashed by this call. Answering it allows the code generator to reload ReceiverResultReg cheaply. In Spur the only thing we leave to the run-time is adding the receiver to the remembered set and setting its isRemembered bit." self cppIf: IMMUTABILITY + ifTrue: [ceStoreTrampoline := self genStoreTrampolineCalled: 'ceStoreTrampoline']. - ifTrue: "c.f. genImmutableCheck:slotIndex:sourceReg:scratchReg:popBoolean:needRestoreRcvr:" - [ceCannotAssignToWithIndexTrampoline := cogit - genTrampolineFor: #ceCannotAssignTo:withIndex:valueToAssign: - called: 'ceCannotAssignToWithIndexTrampoline' - arg: ReceiverResultReg - arg: TempReg - arg: ClassReg]. ceStoreCheckTrampoline := cogit genTrampolineFor: #remember: called: 'ceStoreCheckTrampoline' arg: ReceiverResultReg regsToSave: (cogit callerSavedRegMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) result: cogit returnRegForStoreCheck. ceStoreCheckContextReceiverTrampoline := self genStoreCheckContextReceiverTrampoline. ceScheduleScavengeTrampoline := cogit genTrampolineFor: #ceScheduleScavenge called: 'ceScheduleScavengeTrampoline' regsToSave: cogit callerSavedRegMask. ceSmallActiveContextInMethodTrampoline := self genActiveContextTrampolineLarge: false inBlock: false called: 'ceSmallMethodContext'. ceSmallActiveContextInBlockTrampoline := self genActiveContextTrampolineLarge: false inBlock: true called: 'ceSmallBlockContext'. ceLargeActiveContextInMethodTrampoline := self genActiveContextTrampolineLarge: true inBlock: false called: 'ceLargeMethodContext'. ceLargeActiveContextInBlockTrampoline := self genActiveContextTrampolineLarge: true inBlock: true called: 'ceLargeBlockContext'! Item was changed: ----- Method: CogObjectRepresentationForSqueakV3>>genStoreSourceReg:slotIndex:destReg:scratchReg:inFrame:needsStoreCheck: (in category 'compile abstract instructions') ----- genStoreSourceReg: sourceReg slotIndex: index destReg: destReg scratchReg: scratchReg inFrame: inFrame needsStoreCheck: needsStoreCheck | jmpImmediate jmpDestYoung jmpSourceOld jmpAlreadyRoot mask rootBitByteOffset | <var: #jmpImmediate type: #'AbstractInstruction *'> <var: #jmpDestYoung type: #'AbstractInstruction *'> <var: #jmpSourceOld type: #'AbstractInstruction *'> <var: #jmpAlreadyRoot type: #'AbstractInstruction *'> + + cogit genTraceStores. "do the store" cogit MoveR: sourceReg Mw: index * objectMemory wordSize + objectMemory baseHeaderSize r: destReg. "if no need for the store check then returns" needsStoreCheck ifFalse: [ ^ 0 ]. "now the check. Is value stored an integer? If so we're done" jmpImmediate := self genJumpImmediate: sourceReg. "Get the old/new boundary in scratchReg" cogit MoveAw: objectMemory youngStartAddress R: scratchReg. "Is target young? If so we're done" cogit CmpR: scratchReg R: destReg. "N.B. FLAGS := destReg - scratchReg" jmpDestYoung := cogit JumpAboveOrEqual: 0. "Is value stored old? If so we're done." cogit CmpR: scratchReg R: sourceReg. "N.B. FLAGS := sourceReg - scratchReg" jmpSourceOld := cogit JumpBelow: 0. "value is young and target is old. Need to make this a root if the root bit is not already set. Test the root bit. Only need to fetch the byte containing it, which reduces the size of the mask constant." rootBitByteOffset := jmpSourceOld isBigEndian ifTrue: [objectMemory wordSize - RootBitDigitLength] ifFalse:[RootBitDigitLength - 1]. mask := RootBitDigitLength > 1 ifTrue: [RootBit >> (RootBitDigitLength - 1 * 8)] ifFalse: [RootBit]. cogit MoveMb: rootBitByteOffset r: destReg R: scratchReg. cogit AndCq: mask R: scratchReg. jmpAlreadyRoot := cogit JumpNonZero: 0. "Root bit is not set. Call store check to insert dest into root table." self assert: destReg == ReceiverResultReg. cogit evaluateTrampolineCallBlock: [cogit CallRT: ceStoreCheckTrampoline] protectLinkRegIfNot: inFrame. jmpImmediate jmpTarget: (jmpDestYoung jmpTarget: (jmpSourceOld jmpTarget: (jmpAlreadyRoot jmpTarget: cogit Label))). ^0! Item was changed: ----- Method: SimpleStackBasedCogit>>genStorePop:LiteralVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean LiteralVariable: litVarIndex <inline: false> + | association | - | association immutabilityFailure | - <var: #immutabilityFailure type: #'AbstractInstruction *'> "The only reason we assert needsFrame here is that in a frameless method ReceiverResultReg must and does contain only self, but the ceStoreCheck trampoline expects the target of the store to be in ReceiverResultReg. So in a frameless method we would have a conflict between the receiver and the literal store, unless we we smart enough to realise that ReceiverResultReg was unused after the literal variable store, unlikely given that methods return self by default." self assert: needsFrame. association := self getLiteral: litVarIndex. self genMoveConstant: association R: ReceiverResultReg. objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. popBoolean ifTrue: [self PopR: ClassReg] ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. + self + genStoreSourceReg: ClassReg + slotIndex: ValueIndex + destReg: ReceiverResultReg + scratchReg: TempReg - traceStores > 0 ifTrue: - [self CallRT: ceTraceStoreTrampoline]. - self cppIf: IMMUTABILITY ifTrue: - [immutabilityFailure := objectRepresentation - genImmutableCheck: ReceiverResultReg - slotIndex: ValueIndex - sourceReg: ClassReg - scratchReg: TempReg - needRestoreRcvr: true]. - objectRepresentation - genStoreSourceReg: ClassReg - slotIndex: ValueIndex - destReg: ReceiverResultReg - scratchReg: TempReg inFrame: needsFrame. - - self cppIf: IMMUTABILITY ifTrue: - [immutabilityFailure jmpTarget: self Label]. - ^0! Item was changed: ----- Method: SimpleStackBasedCogit>>genStorePop:MaybeContextReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean MaybeContextReceiverVariable: slotIndex <inline: false> + | jmpSingle jmpDone | - | jmpSingle jmpDone immutabilityFailure | - <var: #immutabilityFailure type: #'AbstractInstruction *'> <var: #jmpSingle type: #'AbstractInstruction *'> <var: #jmpDone type: #'AbstractInstruction *'> "The reason we need a frame here is that assigning to an inst var of a context may involve wholesale reorganization of stack pages, and the only way to preserve the execution state of an activation in that case is if it has a frame." self assert: needsFrame. self putSelfInReceiverResultReg. objectRepresentation genLoadSlot: SenderIndex sourceReg: ReceiverResultReg destReg: TempReg. self MoveMw: 0 r: SPReg R: ClassReg. jmpSingle := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. self MoveCq: slotIndex R: SendNumArgsReg. self CallRT: ceStoreContextInstVarTrampoline. jmpDone := self Jump: 0. jmpSingle jmpTarget: self Label. - traceStores > 0 ifTrue: - [self CallRT: ceTraceStoreTrampoline]. - self cppIf: IMMUTABILITY ifTrue: - [immutabilityFailure := objectRepresentation - genImmutableCheck: ReceiverResultReg - slotIndex: slotIndex - sourceReg: ClassReg - scratchReg: TempReg - needRestoreRcvr: true]. - objectRepresentation - genStoreSourceReg: ClassReg - slotIndex: slotIndex - destReg: ReceiverResultReg - scratchReg: TempReg - inFrame: true. - jmpDone jmpTarget: self Label. popBoolean ifTrue: [self AddCq: objectMemory wordSize R: SPReg]. + self + genStoreSourceReg: ClassReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg + inFrame: needsFrame. + jmpDone jmpTarget: self Label. - self cppIf: IMMUTABILITY ifTrue: - [immutabilityFailure jmpTarget: self Label]. ^0! Item was changed: ----- Method: SimpleStackBasedCogit>>genStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean ReceiverVariable: slotIndex <inline: false> - | immutabilityFailure | - <var: #immutabilityFailure type: #'AbstractInstruction *'> needsFrame ifTrue: [self putSelfInReceiverResultReg]. popBoolean ifTrue: [self PopR: ClassReg] ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. + self + genStoreSourceReg: ClassReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg - traceStores > 0 ifTrue: - [self CallRT: ceTraceStoreTrampoline]. - self cppIf: IMMUTABILITY ifTrue: - [immutabilityFailure := objectRepresentation - genImmutableCheck: ReceiverResultReg - slotIndex: slotIndex - sourceReg: ClassReg - scratchReg: TempReg - needRestoreRcvr: true]. - objectRepresentation - genStoreSourceReg: ClassReg - slotIndex: slotIndex - destReg: ReceiverResultReg - scratchReg: TempReg inFrame: needsFrame. - - self cppIf: IMMUTABILITY ifTrue: - [immutabilityFailure jmpTarget: self Label]. - ^0! Item was changed: ----- Method: SimpleStackBasedCogit>>genStorePop:RemoteTemp:At: (in category 'bytecode generator support') ----- genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex <inline: false> "The only reason we assert needsFrame here is that in a frameless method ReceiverResultReg must and does contain only self, but the ceStoreCheck trampoline expects the target of the store to be in ReceiverResultReg. So in a frameless method we would have a conflict between the receiver and the temote temp store, unless we we smart enough to realise that ReceiverResultReg was unused after the literal variable store, unlikely given that methods return self by default." self assert: needsFrame. popBoolean ifTrue: [self PopR: ClassReg] ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. - traceStores > 0 ifTrue: - [self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: ClassReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was added: + ----- Method: SimpleStackBasedCogit>>genTraceStores (in category 'bytecode generator support') ----- + genTraceStores + <inline: true> + traceStores > 0 ifTrue: [ self CallRT: ceTraceStoreTrampoline ].! Item was added: + ----- Method: StackToRegisterMappingCogit>>genImmutabilityCheckStorePop:LiteralVariable: (in category 'bytecode generator support') ----- + genImmutabilityCheckStorePop: popBoolean LiteralVariable: litVarIndex + <inline: true> + | association needStoreCheck | + "The only reason we assert needsFrame here is that in a frameless method + ReceiverResultReg must and does contain only self, but the ceStoreCheck + trampoline expects the target of the store to be in ReceiverResultReg. So + in a frameless method we would have a conflict between the receiver and + the literal store, unless we we smart enough to realise that ReceiverResultReg + was unused after the literal variable store, unlikely given that methods + return self by default." + self assert: needsFrame. + "N.B. No need to check the stack for references because we generate code for + literal variable loads that stores the result in a register, deferring only the register push." + needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. + association := self getLiteral: litVarIndex. + optStatus isReceiverResultRegLive: false. + self ssAllocateRequiredReg: ReceiverResultReg. "for store trampoline call in genStoreSourceReg: has to be ReceiverResultReg" + self genMoveConstant: association R: ReceiverResultReg. + objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. + self ssAllocateRequiredReg: ClassReg. + self ssStoreAndReplacePop: popBoolean toReg: ClassReg. + self ssFlushTo: simStackPtr. + objectRepresentation + genStoreWithImmutabilityCheckSourceReg: ClassReg + slotIndex: ValueIndex + destReg: ReceiverResultReg + scratchReg: TempReg + needsStoreCheck: needStoreCheck + needRestoreRcvr: false. + ^ 0! Item was added: + ----- Method: StackToRegisterMappingCogit>>genImmutabilityCheckStorePop:MaybeContextReceiverVariable: (in category 'bytecode generator support') ----- + genImmutabilityCheckStorePop: popBoolean MaybeContextReceiverVariable: slotIndex + <inline: true> + | jmpSingle jmpDone needStoreCheck | + <var: #jmpSingle type: #'AbstractInstruction *'> + <var: #jmpDone type: #'AbstractInstruction *'> + "The reason we need a frame here is that assigning to an inst var of a context may + involve wholesale reorganization of stack pages, and the only way to preserve the + execution state of an activation in that case is if it has a frame." + self assert: needsFrame. + needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. + "Note that ReceiverResultReg remains live after both + ceStoreContextInstVarTrampoline and ceStoreCheckTrampoline." + self ensureReceiverResultRegContainsSelf. + self ssPop: 1. + self ssAllocateCallReg: ClassReg and: SendNumArgsReg. "for ceStoreContextInstVarTrampoline" + self ssPush: 1. + objectRepresentation + genLoadSlot: SenderIndex + sourceReg: ReceiverResultReg + destReg: TempReg. + self ssStoreAndReplacePop: popBoolean toReg: ClassReg. + "stack is flushed except maybe ssTop if popBoolean is false. + ssTop is a SSregister in this case due to #ssStoreAndReplacePop: + to avoid a second indirect read / annotation in case of SSConstant + or SSBaseRegister" + self ssFlushTo: simStackPtr. + jmpSingle := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. + self MoveCq: slotIndex R: SendNumArgsReg. + self CallRT: ceStoreContextInstVarTrampoline. + jmpDone := self Jump: 0. + jmpSingle jmpTarget: self Label. + objectRepresentation + genStoreWithImmutabilityCheckSourceReg: ClassReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg + needsStoreCheck: needStoreCheck + needRestoreRcvr: true. + jmpDone jmpTarget: self Label. + ^0! Item was added: + ----- Method: StackToRegisterMappingCogit>>genImmutabilityCheckStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- + genImmutabilityCheckStorePop: popBoolean ReceiverVariable: slotIndex + <inline: true> + | needStoreCheck | + self assert: needsFrame. + needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. + "Note that ReceiverResultReg remains live after the trampoline." + self ensureReceiverResultRegContainsSelf. + self ssAllocateRequiredReg: ClassReg. + self ssStoreAndReplacePop: popBoolean toReg: ClassReg. + self ssFlushTo: simStackPtr. + objectRepresentation + genStoreWithImmutabilityCheckSourceReg: ClassReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg + needsStoreCheck: needStoreCheck + needRestoreRcvr: true. + + ^ 0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:LiteralVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean LiteralVariable: litVarIndex <inline: false> - | topReg association needStoreCheck immutabilityFailure | - "The only reason we assert needsFrame here is that in a frameless method - ReceiverResultReg must and does contain only self, but the ceStoreCheck - trampoline expects the target of the store to be in ReceiverResultReg. So - in a frameless method we would have a conflict between the receiver and - the literal store, unless we we smart enough to realise that ReceiverResultReg - was unused after the literal variable store, unlikely given that methods - return self by default." - self assert: needsFrame. - self cppIf: IMMUTABILITY ifTrue: [ self ssFlushTo: simStackPtr - 1 ]. - "N.B. No need to check the stack for references because we generate code for - literal variable loads that stores the result in a register, deferring only the register push." - needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. - association := self getLiteral: litVarIndex. - optStatus isReceiverResultRegLive: false. - self ssAllocateRequiredReg: ReceiverResultReg. "for ceStoreCheck call in genStoreSourceReg: has to be ReceiverResultReg" - self genMoveConstant: association R: ReceiverResultReg. - objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. self cppIf: IMMUTABILITY + ifTrue: [ ^ self genImmutabilityCheckStorePop: popBoolean LiteralVariable: litVarIndex ] + ifFalse: [ ^ self genVanillaStorePop: popBoolean LiteralVariable: litVarIndex ] + ! - ifTrue: - [ self ssAllocateRequiredReg: ClassReg. - topReg := ClassReg. - self ssStoreAndReplacePop: popBoolean toReg: ClassReg. - "stack is flushed except maybe ssTop if popBoolean is false. - ssTop is a SSregister in this case due to #ssStoreAndReplacePop: - to avoid a second indirect read / annotation in case of SSConstant - or SSBaseRegister" - self ssFlushTo: simStackPtr. - immutabilityFailure := objectRepresentation - genImmutableCheck: ReceiverResultReg - slotIndex: ValueIndex - sourceReg: ClassReg - scratchReg: TempReg - needRestoreRcvr: false ] - ifFalse: - [ topReg := self allocateRegForStackEntryAt: 0 notConflictingWith: (self registerMaskFor: ReceiverResultReg). - self ssStorePop: popBoolean toReg: topReg ]. - traceStores > 0 ifTrue: - [self MoveR: topReg R: TempReg. - self CallRT: ceTraceStoreTrampoline]. - objectRepresentation - genStoreSourceReg: topReg - slotIndex: ValueIndex - destReg: ReceiverResultReg - scratchReg: TempReg - inFrame: needsFrame - needsStoreCheck: needStoreCheck. - self cppIf: IMMUTABILITY ifTrue: [ immutabilityFailure jmpTarget: self Label ]. - ^ 0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:MaybeContextReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean MaybeContextReceiverVariable: slotIndex <inline: false> - | jmpSingle jmpDone needStoreCheck immutabilityFailure | - <var: #jmpSingle type: #'AbstractInstruction *'> - <var: #jmpDone type: #'AbstractInstruction *'> - "The reason we need a frame here is that assigning to an inst var of a context may - involve wholesale reorganization of stack pages, and the only way to preserve the - execution state of an activation in that case is if it has a frame." - self assert: needsFrame. - self cppIf: IMMUTABILITY ifTrue: [ self ssFlushTo: simStackPtr - 1 ]. - self ssFlushUpThroughReceiverVariable: slotIndex. - needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. - "Note that ReceiverResultReg remains live after both - ceStoreContextInstVarTrampoline and ceStoreCheckTrampoline." - self ensureReceiverResultRegContainsSelf. - self ssPop: 1. - self ssAllocateCallReg: ClassReg and: SendNumArgsReg. "for ceStoreContextInstVarTrampoline" - self ssPush: 1. - objectRepresentation - genLoadSlot: SenderIndex - sourceReg: ReceiverResultReg - destReg: TempReg. self cppIf: IMMUTABILITY + ifTrue: [ ^ self genImmutabilityCheckStorePop: popBoolean MaybeContextReceiverVariable: slotIndex ] + ifFalse: [ ^ self genVanillaStorePop: popBoolean MaybeContextReceiverVariable: slotIndex ]! - ifTrue: - [ self ssStoreAndReplacePop: popBoolean toReg: ClassReg. - "stack is flushed except maybe ssTop if popBoolean is false. - ssTop is a SSregister in this case due to #ssStoreAndReplacePop: - to avoid a second indirect read / annotation in case of SSConstant - or SSBaseRegister" - self ssFlushTo: simStackPtr. ] - ifFalse: [ self ssStorePop: popBoolean toReg: ClassReg ]. - jmpSingle := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. - self MoveCq: slotIndex R: SendNumArgsReg. - self CallRT: ceStoreContextInstVarTrampoline. - jmpDone := self Jump: 0. - jmpSingle jmpTarget: self Label. - traceStores > 0 ifTrue: - [self MoveR: ClassReg R: TempReg. - self CallRT: ceTraceStoreTrampoline]. - self - cppIf: IMMUTABILITY - ifTrue: - [ immutabilityFailure := objectRepresentation - genImmutableCheck: ReceiverResultReg - slotIndex: ValueIndex - sourceReg: ClassReg - scratchReg: TempReg - needRestoreRcvr: true ]. - objectRepresentation - genStoreSourceReg: ClassReg - slotIndex: slotIndex - destReg: ReceiverResultReg - scratchReg: TempReg - inFrame: true - needsStoreCheck: needStoreCheck. - jmpDone jmpTarget: self Label. - self cppIf: IMMUTABILITY ifTrue: [ immutabilityFailure jmpTarget: self Label ]. - ^0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean ReceiverVariable: slotIndex <inline: false> - | topReg needStoreCheck immutabilityFailure | - self cppIf: IMMUTABILITY ifTrue: [ self assert: needsFrame. self ssFlushTo: simStackPtr - 1 ]. - self ssFlushUpThroughReceiverVariable: slotIndex. - needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. - "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." - self ensureReceiverResultRegContainsSelf. self cppIf: IMMUTABILITY + ifTrue: [ ^ self genImmutabilityCheckStorePop: popBoolean ReceiverVariable: slotIndex ] + ifFalse: [ ^ self genVanillaStorePop: popBoolean ReceiverVariable: slotIndex ] + ! - ifTrue: - [ self ssAllocateRequiredReg: ClassReg. - topReg := ClassReg. - self ssStoreAndReplacePop: popBoolean toReg: ClassReg. - "stack is flushed except maybe ssTop if popBoolean is false. - ssTop is a SSregister in this case due to #ssStoreAndReplacePop: - to avoid a second indirect read / annotation in case of SSConstant - or SSBaseRegister" - self ssFlushTo: simStackPtr. - immutabilityFailure := objectRepresentation - genImmutableCheck: ReceiverResultReg - slotIndex: slotIndex - sourceReg: ClassReg - scratchReg: TempReg - needRestoreRcvr: true ] - ifFalse: - [ topReg := self allocateRegForStackEntryAt: 0 notConflictingWith: (self registerMaskFor: ReceiverResultReg). - self ssStorePop: popBoolean toReg: topReg ]. - traceStores > 0 ifTrue: - [ self MoveR: topReg R: TempReg. - self evaluateTrampolineCallBlock: [ self CallRT: ceTraceStoreTrampoline ] protectLinkRegIfNot: needsFrame ]. - objectRepresentation - genStoreSourceReg: topReg - slotIndex: slotIndex - destReg: ReceiverResultReg - scratchReg: TempReg - inFrame: needsFrame - needsStoreCheck: needStoreCheck. - self cppIf: IMMUTABILITY ifTrue: [ immutabilityFailure jmpTarget: self Label ]. - ^ 0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:RemoteTemp:At: (in category 'bytecode generator support') ----- genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex <inline: false> | topReg needStoreCheck | "The only reason we assert needsFrame here is that in a frameless method ReceiverResultReg must and does contain only self, but the ceStoreCheck trampoline expects the target of the store to be in ReceiverResultReg. So in a frameless method we would have a conflict between the receiver and the temote temp store, unless we we smart enough to realise that ReceiverResultReg was unused after the literal variable store, unlikely given that methods return self by default." self assert: needsFrame. "N.B. No need to check the stack for references because we generate code for remote temp loads that stores the result in a register, deferring only the register push." needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. topReg := self allocateRegForStackEntryAt: 0 notConflictingWith: (self registerMaskFor: ReceiverResultReg). self ssAllocateRequiredReg: ReceiverResultReg. optStatus isReceiverResultRegLive: false. self ssStoreAndReplacePop: popBoolean toReg: topReg. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. - traceStores > 0 ifTrue: - [ self MoveR: topReg R: TempReg. - self CallRT: ceTraceStoreTrampoline. ]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame needsStoreCheck: needStoreCheck! Item was added: + ----- Method: StackToRegisterMappingCogit>>genTraceStores (in category 'bytecode generator support') ----- + genTraceStores + <inline: true> + traceStores > 0 ifTrue: + [ self MoveR: ClassReg R: TempReg. + self CallRT: ceTraceStoreTrampoline ].! Item was added: + ----- Method: StackToRegisterMappingCogit>>genVanillaStorePop:LiteralVariable: (in category 'bytecode generator support') ----- + genVanillaStorePop: popBoolean LiteralVariable: litVarIndex + <inline: true> + | topReg association needStoreCheck | + "The only reason we assert needsFrame here is that in a frameless method + ReceiverResultReg must and does contain only self, but the ceStoreCheck + trampoline expects the target of the store to be in ReceiverResultReg. So + in a frameless method we would have a conflict between the receiver and + the literal store, unless we we smart enough to realise that ReceiverResultReg + was unused after the literal variable store, unlikely given that methods + return self by default." + self assert: needsFrame. + "N.B. No need to check the stack for references because we generate code for + literal variable loads that stores the result in a register, deferring only the register push." + needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. + association := self getLiteral: litVarIndex. + optStatus isReceiverResultRegLive: false. + self ssAllocateRequiredReg: ReceiverResultReg. "for ceStoreCheck call in genStoreSourceReg: has to be ReceiverResultReg" + self genMoveConstant: association R: ReceiverResultReg. + objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. + topReg := self allocateRegForStackEntryAt: 0 notConflictingWith: (self registerMaskFor: ReceiverResultReg). + self ssStorePop: popBoolean toReg: topReg. + objectRepresentation + genStoreSourceReg: topReg + slotIndex: ValueIndex + destReg: ReceiverResultReg + scratchReg: TempReg + inFrame: needsFrame + needsStoreCheck: needStoreCheck. + ^ 0! Item was added: + ----- Method: StackToRegisterMappingCogit>>genVanillaStorePop:MaybeContextReceiverVariable: (in category 'bytecode generator support') ----- + genVanillaStorePop: popBoolean MaybeContextReceiverVariable: slotIndex + <inline: true> + | jmpSingle jmpDone needStoreCheck | + <var: #jmpSingle type: #'AbstractInstruction *'> + <var: #jmpDone type: #'AbstractInstruction *'> + "The reason we need a frame here is that assigning to an inst var of a context may + involve wholesale reorganization of stack pages, and the only way to preserve the + execution state of an activation in that case is if it has a frame." + self assert: needsFrame. + self ssFlushUpThroughReceiverVariable: slotIndex. + needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. + "Note that ReceiverResultReg remains live after both + ceStoreContextInstVarTrampoline and ceStoreCheckTrampoline." + self ensureReceiverResultRegContainsSelf. + self ssPop: 1. + self ssAllocateCallReg: ClassReg and: SendNumArgsReg. "for ceStoreContextInstVarTrampoline" + self ssPush: 1. + objectRepresentation + genLoadSlot: SenderIndex + sourceReg: ReceiverResultReg + destReg: TempReg. + self ssStorePop: popBoolean toReg: ClassReg. + jmpSingle := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. + self MoveCq: slotIndex R: SendNumArgsReg. + self CallRT: ceStoreContextInstVarTrampoline. + jmpDone := self Jump: 0. + jmpSingle jmpTarget: self Label. + objectRepresentation + genStoreSourceReg: ClassReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg + inFrame: true + needsStoreCheck: needStoreCheck. + jmpDone jmpTarget: self Label. + + ^0! Item was added: + ----- Method: StackToRegisterMappingCogit>>genVanillaStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- + genVanillaStorePop: popBoolean ReceiverVariable: slotIndex + <inline: true> + | topReg needStoreCheck | + self ssFlushUpThroughReceiverVariable: slotIndex. + needStoreCheck := (objectRepresentation isUnannotatableConstant: self ssTop) not. + "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." + self ensureReceiverResultRegContainsSelf. + topReg := self allocateRegForStackEntryAt: 0 notConflictingWith: (self registerMaskFor: ReceiverResultReg). + self ssStorePop: popBoolean toReg: topReg. + objectRepresentation + genStoreSourceReg: topReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg + inFrame: needsFrame + needsStoreCheck: needStoreCheck. + ^ 0!

1 0

New Cog VMs available
by Eliot Miranda 30 Mar '16

30 Mar '16

... at http://www.mirandabanda.org/files/Cog/VM/VM.r3663 CogVM binaries as per VMMaker.oscog-eem.1746/r3663 General: Fix loss of signals to e.g. a socket's readSemaphore when data available: Fix a bug in sqAtomicOps.h where the assumption that the intrinsic atomic add operation will apply to 16-bit variables is false on clang. So on x86 and x64 use inline assembly with gcc and clang since this is known to work. Improve the doSignalSemaphores code in sqExternalSemaphores.c so that the tide variables are initialized at the right point and so there's only one copy of the signalling code. Allow primitiveUtcWithOffset to accept an optional parameter with an array or object with two or more slots to store UTC posix microseconds and time zone offset in seconds. Compatibility with VMM trunk. Add a Smalltalk epoch version of it, primitiveUtcAndTimezoneOffset, and give it primitive #244. Fix signed/unsigned arithmetic issues in 64-bit microsecond clock code. This fixes the bug whereby Time localMicrosecondClock - Time utcMicrosecondClock // 1000000 would answer something with an odd second, a multiple of 3600 plus 1. General Integer conversion routines: Several clean ups to integer conversion routines. Simplify bit operations using positiveMachineIntegerValueOf:/ positiveMachineIntegerFor: rather than doing 32/64 bits dissertation. Spur Cogit: Rewrote identity primitive to check for forwarders only when the identity of objects is different. The previous version would crash if the argument was a forwarder to an immediate. Spur VMs: Now that UUIDs are created with purely image-based code in Squeak trunk, make the UUIDPlugin external in all Squeak Spur VMs. Plugins: Make FFI load symbol fail after (when find function fails). In Pharo, we allow to load global functions (so we can control world windows through FFI). LargeIntegersPlugin: Finish 1st round of LargeIntegers refactoring - simplify the left and right shift - use as much unsigned arithmetic as possible - homogenize type declaration within the plugin - remove unused digitOf:at: Slang: Beware: sending abs to an unsigned int will re-interpret the int as signed and will generate C compiler warnings. The new version uses SQABS and SQLABS macros on sqInt and sqLong vars, and fabs and fabsf on double and float args, respectively, and llabs on long long, __int64 vars. Mac OS X: Unswap the Squeak and Newspeak localized strings _,,,^..^,,,_ best, Eliot

4 5

I would be extremely grateful for a reproducible case for the following Socket issue
by Eliot Miranda 30 Mar '16

30 Mar '16

http://forum.world.st/Socket-s-readSemaphore-is-losing-signals-with-Cog-on-… On 8/13/2011 13:42, Levente Uzonyi wrote: > Socket's readSemaphore is losing signals with CogVMs on linux. We > found several cases (RFB, PostgreSQL) when processes are stuck in the > following method: > > Socket >> waitForDataIfClosed: closedBlock > "Wait indefinitely for data to arrive. This method will block until > data is available or the socket is closed." > > [ > (self primSocketReceiveDataAvailable: socketHandle) > ifTrue: [^self]. > self isConnected > ifFalse: [^closedBlock value]. > self readSemaphore wait ] repeat > > When we inspect the contexts, the process is waiting for the > readSemaphore, but evaluating (self primSocketReceiveDataAvailable: > socketHandle) yields true. Signaling the readSemaphore makes the > process running again. As a workaround we replaced #wait with > #waitTimeoutMSecs: and all our problems disappeared. > > The interpreter VM doesn't seem to have this bug, so I guess the bug > was introduced with the changes of aio.c. « [hide part of quote] Oh, interesting. We know this problem fairly well and have always worked around by changing the wait in the above to a "waitTimeoutMSecs: 500" which turns it into a soft busy loop. It would be interesting to see if there's a bug in Cog which causes this. FWIW, here is the relevant portion: "Soft 500ms busy loop - to protect against AIO probs; occasionally, VM-level AIO fails to trip the semaphore" self readSemaphore waitTimeoutMSecs: 500. Cheers, - Andreas _,,,^..^,,,_ best, Eliot

4 12

VM Maker: VMMaker.oscog-nice.1747.mcz
by commits＠source.squeak.org 29 Mar '16

29 Mar '16

Nicolas Cellier uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-nice.1747.mcz ==================== Summary ==================== Name: VMMaker.oscog-nice.1747 Author: nice Time: 29 March 2016, 11:45:53.394 pm UUID: 1b765c2a-8d50-4187-8dc2-216c4556a755 Ancestors: VMMaker.oscog-eem.1746 Correct undue sign extension wile promoting 32 to 64 bits int in fetchLong64:ofObject: This was causing trouble in non spur object memory (V3) especially since I decided to generalize the usage of this message. My feeling: we urgently need unsignedLong32At: to avoid these beautiful cast. =============== Diff against VMMaker.oscog-eem.1746 =============== Item was changed: ----- Method: ObjectMemory>>fetchLong64:ofObject: (in category 'object access') ----- fetchLong64: longIndex ofObject: oop <returnTypeC: #sqLong> ^self cppIf: BytesPerWord = 8 ifTrue: [self long64At: oop + self baseHeaderSize + (longIndex << 3)] ifFalse: + ["BEWARE OF SIGN EXTENSION ON LEAST SIGNIFICAND LIMB + 'unsigned int) CAST IS THERE TO PREVENT SUCH ERROR" + self cppIf: VMBIGENDIAN - [self cppIf: VMBIGENDIAN ifTrue: [((self long32At: oop + self baseHeaderSize + (longIndex << 3)) asUnsignedLongLong << 32) + + (self cCoerceSimple: (self long32At: oop + self baseHeaderSize + (longIndex << 3 + 4)) to: #'unsigned int')] + ifFalse: [(self cCoerceSimple: (self long32At: oop + self baseHeaderSize + (longIndex << 3)) to: #'unsigned int') - + (self long32At: oop + self baseHeaderSize + (longIndex << 3 + 4))] - ifFalse: [(self long32At: oop + self baseHeaderSize + (longIndex << 3)) + ((self long32At: oop + self baseHeaderSize + (longIndex << 3 + 4)) asUnsignedLongLong << 32)]]!

1 0

[commit][3664] Format aio.c according to Eliot's predilections, before adding kqueue and epoll
by commits＠squeakvm.org 29 Mar '16

29 Mar '16

Revision: 3664 Author: eliot Date: 2016-03-29 13:18:32 -0700 (Tue, 29 Mar 2016) Log Message: ----------- Format aio.c according to Eliot's predilections, before adding kqueue and epoll support. Modified Paths: -------------- branches/Cog/platforms/unix/vm/aio.c Modified: branches/Cog/platforms/unix/vm/aio.c =================================================================== --- branches/Cog/platforms/unix/vm/aio.c 2016-03-29 02:48:03 UTC (rev 3663) +++ branches/Cog/platforms/unix/vm/aio.c 2016-03-29 20:18:32 UTC (rev 3664) @@ -27,7 +27,7 @@ /* Author: Ian.Piumarta(a)squeakland.org * - * Last edited: 2006-04-23 12:55:59 by piumarta on emilia.local + * Last edited: Tue Mar 29 13:06:00 PDT 2016 */ #include "sqaio.h" @@ -40,27 +40,27 @@ # include <sys/types.h> # include <unistd.h> # endif /* HAVE_UNISTD_H */ - + # ifdef NEED_GETHOSTNAME_P extern int gethostname(); # endif - + # include <stdio.h> # include <signal.h> # include <errno.h> # include <fcntl.h> # include <sys/ioctl.h> - + # ifdef HAVE_SYS_TIME_H # include <sys/time.h> # else # include <time.h> # endif - + # ifdef HAS_SYS_SELECT_H # include <sys/select.h> # endif - + # ifndef FIONBIO # ifdef HAVE_SYS_FILIO_H # include <sys/filio.h> @@ -92,107 +92,126 @@ # include <sys/ioctl.h> # include <fcntl.h> -#endif +#endif /* !HAVE_CONFIG_H */ #if defined(AIO_DEBUG) -long aioLastTick= 0; -long aioThisTick= 0; +long aioLastTick = 0; +long aioThisTick = 0; + #endif #define _DO_FLAG_TYPE() do { _DO(AIO_R, rd) _DO(AIO_W, wr) _DO(AIO_X, ex) } while (0) -static aioHandler rdHandler[FD_SETSIZE]; -static aioHandler wrHandler[FD_SETSIZE]; -static aioHandler exHandler[FD_SETSIZE]; +static aioHandler rdHandler[FD_SETSIZE]; +static aioHandler wrHandler[FD_SETSIZE]; +static aioHandler exHandler[FD_SETSIZE]; -static void *clientData[FD_SETSIZE]; +static void *clientData[FD_SETSIZE]; -static int maxFd; -static fd_set fdMask; /* handled by aio */ -static fd_set rdMask; /* handle read */ -static fd_set wrMask; /* handle write */ -static fd_set exMask; /* handle exception */ -static fd_set xdMask; /* external descriptor */ +static int maxFd; +static fd_set fdMask; /* handled by aio */ +static fd_set rdMask; /* handle read */ +static fd_set wrMask; /* handle write */ +static fd_set exMask; /* handle exception */ +static fd_set xdMask; /* external descriptor */ -static void undefinedHandler(int fd, void *clientData, int flags) +static void +undefinedHandler(int fd, void *clientData, int flags) { - fprintf(stderr, "undefined handler called (fd %d, flags %x)\n", fd, flags); + fprintf(stderr, "undefined handler called (fd %d, flags %x)\n", fd, flags); } #ifdef AIO_DEBUG -const char *__shortFileName(const char *full__FILE__name) -{ const char *p = strrchr(full__FILE__name,'/'); - return p ? p + 1 : full__FILE__name;} -static char *handlerName(aioHandler h) +const char * +__shortFileName(const char *full__FILE__name) { - if (h == undefinedHandler) return "undefinedHandler"; + const char *p = strrchr(full__FILE__name, '/'); + + return p ? p + 1 : full__FILE__name; +} +static char * +handlerName(aioHandler h) +{ + if (h == undefinedHandler) + return "undefinedHandler"; #ifdef DEBUG_SOCKETS - { - extern char *socketHandlerName(aioHandler); - return socketHandlerName(h); - } + { + extern char *socketHandlerName(aioHandler); + + return socketHandlerName(h); + } #endif - return "***unknown***"; + return "***unknown***"; } + #endif /* initialise asynchronous i/o */ -void aioInit(void) +void +aioInit(void) { - extern void forceInterruptCheck(int); /* not really, but hey */ + extern void forceInterruptCheck(int); /* not really, but hey */ - FD_ZERO(&fdMask); - FD_ZERO(&rdMask); - FD_ZERO(&wrMask); - FD_ZERO(&exMask); - FD_ZERO(&xdMask); - maxFd= 0; - signal(SIGPIPE, SIG_IGN); - signal(SIGIO, forceInterruptCheck); + FD_ZERO(&fdMask); + FD_ZERO(&rdMask); + FD_ZERO(&wrMask); + FD_ZERO(&exMask); + FD_ZERO(&xdMask); + maxFd = 0; + signal(SIGPIPE, SIG_IGN); + signal(SIGIO, forceInterruptCheck); } /* disable handlers and close all handled non-exteral descriptors */ -void aioFini(void) +void +aioFini(void) { - int fd; - for (fd= 0; fd < maxFd; fd++) - if (FD_ISSET(fd, &fdMask) && !(FD_ISSET(fd, &xdMask))) - { - aioDisable(fd); - close(fd); - FD_CLR(fd, &fdMask); - FD_CLR(fd, &rdMask); - FD_CLR(fd, &wrMask); - FD_CLR(fd, &exMask); - } - while (maxFd && !FD_ISSET(maxFd - 1, &fdMask)) - --maxFd; - signal(SIGPIPE, SIG_DFL); + int fd; + + for (fd = 0; fd < maxFd; fd++) + if (FD_ISSET(fd, &fdMask) && !(FD_ISSET(fd, &xdMask))) { + aioDisable(fd); + close(fd); + FD_CLR(fd, &fdMask); + FD_CLR(fd, &rdMask); + FD_CLR(fd, &wrMask); + FD_CLR(fd, &exMask); + } + while (maxFd && !FD_ISSET(maxFd - 1, &fdMask)) + --maxFd; + signal(SIGPIPE, SIG_DFL); } -/* answer whether i/o becomes possible within the given number of microSeconds */ +/* + * answer whether i/o becomes possible within the given number of + * microSeconds + */ #define max(x,y) (((x)>(y))?(x):(y)) -long pollpip = 0; /* set in sqUnixMain.c by -pollpip arg */ +long pollpip = 0; /* set in sqUnixMain.c by -pollpip arg */ + #if COGMTVM -/* If on the MT VM and pollpip > 1 only pip if a threaded FFI call is in +/* + * If on the MT VM and pollpip > 1 only pip if a threaded FFI call is in * progress, which we infer from disownCount being non-zero. */ extern long disownCount; + # define SHOULD_TICK() (pollpip == 1 || (pollpip > 1 && disownCount)) #else # define SHOULD_TICK() pollpip #endif -static char *ticks= "-\\|/"; -static char *ticker= ""; +static char *ticks = "-\\|/"; +static char *ticker = ""; static int tickCount = 0; + #define TICKS_PER_CHAR 10 #define DO_TICK(bool) \ do if ((bool) && !(++tickCount % TICKS_PER_CHAR)) { \ @@ -200,214 +219,215 @@ if (!*ticker++) ticker= ticks; \ } while (0) -long aioPoll(long microSeconds) +long +aioPoll(long microSeconds) { - int fd; - fd_set rd, wr, ex; - unsigned long long us; + int fd; + fd_set rd, wr, ex; + unsigned long long us; - FPRINTF((stderr, "aioPoll(%ld)\n", microSeconds)); - DO_TICK(SHOULD_TICK()); + FPRINTF((stderr, "aioPoll(%ld)\n", microSeconds)); + DO_TICK(SHOULD_TICK()); - /* get out early if there is no pending i/o and no need to relinquish cpu */ + /* + * get out early if there is no pending i/o and no need to relinquish + * cpu + */ #ifdef TARGET_OS_IS_IPHONE - if (maxFd == 0) - return 0; + if (maxFd == 0) + return 0; #else - if ((maxFd == 0) && (microSeconds == 0)) - return 0; + if ((maxFd == 0) && (microSeconds == 0)) + return 0; #endif - rd= rdMask; - wr= wrMask; - ex= exMask; - us= ioUTCMicroseconds(); + rd = rdMask; + wr = wrMask; + ex = exMask; + us = ioUTCMicroseconds(); - for (;;) - { - struct timeval tv; - int n; - unsigned long long now; - tv.tv_sec= microSeconds / 1000000; - tv.tv_usec= microSeconds % 1000000; - n= select(maxFd, &rd, &wr, &ex, &tv); - if (n > 0) break; - if (n == 0) return 0; - if (errno && (EINTR != errno)) - { - fprintf(stderr, "errno %d\n", errno); - perror("select"); - return 0; + for (;;) { + struct timeval tv; + int n; + unsigned long long now; + + tv.tv_sec = microSeconds / 1000000; + tv.tv_usec = microSeconds % 1000000; + n = select(maxFd, &rd, &wr, &ex, &tv); + if (n > 0) + break; + if (n == 0) + return 0; + if (errno && (EINTR != errno)) { + fprintf(stderr, "errno %d\n", errno); + perror("select"); + return 0; + } + now = ioUTCMicroseconds(); + microSeconds -= max(now - us, 1); + if (microSeconds <= 0) + return 0; + us = now; } - now= ioUTCMicroseconds(); - microSeconds -= max(now - us,1); - if (microSeconds <= 0) - return 0; - us= now; - } - for (fd= 0; fd < maxFd; ++fd) - { -# define _DO(FLAG, TYPE) \ - { \ - if (FD_ISSET(fd, &TYPE)) \ - { \ - aioHandler handler= TYPE##Handler[fd]; \ - FD_CLR(fd, &TYPE##Mask); \ - TYPE##Handler[fd]= undefinedHandler; \ - handler(fd, clientData[fd], FLAG); \ - } \ - } - _DO_FLAG_TYPE(); -# undef _DO - } - return 1; + for (fd = 0; fd < maxFd; ++fd) { +#undef _DO +#define _DO(FLAG, TYPE) \ + if (FD_ISSET(fd, &TYPE)) { \ + aioHandler handler= TYPE##Handler[fd]; \ + FD_CLR(fd, &TYPE##Mask); \ + TYPE##Handler[fd]= undefinedHandler; \ + handler(fd, clientData[fd], FLAG); \ + } + _DO_FLAG_TYPE(); + } + return 1; } -/* sleep for microSeconds or until i/o becomes possible, avoiding - sleeping in select() if timeout too small */ +/* + * sleep for microSeconds or until i/o becomes possible, avoiding sleeping in + * select() if timeout too small + */ -long aioSleepForUsecs(long microSeconds) +long +aioSleepForUsecs(long microSeconds) { #if defined(HAVE_NANOSLEEP) - if (microSeconds < (1000000/60)) /* < 1 timeslice? */ - { - if (!aioPoll(0)) - { - struct timespec rqtp= { 0, microSeconds * 1000 }; - struct timespec rmtp; - nanosleep(&rqtp, &rmtp); - microSeconds= 0; /* poll but don't block */ + if (microSeconds < (1000000 / 60)) { /* < 1 timeslice? */ + if (!aioPoll(0)) { + struct timespec rqtp = {0, microSeconds * 1000}; + struct timespec rmtp; + + nanosleep(&rqtp, &rmtp); + microSeconds = 0; /* poll but don't block */ + } } - } #endif - return aioPoll(microSeconds); + return aioPoll(microSeconds); } /* enable asynchronous notification for a descriptor */ -void aioEnable(int fd, void *data, int flags) +void +aioEnable(int fd, void *data, int flags) { - FPRINTF((stderr, "aioEnable(%d)\n", fd)); - if (fd < 0) - { - FPRINTF((stderr, "aioEnable(%d): IGNORED\n", fd)); - return; - } - if (FD_ISSET(fd, &fdMask)) - { - fprintf(stderr, "aioEnable: descriptor %d already enabled\n", fd); - return; - } - clientData[fd]= data; - rdHandler[fd]= wrHandler[fd]= exHandler[fd]= undefinedHandler; - FD_SET(fd, &fdMask); - FD_CLR(fd, &rdMask); - FD_CLR(fd, &wrMask); - FD_CLR(fd, &exMask); - if (fd >= maxFd) - maxFd= fd + 1; - if (flags & AIO_EXT) - { - FD_SET(fd, &xdMask); - /* we should not set NBIO ourselves on external descriptors! */ - } - else - { - /* enable non-blocking asynchronous i/o and delivery of SIGIO to the active process */ - int arg; - FD_CLR(fd, &xdMask); + FPRINTF((stderr, "aioEnable(%d)\n", fd)); + if (fd < 0) { + FPRINTF((stderr, "aioEnable(%d): IGNORED\n", fd)); + return; + } + if (FD_ISSET(fd, &fdMask)) { + fprintf(stderr, "aioEnable: descriptor %d already enabled\n", fd); + return; + } + clientData[fd] = data; + rdHandler[fd] = wrHandler[fd] = exHandler[fd] = undefinedHandler; + FD_SET(fd, &fdMask); + FD_CLR(fd, &rdMask); + FD_CLR(fd, &wrMask); + FD_CLR(fd, &exMask); + if (fd >= maxFd) + maxFd = fd + 1; + if (flags & AIO_EXT) { + FD_SET(fd, &xdMask); + /* we should not set NBIO ourselves on external descriptors! */ + } + else { + /* + * enable non-blocking asynchronous i/o and delivery of SIGIO + * to the active process + */ + int arg; -# if defined(O_ASYNC) - if ( fcntl(fd, F_SETOWN, getpid() ) < 0) - perror("fcntl(F_SETOWN, getpid())"); - if ((arg= fcntl(fd, F_GETFL, 0 )) < 0) - perror("fcntl(F_GETFL)"); - if ( fcntl(fd, F_SETFL, arg | O_NONBLOCK | O_ASYNC) < 0) - perror("fcntl(F_SETFL, O_ASYNC)"); + FD_CLR(fd, &xdMask); -# elif defined(FASYNC) - if ( fcntl(fd, F_SETOWN, getpid() ) < 0) - perror("fcntl(F_SETOWN, getpid())"); - if ((arg= fcntl(fd, F_GETFL, 0 )) < 0) - perror("fcntl(F_GETFL)"); - if ( fcntl(fd, F_SETFL, arg | O_NONBLOCK | FASYNC ) < 0) - perror("fcntl(F_SETFL, FASYNC)"); +#if defined(O_ASYNC) + if (fcntl(fd, F_SETOWN, getpid()) < 0) + perror("fcntl(F_SETOWN, getpid())"); + if ((arg = fcntl(fd, F_GETFL, 0)) < 0) + perror("fcntl(F_GETFL)"); + if (fcntl(fd, F_SETFL, arg | O_NONBLOCK | O_ASYNC) < 0) + perror("fcntl(F_SETFL, O_ASYNC)"); -# elif defined(FIOASYNC) - arg= getpid(); - if (ioctl(fd, SIOCSPGRP, &arg) < 0) - perror("ioctl(SIOCSPGRP, getpid())"); - arg= 1; - if (ioctl(fd, FIOASYNC, &arg) < 0) - perror("ioctl(FIOASYNC, 1)"); -# endif - } +#elif defined(FASYNC) + if (fcntl(fd, F_SETOWN, getpid()) < 0) + perror("fcntl(F_SETOWN, getpid())"); + if ((arg = fcntl(fd, F_GETFL, 0)) < 0) + perror("fcntl(F_GETFL)"); + if (fcntl(fd, F_SETFL, arg | O_NONBLOCK | FASYNC) < 0) + perror("fcntl(F_SETFL, FASYNC)"); + +#elif defined(FIOASYNC) + arg = getpid(); + if (ioctl(fd, SIOCSPGRP, &arg) < 0) + perror("ioctl(SIOCSPGRP, getpid())"); + arg = 1; + if (ioctl(fd, FIOASYNC, &arg) < 0) + perror("ioctl(FIOASYNC, 1)"); +#endif + } } /* install/change the handler for a descriptor */ -void aioHandle(int fd, aioHandler handlerFn, int mask) +void +aioHandle(int fd, aioHandler handlerFn, int mask) { - FPRINTF((stderr, "aioHandle(%d, %s, %d)\n", fd, handlerName(handlerFn), mask)); - if (fd < 0) - { - FPRINTF((stderr, "aioHandle(%d): IGNORED\n", fd)); - return; - } -# define _DO(FLAG, TYPE) \ - if (mask & FLAG) { \ + FPRINTF((stderr, "aioHandle(%d, %s, %d)\n", fd, handlerName(handlerFn), mask)); + if (fd < 0) { + FPRINTF((stderr, "aioHandle(%d): IGNORED\n", fd)); + return; + } +#undef _DO +#define _DO(FLAG, TYPE) \ + if (mask & FLAG) { \ FD_SET(fd, &TYPE##Mask); \ TYPE##Handler[fd]= handlerFn; \ } - _DO_FLAG_TYPE(); -# undef _DO + _DO_FLAG_TYPE(); } /* temporarily suspend asynchronous notification for a descriptor */ -void aioSuspend(int fd, int mask) +void +aioSuspend(int fd, int mask) { - if (fd < 0) - { - FPRINTF((stderr, "aioSuspend(%d): IGNORED\n", fd)); - return; - } - FPRINTF((stderr, "aioSuspend(%d)\n", fd)); -# define _DO(FLAG, TYPE) \ - { \ - if (mask & FLAG) \ - { \ - FD_CLR(fd, &TYPE##Mask); \ - TYPE##Handler[fd]= undefinedHandler; \ - } \ - } - _DO_FLAG_TYPE(); -# undef _DO + if (fd < 0) { + FPRINTF((stderr, "aioSuspend(%d): IGNORED\n", fd)); + return; + } + FPRINTF((stderr, "aioSuspend(%d)\n", fd)); +#undef _DO +#define _DO(FLAG, TYPE) \ + if (mask & FLAG) { \ + FD_CLR(fd, &TYPE##Mask); \ + TYPE##Handler[fd]= undefinedHandler; \ + } + _DO_FLAG_TYPE(); } /* definitively disable asynchronous notification for a descriptor */ -void aioDisable(int fd) +void +aioDisable(int fd) { - if (fd < 0) - { - FPRINTF((stderr, "aioDisable(%d): IGNORED\n", fd)); - return; - } - FPRINTF((stderr, "aioDisable(%d)\n", fd)); - aioSuspend(fd, AIO_RWX); - FD_CLR(fd, &xdMask); - FD_CLR(fd, &fdMask); - rdHandler[fd]= wrHandler[fd]= exHandler[fd]= 0; - clientData[fd]= 0; - /* keep maxFd accurate (drops to zero if no more sockets) */ - while (maxFd && !FD_ISSET(maxFd - 1, &fdMask)) - --maxFd; + if (fd < 0) { + FPRINTF((stderr, "aioDisable(%d): IGNORED\n", fd)); + return; + } + FPRINTF((stderr, "aioDisable(%d)\n", fd)); + aioSuspend(fd, AIO_RWX); + FD_CLR(fd, &xdMask); + FD_CLR(fd, &fdMask); + rdHandler[fd] = wrHandler[fd] = exHandler[fd] = 0; + clientData[fd] = 0; + /* keep maxFd accurate (drops to zero if no more sockets) */ + while (maxFd && !FD_ISSET(maxFd - 1, &fdMask)) + --maxFd; }

1 0

[commit][3663] Nuke some unused vars in the unix automake build
by commits＠squeakvm.org 29 Mar '16

29 Mar '16

Revision: 3663 Author: eliot Date: 2016-03-28 19:48:03 -0700 (Mon, 28 Mar 2016) Log Message: ----------- Nuke some unused vars in the unix automake build Modified Paths: -------------- branches/Cog/platforms/unix/config/make.cfg.in Property Changed: ---------------- branches/Cog/platforms/Cross/vm/sqSCCSVersion.h Property changes on: branches/Cog/platforms/Cross/vm/sqSCCSVersion.h ___________________________________________________________________ Modified: checkindate - Mon Mar 28 15:30:44 PDT 2016 + Mon Mar 28 19:47:15 PDT 2016 Modified: branches/Cog/platforms/unix/config/make.cfg.in =================================================================== --- branches/Cog/platforms/unix/config/make.cfg.in 2016-03-29 02:46:26 UTC (rev 3662) +++ branches/Cog/platforms/unix/config/make.cfg.in 2016-03-29 02:48:03 UTC (rev 3663) @@ -78,7 +78,6 @@ CFLAGS= @CFLAGS@ WFLAGS= @WFLAGS@ LDFLAGS= @LDFLAGS@ -SOFLAGS= @SOFLAGS@ BITBLT_OBJS= @BITBLT_OBJS@ IA32ABI_OBJS= @IA32ABI_OBJS@ VM_DISPX11_OBJS= @VM_DISPX11_OBJS@ @@ -95,11 +94,6 @@ LIB_UUID= @LIB_UUID@ -FFI_DIR= @FFI_DIR@ -FFI_C= @FFI_C@ -FFI_S= @FFI_S@ -FFI_O= @FFI_O@ - PYLIBPATH= @PYLIBPATH@ PYINCLUDES= @PYINCLUDES@

1 0

[commit][3662] Fix compiling the UUIDPlgin external on win32 under the new build regime.
by commits＠squeakvm.org 29 Mar '16

29 Mar '16

Revision: 3662 Author: eliot Date: 2016-03-28 19:46:26 -0700 (Mon, 28 Mar 2016) Log Message: ----------- Fix compiling the UUIDPlgin external on win32 under the new build regime. Modified Paths: -------------- trunk/platforms/win32/plugins/UUIDPlugin/sqWin32UUID.c Added Paths: ----------- trunk/platforms/win32/plugins/UUIDPlugin/Makefile.plugin Added: trunk/platforms/win32/plugins/UUIDPlugin/Makefile.plugin =================================================================== --- trunk/platforms/win32/plugins/UUIDPlugin/Makefile.plugin (rev 0) +++ trunk/platforms/win32/plugins/UUIDPlugin/Makefile.plugin 2016-03-29 02:46:26 UTC (rev 3662) @@ -0,0 +1,3 @@ +include ../common/Makefile.plugin + +EXTRALIBS:=-lole32 Modified: trunk/platforms/win32/plugins/UUIDPlugin/sqWin32UUID.c =================================================================== --- trunk/platforms/win32/plugins/UUIDPlugin/sqWin32UUID.c 2016-03-28 22:36:02 UTC (rev 3661) +++ trunk/platforms/win32/plugins/UUIDPlugin/sqWin32UUID.c 2016-03-29 02:46:26 UTC (rev 3662) @@ -12,17 +12,24 @@ #include <ole2.h> #include "sq.h" -int sqUUIDInit(void) { - return 1; -} +int +sqUUIDInit(void) { return 1; } -int sqUUIDShutdown(void) { - return 1; -} +int +sqUUIDShutdown(void) { return 1; } -int MakeUUID(char *location) { - if(CoCreateGuid((GUID*)location) == S_OK) return 1; - primitiveFail(); - return 0; +#if defined(SQUEAK_BUILTIN_PLUGIN) +# define FAIL() primitiveFail() +#else +extern struct VirtualMachine *interpreterProxy; +# define FAIL() interpreterProxy->primitiveFail() +#endif + +int +MakeUUID(char *location) { + if (CoCreateGuid((GUID*)location) == S_OK) + return 1; + FAIL(); + return 0; }

1 0

[commit][3661] CogVM source as per VMMaker.oscog-eem.1746
by commits＠squeakvm.org 29 Mar '16

29 Mar '16

Revision: 3661 Author: eliot Date: 2016-03-28 15:36:02 -0700 (Mon, 28 Mar 2016) Log Message: ----------- CogVM source as per VMMaker.oscog-eem.1746 Slang: Beware: sending abs to an unsigned int will re-interpret the int as signed and will generate C compiler warnings. The new version uses SQABS and SQLABS macros on sqInt and sqLong vars, and fabs and fabsf on double and float argsa, and llabs on long long, __int64 vars. LargeIntegersPlugin: Finish 1st round of LargeIntegers refactoring - simplify the left and right shift - use as much unsigned arithmetic as possible - homogenize type declaration within the plugin - remove unused digitOf:at: Refactor LargeIntegers in order to prepare the avent of digits larger than 8 bits. Most of these refactorings are already applied in classic interpreter VMMaker branch. Half message were named #bytesOp, the other #digitOp... Homogenize all message names as #digitOp. Also homogenize C core message names #cCoreBytes #cCoreDigit #cBytes -> #cDigit... Rename the rest of #bytes message (whose purpose is to operate on bytesObjects) -> #largeInt (whose effective use is to operate on largeIntegerObjects). This makes the intention a bit clearer. Remove unused #negative: Remove debugging stub #think Spur Cogit: Rewrote identity primitive to check for forwarders only when the identity of objects is different. The previous version woudl crash if the argument was a forwarder to an immediate. Modified Paths: -------------- branches/Cog/nsspur64src/vm/cogit.h branches/Cog/nsspur64src/vm/cogitX64.c branches/Cog/nsspur64src/vm/cointerp.c branches/Cog/nsspur64src/vm/cointerp.h branches/Cog/nsspur64src/vm/gcc3x-cointerp.c branches/Cog/nsspursrc/vm/cogit.h branches/Cog/nsspursrc/vm/cogitARMv5.c branches/Cog/nsspursrc/vm/cogitIA32.c branches/Cog/nsspursrc/vm/cogitMIPSEL.c branches/Cog/nsspursrc/vm/cointerp.c branches/Cog/nsspursrc/vm/cointerp.h branches/Cog/nsspursrc/vm/gcc3x-cointerp.c branches/Cog/nsspurstack64src/vm/gcc3x-interp.c branches/Cog/nsspurstack64src/vm/interp.c branches/Cog/nsspurstacksrc/vm/gcc3x-interp.c branches/Cog/nsspurstacksrc/vm/interp.c branches/Cog/spur64src/vm/cogit.h branches/Cog/spur64src/vm/cogitX64.c branches/Cog/spur64src/vm/cointerp.c branches/Cog/spur64src/vm/cointerp.h branches/Cog/spur64src/vm/gcc3x-cointerp.c branches/Cog/spursistasrc/vm/cogit.h branches/Cog/spursistasrc/vm/cogitARMv5.c branches/Cog/spursistasrc/vm/cogitIA32.c branches/Cog/spursistasrc/vm/cogitMIPSEL.c branches/Cog/spursistasrc/vm/cointerp.c branches/Cog/spursistasrc/vm/cointerp.h branches/Cog/spursistasrc/vm/gcc3x-cointerp.c branches/Cog/spursrc/vm/cogit.h branches/Cog/spursrc/vm/cogitARMv5.c branches/Cog/spursrc/vm/cogitIA32.c branches/Cog/spursrc/vm/cogitMIPSEL.c branches/Cog/spursrc/vm/cointerp.c branches/Cog/spursrc/vm/cointerp.h branches/Cog/spursrc/vm/gcc3x-cointerp.c branches/Cog/spurstack64src/vm/gcc3x-interp.c branches/Cog/spurstack64src/vm/interp.c branches/Cog/spurstacksrc/vm/gcc3x-interp.c branches/Cog/spurstacksrc/vm/interp.c branches/Cog/src/plugins/BitBltPlugin/BitBltPlugin.c branches/Cog/src/plugins/GeniePlugin/GeniePlugin.c branches/Cog/src/plugins/IA32ABI/IA32ABI.c branches/Cog/src/plugins/LargeIntegers/LargeIntegers.c branches/Cog/src/vm/cogit.h branches/Cog/src/vm/cogitARMv5.c branches/Cog/src/vm/cogitIA32.c branches/Cog/src/vm/cogitMIPSEL.c branches/Cog/src/vm/cointerp.c branches/Cog/src/vm/cointerp.h branches/Cog/src/vm/cointerpmt.c branches/Cog/src/vm/cointerpmt.h branches/Cog/src/vm/gcc3x-cointerp.c branches/Cog/src/vm/gcc3x-cointerpmt.c branches/Cog/stacksrc/vm/gcc3x-interp.c branches/Cog/stacksrc/vm/interp.c Property Changed: ---------------- branches/Cog/platforms/Cross/vm/sqSCCSVersion.h Modified: branches/Cog/nsspur64src/vm/cogit.h =================================================================== --- branches/Cog/nsspur64src/vm/cogit.h 2016-03-28 21:36:20 UTC (rev 3660) +++ branches/Cog/nsspur64src/vm/cogit.h 2016-03-28 22:36:02 UTC (rev 3661) @@ -1,5 +1,5 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CCodeGenerator VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 */ Modified: branches/Cog/nsspur64src/vm/cogitX64.c =================================================================== --- branches/Cog/nsspur64src/vm/cogitX64.c 2016-03-28 21:36:20 UTC (rev 3660) +++ branches/Cog/nsspur64src/vm/cogitX64.c 2016-03-28 22:36:02 UTC (rev 3661) @@ -1,9 +1,9 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CCodeGenerator VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 from - StackToRegisterMappingCogit VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + StackToRegisterMappingCogit VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 */ -static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c " __DATE__ ; +static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 " __DATE__ ; char *__cogitBuildInfo = __buildInfo; @@ -974,7 +974,6 @@ static sqInt genLongUnconditionalBackwardJump(void); static sqInt genLongUnconditionalForwardJump(void); static sqInt NoDbgRegParms genLookupForPerformNumArgs(sqInt numArgs); -static AbstractInstruction * NoDbgRegParms genMoveFalseR(sqInt reg); static AbstractInstruction * NoDbgRegParms genMoveTrueR(sqInt reg); static sqInt NoDbgRegParms genMustBeBooleanTrampolineForcalled(sqInt boolean, char *trampolineName); static void NoDbgRegParms genPrimReturnEnterCogCodeEnilopmart(sqInt profiling); @@ -3637,7 +3636,7 @@ closedPICRefersToUnmarkedObject(CogMethod *cPIC) { sqInt i; - usqInt object; + sqInt object; sqInt pc; if (!((isImmediate((cPIC->selector))) @@ -15604,18 +15603,20 @@ genPrimitiveIdenticalOrNotIf(sqInt orNot) { AbstractInstruction *anInstruction; + AbstractInstruction *anInstruction1; + AbstractInstruction *comp; sqInt constant; + sqInt constant1; AbstractInstruction *jumpCmp; - AbstractInstruction *jumpImmediate; /* begin genLoadArgAtDepth:into: */ assert(0 < (numRegArgs())); - jumpImmediate = genJumpImmediate(Arg0Reg); - genEnsureObjInRegNotForwardedscratchReg(Arg0Reg, TempReg); - jmpTarget(jumpImmediate, gCmpRR(Arg0Reg, ReceiverResultReg)); + /* begin CmpR:R: */ + comp = genoperandoperand(CmpRR, Arg0Reg, ReceiverResultReg); if (orNot) { /* begin JumpZero: */ jumpCmp = genConditionalBranchoperand(JumpZero, ((sqInt)0)); + genEnsureOopInRegNotForwardedscratchRegjumpBackTo(Arg0Reg, TempReg, comp); } else { /* begin JumpNonZero: */ @@ -15634,7 +15635,19 @@ assert(methodOrBlockNumArgs <= (numRegArgs())); /* begin RetN: */ genoperand(RetN, 0); - jmpTarget(jumpCmp, genMoveFalseR(ReceiverResultReg)); + jmpTarget(jumpCmp, gLabel()); + if (!orNot) { + genEnsureOopInRegNotForwardedscratchRegjumpBackTo(Arg0Reg, TempReg, comp); + } + /* begin genMoveFalseR: */ + constant1 = falseObject(); + if (shouldAnnotateObjectReference(constant1)) { + annotateobjRef(gMoveCwR(constant1, ReceiverResultReg), constant1); + } + else { + /* begin MoveCq:R: */ + anInstruction1 = genoperandoperand(MoveCqR, constant1, ReceiverResultReg); + } /* begin genPrimReturn */ assert(methodOrBlockNumArgs <= (numRegArgs())); /* begin RetN: */ @@ -20537,7 +20550,7 @@ usqInt callDistance; callDistance = jumpTargetAddress - addressFollowingJump; - assert((abs(callDistance)) < 128); + assert((SQABS(callDistance)) < 128); byteAtput(addressFollowingJump - 1, callDistance & 0xFF); return 2; } @@ -22124,22 +22137,6 @@ return 0; } - /* SimpleStackBasedCogit>>#genMoveFalseR: */ -static AbstractInstruction * NoDbgRegParms -genMoveFalseR(sqInt reg) -{ - AbstractInstruction *anInstruction; - sqInt constant; - - /* begin genMoveConstant:R: */ - constant = falseObject(); - return (shouldAnnotateObjectReference(constant) - ? annotateobjRef(gMoveCwR(constant, reg), constant) - : (/* begin MoveCq:R: */ - (anInstruction = genoperandoperand(MoveCqR, constant, reg)), - anInstruction)); -} - /* SimpleStackBasedCogit>>#genMoveTrueR: */ static AbstractInstruction * NoDbgRegParms genMoveTrueR(sqInt reg) Modified: branches/Cog/nsspur64src/vm/cointerp.c =================================================================== --- branches/Cog/nsspur64src/vm/cointerp.c 2016-03-28 21:36:20 UTC (rev 3660) +++ branches/Cog/nsspur64src/vm/cointerp.c 2016-03-28 22:36:02 UTC (rev 3661) @@ -1,9 +1,9 @@ /* Automatically generated by - CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 from - CoInterpreter VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CoInterpreter VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 */ -static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c " __DATE__ ; +static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 " __DATE__ ; char *__interpBuildInfo = __buildInfo; @@ -2441,7 +2441,7 @@ /*560*/ -1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, 0, 0, 0,-1,-1 }; char expensiveAsserts = 0; -const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1740"; +const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1746"; sqInt minBackwardJumpCountForCompile = MinBackwardJumpCountForCompile /* 40 */; volatile int sendTrace; @@ -42647,7 +42647,7 @@ return 0; } size = longAt(oop + BaseHeaderSize); - return abs(size); + return SQABS(size); } @@ -67205,7 +67205,7 @@ bridgeFromto(SpurSegmentInfo *aSegment, SpurSegmentInfo *nextSegmentOrNil) { usqInt bridgeSpan; - usqInt clifton; + sqInt clifton; usqInt segEnd; segEnd = ((aSegment->segSize)) + ((aSegment->segStart)); @@ -67578,7 +67578,7 @@ static sqInt NoDbgRegParms readHeapFromImageFiledataBytes(sqImageFile f, sqInt numBytes) { DECL_MAYBE_SQ_GLOBAL_STRUCT - sqInt bridge; + usqInt bridge; usqInt bridgehead; usqLong bridgeSpan; sqInt bytesRead; @@ -67672,9 +67672,9 @@ } else { if ((shrinkage >= (((seg->segSize)) * 0.75)) - && ((abs(((seg->segSize)) - shrinkage)) < delta1)) { + && ((SQABS((((seg->segSize)) - shrinkage))) < delta1)) { best = seg; - delta1 = abs(((seg->segSize)) - shrinkage); + delta1 = SQABS((((seg->segSize)) - shrinkage)); } } } @@ -67793,7 +67793,7 @@ usqLong firstSavedBridgeWord; sqInt nWritten; usqInt pier1; - usqInt pier2; + sqInt pier2; usqLong secondSavedBridgeWord; pier1 = (((segment->segSize)) + ((segment->segStart))) - (2 * BaseHeaderSize); Modified: branches/Cog/nsspur64src/vm/cointerp.h =================================================================== --- branches/Cog/nsspur64src/vm/cointerp.h 2016-03-28 21:36:20 UTC (rev 3660) +++ branches/Cog/nsspur64src/vm/cointerp.h 2016-03-28 22:36:02 UTC (rev 3661) @@ -1,5 +1,5 @@ /* Automatically generated by - CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 */ Modified: branches/Cog/nsspur64src/vm/gcc3x-cointerp.c =================================================================== --- branches/Cog/nsspur64src/vm/gcc3x-cointerp.c 2016-03-28 21:36:20 UTC (rev 3660) +++ branches/Cog/nsspur64src/vm/gcc3x-cointerp.c 2016-03-28 22:36:02 UTC (rev 3661) @@ -2,11 +2,11 @@ /* Automatically generated by - CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 from - CoInterpreter VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CoInterpreter VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 */ -static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c " __DATE__ ; +static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 " __DATE__ ; char *__interpBuildInfo = __buildInfo; @@ -2444,7 +2444,7 @@ /*560*/ -1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, 0, 0, 0,-1,-1 }; char expensiveAsserts = 0; -const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1740"; +const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1746"; sqInt minBackwardJumpCountForCompile = MinBackwardJumpCountForCompile /* 40 */; volatile int sendTrace; @@ -42656,7 +42656,7 @@ return 0; } size = longAt(oop + BaseHeaderSize); - return abs(size); + return SQABS(size); } @@ -67214,7 +67214,7 @@ bridgeFromto(SpurSegmentInfo *aSegment, SpurSegmentInfo *nextSegmentOrNil) { usqInt bridgeSpan; - usqInt clifton; + sqInt clifton; usqInt segEnd; segEnd = ((aSegment->segSize)) + ((aSegment->segStart)); @@ -67587,7 +67587,7 @@ static sqInt NoDbgRegParms readHeapFromImageFiledataBytes(sqImageFile f, sqInt numBytes) { DECL_MAYBE_SQ_GLOBAL_STRUCT - sqInt bridge; + usqInt bridge; usqInt bridgehead; usqLong bridgeSpan; sqInt bytesRead; @@ -67681,9 +67681,9 @@ } else { if ((shrinkage >= (((seg->segSize)) * 0.75)) - && ((abs(((seg->segSize)) - shrinkage)) < delta1)) { + && ((SQABS((((seg->segSize)) - shrinkage))) < delta1)) { best = seg; - delta1 = abs(((seg->segSize)) - shrinkage); + delta1 = SQABS((((seg->segSize)) - shrinkage)); } } } @@ -67802,7 +67802,7 @@ usqLong firstSavedBridgeWord; sqInt nWritten; usqInt pier1; - usqInt pier2; + sqInt pier2; usqLong secondSavedBridgeWord; pier1 = (((segment->segSize)) + ((segment->segStart))) - (2 * BaseHeaderSize); Modified: branches/Cog/nsspursrc/vm/cogit.h =================================================================== --- branches/Cog/nsspursrc/vm/cogit.h 2016-03-28 21:36:20 UTC (rev 3660) +++ branches/Cog/nsspursrc/vm/cogit.h 2016-03-28 22:36:02 UTC (rev 3661) @@ -1,5 +1,5 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CCodeGenerator VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 */ Modified: branches/Cog/nsspursrc/vm/cogitARMv5.c =================================================================== --- branches/Cog/nsspursrc/vm/cogitARMv5.c 2016-03-28 21:36:20 UTC (rev 3660) +++ branches/Cog/nsspursrc/vm/cogitARMv5.c 2016-03-28 22:36:02 UTC (rev 3661) @@ -1,9 +1,9 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + CCodeGenerator VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 from - StackToRegisterMappingCogit VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c + StackToRegisterMappingCogit VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 */ -static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1740 uuid: 10ece78d-d04d-4ad2-8598-e496b6a6097c " __DATE__ ; +static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1746 uuid: 9e4a49eb-8ebe-486d-b6f0-430100efa288 " __DATE__ ; char *__cogitBuildInfo = __buildInfo; @@ -1021,7 +1021,6 @@ static sqInt genLongUnconditionalBackwardJump(void); static sqInt genLongUnconditionalForwardJump(void); static sqInt NoDbgRegParms genLookupForPerformNumArgs(sqInt numArgs); -static AbstractInstruction * NoDbgRegParms genMoveFalseR(sqInt reg); static AbstractInstruction * NoDbgRegParms genMoveTrueR(sqInt reg); static sqInt NoDbgRegParms genMustBeBooleanTrampolineForcalled(sqInt boolean, char *trampolineName); static void NoDbgRegParms genPrimReturnEnterCogCodeEnilopmart(sqInt profiling); @@ -2614,7 +2613,7 @@ case MoveRM16r: /* begin is12BitValue:ifTrue:ifFalse: */ constant4 = ((self_in_computeMaximumSize->operands))[1]; - if ((abs(constant4)) <= 0xFFF) { + if ((SQABS(constant4)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (constant4 >= 0) { @@ -2635,7 +2634,7 @@ case MoveMwrR: /* begin is12BitValue:ifTrue:ifFalse: */ constant5 = ((self_in_computeMaximumSize->operands))[0]; - if ((abs(constant5)) <= 0xFFF) { + if ((SQABS(constant5)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (constant5 >= 0) { @@ -3403,11 +3402,11 @@ jumpTarget = jumpTarget1; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord43 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord43; instrOffset6 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -3437,11 +3436,11 @@ jumpTarget2 = jumpTarget11; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord44 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord44; instrOffset7 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -3957,11 +3956,11 @@ rd2 = rn4; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord45 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord45; instrOffset8 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4084,11 +4083,11 @@ rd22 = rn24; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord79 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord79; instrOffset27 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4165,11 +4164,11 @@ rd4 = rn6; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord47 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord47; instrOffset9 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4251,11 +4250,11 @@ rd5 = 0; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord48 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord48; instrOffset10 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4319,11 +4318,11 @@ rd23 = rn25; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord80 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord80; instrOffset28 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4396,11 +4395,11 @@ rd7 = rn9; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord50 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord50; instrOffset11 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4446,11 +4445,11 @@ rd8 = rn10; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord51 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord51; instrOffset12 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4573,11 +4572,11 @@ rd24 = rn26; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord81 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord81; instrOffset29 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4598,11 +4597,11 @@ rd10 = rn12; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord53 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord53; instrOffset13 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4617,11 +4616,11 @@ rd11 = rn13; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord54 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord54; instrOffset14 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4636,11 +4635,11 @@ rd12 = 0; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord55 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord55; instrOffset15 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4655,11 +4654,11 @@ rd13 = rn15; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord56 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord56; instrOffset16 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4674,11 +4673,11 @@ rd14 = rn16; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord57 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord57; instrOffset17 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4693,11 +4692,11 @@ rd15 = rn17; /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord58 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord58; instrOffset18 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -4855,11 +4854,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord36 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord36; instrOffset = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5050,11 +5049,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord210 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord210; instrOffset19 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5078,11 +5077,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord211 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord211; instrOffset20 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5106,11 +5105,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord212 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord212; instrOffset21 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5134,11 +5133,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord213 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord213; instrOffset22 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5153,7 +5152,7 @@ srcReg17 = ((self_in_dispatchConcretize->operands))[1]; destReg12 = ((self_in_dispatchConcretize->operands))[2]; /* begin is12BitValue:ifTrue:ifFalse: */ - if ((abs(offset31)) <= 0xFFF) { + if ((SQABS(offset31)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (offset31 >= 0) { @@ -5166,7 +5165,7 @@ goto l245; } else { - immediate17 = abs(offset31); + immediate17 = SQABS(offset31); /* begin machineCodeAt:put: */ aWord75 = ldrbrnplusimm(self_in_dispatchConcretize, destReg12, srcReg17, 0, immediate17); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord75; @@ -5188,11 +5187,11 @@ else { /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord310 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord310; instrOffset23 = ((self_in_dispatchConcretize->machineCodeSize) = 4); } @@ -5213,7 +5212,7 @@ offset32 = ((self_in_dispatchConcretize->operands))[1]; baseReg1 = ((self_in_dispatchConcretize->operands))[2]; /* begin is12BitValue:ifTrue:ifFalse: */ - if ((abs(offset32)) <= 0xFFF) { + if ((SQABS(offset32)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (offset32 >= 0) { @@ -5226,7 +5225,7 @@ goto l251; } else { - immediate18 = abs(offset32); + immediate18 = SQABS(offset32); /* begin machineCodeAt:put: */ aWord76 = strbrnplusimm(self_in_dispatchConcretize, srcReg18, baseReg1, 0, immediate18); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord76; @@ -5248,11 +5247,11 @@ else { /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord311 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord311; instrOffset24 = ((self_in_dispatchConcretize->machineCodeSize) = 4); } @@ -5273,7 +5272,7 @@ offset33 = ((self_in_dispatchConcretize->operands))[1]; baseReg2 = ((self_in_dispatchConcretize->operands))[2]; /* begin is12BitValue:ifTrue:ifFalse: */ - if ((abs(offset33)) <= 0xFFF) { + if ((SQABS(offset33)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (offset33 >= 0) { @@ -5286,7 +5285,7 @@ goto l257; } else { - immediate19 = abs(offset33); + immediate19 = SQABS(offset33); /* begin machineCodeAt:put: */ aWord77 = strhrnplusimm(self_in_dispatchConcretize, srcReg19, baseReg2, 0, immediate19); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord77; @@ -5308,11 +5307,11 @@ else { /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord312 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord312; instrOffset25 = ((self_in_dispatchConcretize->machineCodeSize) = 4); } @@ -5333,7 +5332,7 @@ srcReg3 = ((self_in_dispatchConcretize->operands))[1]; destReg2 = ((self_in_dispatchConcretize->operands))[2]; /* begin is8BitValue:ifTrue:ifFalse: */ - if ((abs(offset3)) <= 0xFF) { + if ((SQABS(offset3)) <= 0xFF) { /* (2 raisedTo: 8)-1 */ if (offset3 >= 0) { @@ -5345,7 +5344,7 @@ } else { - immediate8 = abs(offset3); + immediate8 = SQABS(offset3); /* begin machineCodeAt:put: */ aWord20 = ldrhrnplusimm(self_in_dispatchConcretize, destReg2, srcReg3, 0, immediate8); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord20; @@ -5357,11 +5356,11 @@ else { /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord38 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord38; instrOffset1 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5390,7 +5389,7 @@ srcReg5 = ((self_in_dispatchConcretize->operands))[1]; destReg4 = ((self_in_dispatchConcretize->operands))[2]; /* begin is12BitValue:ifTrue:ifFalse: */ - if ((abs(offset5)) <= 0xFFF) { + if ((SQABS(offset5)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (offset5 >= 0) { @@ -5403,7 +5402,7 @@ goto l40; } else { - immediate9 = abs(offset5); + immediate9 = SQABS(offset5); /* begin machineCodeAt:put: */ aWord26 = ldrrnplusimm(self_in_dispatchConcretize, destReg4, srcReg5, 0, immediate9); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord26; @@ -5416,11 +5415,11 @@ else { /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord39 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord39; instrOffset2 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5500,7 +5499,7 @@ offset6 = ((self_in_dispatchConcretize->operands))[1]; baseReg = ((self_in_dispatchConcretize->operands))[2]; /* begin is12BitValue:ifTrue:ifFalse: */ - if ((abs(offset6)) <= 0xFFF) { + if ((SQABS(offset6)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (offset6 >= 0) { @@ -5513,7 +5512,7 @@ goto l47; } else { - immediate10 = abs(offset6); + immediate10 = SQABS(offset6); /* begin machineCodeAt:put: */ aWord31 = strrnplusimm(self_in_dispatchConcretize, srcReg6, baseReg, 0, immediate10); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord31; @@ -5526,11 +5525,11 @@ else { /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord40 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord40; instrOffset3 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -5616,11 +5615,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord41 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord41; instrOffset4 = ((self_in_dispatchConcretize->machineCodeSize) = 4); @@ -5699,11 +5698,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_dispatchConcretize->dependent))->address))); - assert((abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord126 = ldrrnplusimm(self_in_dispatchConcretize, ConcreteIPReg, PC, (((((self_in_dispatchConcretize->dependent))->address)) >= (((self_in_dispatchConcretize->address)) + 8) ? 1 - : 0), abs(((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8))); + : 0), abs((((((self_in_dispatchConcretize->dependent))->address)) - (((self_in_dispatchConcretize->address)) + 8)))); ((self_in_dispatchConcretize->machineCode))[0 / 4] = aWord126; instrOffset26 = ((self_in_dispatchConcretize->machineCodeSize) = 4); /* begin machineCodeAt:put: */ @@ -6528,11 +6527,11 @@ } /* begin moveCw:intoR: */ assert(addressIsInCurrentCompilation((((self_in_loadCwInto->dependent))->address))); - assert((abs(((((self_in_loadCwInto->dependent))->address)) - (((self_in_loadCwInto->address)) + 8))) < (1L << 12)); + assert((abs((((((self_in_loadCwInto->dependent))->address)) - (((self_in_loadCwInto->address)) + 8)))) < (1L << 12)); /* begin machineCodeAt:put: */ aWord1 = ldrrnplusimm(self_in_loadCwInto, destReg, PC, (((((self_in_loadCwInto->dependent))->address)) >= (((self_in_loadCwInto->address)) + 8) ? 1 - : 0), abs(((((self_in_loadCwInto->dependent))->address)) - (((self_in_loadCwInto->address)) + 8))); + : 0), abs((((((self_in_loadCwInto->dependent))->address)) - (((self_in_loadCwInto->address)) + 8)))); ((self_in_loadCwInto->machineCode))[0 / 4] = aWord1; return ((usqInt) (((self_in_loadCwInto->machineCodeSize) = 4))); } @@ -20840,18 +20839,20 @@ genPrimitiveIdenticalOrNotIf(sqInt orNot) { AbstractInstruction *anInstruction; + AbstractInstruction *anInstruction1; + AbstractInstruction *comp; sqInt constant; + sqInt constant1; AbstractInstruction *jumpCmp; - AbstractInstruction *jumpImmediate; /* begin genLoadArgAtDepth:into: */ assert(0 < (numRegArgs())); - jumpImmediate = genJumpImmediate(Arg0Reg); - genEnsureObjInRegNotForwardedscratchReg(Arg0Reg, TempReg); - jmpTarget(jumpImmediate, gCmpRR(Arg0Reg, ReceiverResultReg)); + /* begin CmpR:R: */ + comp = genoperandoperand(CmpRR, Arg0Reg, ReceiverResultReg); if (orNot) { /* begin JumpZero: */ jumpCmp = genConditionalBranchoperand(JumpZero, ((sqInt)0)); + genEnsureOopInRegNotForwardedscratchRegjumpBackTo(Arg0Reg, TempReg, comp); } else { /* begin JumpNonZero: */ @@ -20873,7 +20874,22 @@ assert(methodOrBlockNumArgs <= (numRegArgs())); /* begin RetN: */ genoperand(RetN, 0); - jmpTarget(jumpCmp, genMoveFalseR(ReceiverResultReg)); + jmpTarget(jumpCmp, gLabel()); + if (!orNot) { + genEnsureOopInRegNotForwardedscratchRegjumpBackTo(Arg0Reg, TempReg, comp); + } + /* begin genMoveFalseR: */ + constant1 = falseObject(); + if (shouldAnnotateObjectReference(constant1)) { + annotateobjRef(gMoveCwR(constant1, ReceiverResultReg), constant1); + } + else { + /* begin MoveCq:R: */ + anInstruction1 = genoperandoperand(MoveCqR, constant1, ReceiverResultReg); + if (usesOutOfLineLiteral(anInstruction1)) { + (anInstruction1->dependent = locateLiteral(constant1)); + } + } /* begin genPrimReturn */ assert(methodOrBlockNumArgs <= (numRegArgs())); /* begin RetN: */ @@ -21965,7 +21981,7 @@ case MoveRM16r: /* begin is12BitValue:ifTrue:ifFalse: */ constant4 = ((self_in_usesOutOfLineLiteral->operands))[1]; - if ((abs(constant4)) <= 0xFFF) { + if ((SQABS(constant4)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (constant4 >= 0) { @@ -21987,7 +22003,7 @@ case MoveMwrR: /* begin is12BitValue:ifTrue:ifFalse: */ constant5 = ((self_in_usesOutOfLineLiteral->operands))[0]; - if ((abs(constant5)) <= 0xFFF) { + if ((SQABS(constant5)) <= 0xFFF) { /* (2 raisedTo: 12)-1 */ if (constant5 >= 0) { @@ Diff output truncated at 50000 characters. @@

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Vm-dev March 2016