Vm-dev June 2016

vm-dev@lists.squeakfoundation.org

50 participants
129 discussions

[commit][3734] CogVM source as per VMMaker.oscog-eem.1877
by commits＠squeakvm.org 02 Jun '16

02 Jun '16

Revision: 3734 Author: eliot Date: 2016-06-01 16:55:01 -0700 (Wed, 01 Jun 2016) Log Message: ----------- CogVM source as per VMMaker.oscog-eem.1877 Cogit: Revise Clement's two-path code for immutability to allow it to be used for frameless setters containing more than one inst var store, avoiding multiple store checks by checking once for the receiver being young. Good for a 4% speedup in the binary tree benchmark. Rename needsTwoPath to useTwoPaths. Refactor StackToRegisterMappingCogit>> scanMethod so that it is used by RegisterMappingCogit and SistaCogit without having to duplicate an already large method with very minor varations 3 times. Add an isInstVarStore property to CogBytecodeDescriptor and set it in the bytecode tables. Fix bug in ARM's concretizeSqrtRd. Modified Paths: -------------- branches/Cog/nsspur64src/vm/cogit.h branches/Cog/nsspur64src/vm/cogitX64.c branches/Cog/nsspursrc/vm/cogit.h branches/Cog/nsspursrc/vm/cogitARMv5.c branches/Cog/nsspursrc/vm/cogitIA32.c branches/Cog/nsspursrc/vm/cogitMIPSEL.c branches/Cog/spur64src/vm/cogit.h branches/Cog/spur64src/vm/cogitX64.c branches/Cog/spursistasrc/vm/cogit.h branches/Cog/spursistasrc/vm/cogitARMv5.c branches/Cog/spursistasrc/vm/cogitIA32.c branches/Cog/spursistasrc/vm/cogitMIPSEL.c branches/Cog/spursrc/vm/cogit.h branches/Cog/spursrc/vm/cogitARMv5.c branches/Cog/spursrc/vm/cogitIA32.c branches/Cog/spursrc/vm/cogitMIPSEL.c branches/Cog/src/vm/cogit.h branches/Cog/src/vm/cogitARMv5.c branches/Cog/src/vm/cogitIA32.c branches/Cog/src/vm/cogitMIPSEL.c Property Changed: ---------------- branches/Cog/platforms/Cross/vm/sqSCCSVersion.h Modified: branches/Cog/nsspur64src/vm/cogit.h =================================================================== --- branches/Cog/nsspur64src/vm/cogit.h 2016-06-01 19:32:08 UTC (rev 3733) +++ branches/Cog/nsspur64src/vm/cogit.h 2016-06-01 23:55:01 UTC (rev 3734) @@ -1,5 +1,5 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e + CCodeGenerator VMMaker.oscog-eem.1877 uuid: 638b0433-98fd-4fdf-8b75-588d6c09081f */ Modified: branches/Cog/nsspur64src/vm/cogitX64.c =================================================================== --- branches/Cog/nsspur64src/vm/cogitX64.c 2016-06-01 19:32:08 UTC (rev 3733) +++ branches/Cog/nsspur64src/vm/cogitX64.c 2016-06-01 23:55:01 UTC (rev 3734) @@ -1,9 +1,9 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e + CCodeGenerator VMMaker.oscog-eem.1877 uuid: 638b0433-98fd-4fdf-8b75-588d6c09081f from - StackToRegisterMappingCogit VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e + StackToRegisterMappingCogit VMMaker.oscog-eem.1877 uuid: 638b0433-98fd-4fdf-8b75-588d6c09081f */ -static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e " __DATE__ ; +static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1877 uuid: 638b0433-98fd-4fdf-8b75-588d6c09081f " __DATE__ ; char *__cogitBuildInfo = __buildInfo; @@ -352,6 +352,7 @@ unsigned isMappedInBlock : 1; unsigned isExtension : 1; unsigned isInstVarRef : 1; + unsigned isInstVarStore : 1; unsigned hasIRC : 1; } BytecodeDescriptor; @@ -1076,6 +1077,7 @@ #if IMMUTABILITY static void compileTwoPathFrameBuild(void); #endif /* IMMUTABILITY */ +static void compileTwoPathFramelessInit(void); static sqInt NoDbgRegParms cPICMissTrampolineFor(sqInt numArgs); static sqInt doubleExtendedDoAnythingBytecode(void); static sqInt duplicateTopBytecode(void); @@ -1292,518 +1294,518 @@ static AbstractInstruction * fullBlockEntry; static AbstractInstruction * fullBlockNoContextSwitchEntry; static BytecodeDescriptor generatorTable[512] = { - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushReceiverBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushConstantTrueBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushConstantFalseBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushConstantNilBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushQuickIntegerConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushQuickIntegerConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushQuickIntegerConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushQuickIntegerConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genReturnReceiver, 0, needsFrameIfInBlock, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0 }, - { genReturnTrue, 0, needsFrameIfInBlock, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0 }, - { genReturnFalse, 0, needsFrameIfInBlock, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0 }, - { genReturnNil, 0, needsFrameIfInBlock, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0 }, - { genReturnTopFromMethod, 0, needsFrameIfInBlock, -1, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0 }, - { genReturnTopFromBlock, 0, needsFrameNever, -1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, - { unknownBytecode, 0, 0, 0, Nop, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { unknownBytecode, 0, 0, 0, Nop, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { extendedPushBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { extendedStoreBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { extendedStoreAndPopBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genExtendedSendBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { doubleExtendedDoAnythingBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genExtendedSuperBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 1, 0 }, - { genSecondExtendedSendBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genPopStackBytecode, 0, needsFrameNever, -1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { duplicateTopBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushActiveContextBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushNewArrayBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genCallPrimitiveBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushRemoteTempLongBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreRemoteTempLongBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopRemoteTempLongBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushClosureCopyCopiedValuesBytecode, v3BlockCodeSize, 0, 0, 0, 4, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genLongUnconditionalBackwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongUnconditionalBackwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongUnconditionalBackwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongUnconditionalBackwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongUnconditionalForwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genLongUnconditionalForwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genLongUnconditionalForwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genLongUnconditionalForwardJump, v3LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genLongJumpIfTrue, v3LongForwardBranchDistance, 0, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongJumpIfTrue, v3LongForwardBranchDistance, 0, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongJumpIfTrue, v3LongForwardBranchDistance, 0, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongJumpIfTrue, v3LongForwardBranchDistance, 0, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genLongJumpIfFalse, v3LongForwardBranchDistance, 0, 0, 0, 2, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genLongJumpIfFalse, v3LongForwardBranchDistance, 0, 0, 0, 2, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genLongJumpIfFalse, v3LongForwardBranchDistance, 0, 0, 0, 2, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genLongJumpIfFalse, v3LongForwardBranchDistance, 0, 0, 0, 2, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, AddRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, SubRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpLess, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpGreater, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpLessOrEqual, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpGreaterOrEqual, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpZero, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpNonZero, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, AndRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, OrRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorEqualsEquals, 0, needsFrameNever, -1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genSpecialSelectorClass, 0, needsFrameIfStackGreaterThanOne, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralVariable16CasesBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushLiteralConstantBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushReceiverBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtPushPseudoVariableOrOuterBytecode, 0, needsFrameIfExtBGT2, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushConstantZeroBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushConstantOneBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, AddRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, SubRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpLess, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpGreater, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpLessOrEqual, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpGreaterOrEqual, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpZero, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorComparison, 0, 0, 0, JumpNonZero, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, AndRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorArithmetic, 0, 0, 0, OrRR, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorEqualsEquals, 0, needsFrameNever, -1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genSpecialSelectorClass, 0, needsFrameIfStackGreaterThanOne, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSpecialSelectorSend, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector1ArgBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendLiteralSelector2ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genSendAbsentImplicit0ArgsBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopReceiverVariableBytecode, 0, needsFrameIfImmutability, -1, 0, 1, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortUnconditionalJump, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfTrue, v3ShortForwardBranchDistance, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genShortJumpIfFalse, v3ShortForwardBranchDistance, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genReturnReceiver, 0, needsFrameIfInBlock, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0 }, - { genReturnTopFromMethod, 0, needsFrameIfInBlock, -1, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0 }, - { genExtReturnTopFromBlock, 0, needsFrameNever, -1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 }, - { duplicateTopBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPopStackBytecode, 0, needsFrameNever, -1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtNopBytecode, 0, needsFrameNever, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { unknownBytecode, 0, 0, 0, Nop, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { unknownBytecode, 0, 0, 0, Nop, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { extABytecode, 0, needsFrameNever, 0, 0, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { extBBytecode, 0, needsFrameNever, 0, 0, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { genExtPushReceiverVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0 }, - { genExtPushLiteralVariableBytecode, 0, needsFrameNever, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtPushLiteralBytecode, 0, needsFrameNever, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtPushIntegerBytecode, 0, needsFrameNever, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genLongPushTemporaryVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushNewArrayBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtStoreReceiverVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genExtStoreLiteralVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 0, 0 }, - { genLongStoreTemporaryVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtStoreAndPopReceiverVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 1, 0 }, - { genExtStoreAndPopLiteralVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, IMMUTABILITY, 0, 0, 0, 0 }, - { genLongStoreAndPopTemporaryVariableBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtSendBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genExtSendSuperBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genExtSendAbsentImplicitBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genExtSendAbsentDynamicSuperBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { genExtUnconditionalJump, v4LongBranchDistance, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genExtJumpIfTrue, v4LongBranchDistance, 0, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0 }, - { genExtJumpIfFalse, v4LongBranchDistance, 0, 0, 0, 2, 0, 1, 0, 0, 1, 0, 0, 0, 0 }, - { genExtSendAbsentSelfBytecode, 0, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { unknownBytecode, 0, 0, 0, Nop, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { unknownBytecode, 0, 0, 0, Nop, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { unknownBytecode, 0, 0, 0, Nop, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, - { genCallPrimitiveBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genPushRemoteTempLongBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreRemoteTempLongBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genStoreAndPopRemoteTempLongBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { genExtPushClosureBytecode, v4BlockCodeSize, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0, 0, 0 }, - { genExtSendAbsentOuterBytecode, 0, 0, 0, 0, 3, 0, 0, 0, 0, 1, 0, 0, 0, 1 }, - { unknownBytecode, 0, 0, 0, Nop, 3, 0, 0, 0, 0, 0, 0, 1, 0, 0 } + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushReceiverVariableBytecode, 0, needsFrameNever, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, + { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { genPushTemporaryVariableBytecode, 0, needsFrameIfMod16GENumArgs, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, @@ Diff output truncated at 50000 characters. @@

1 0

VM Maker: VMMaker.oscog-eem.1877.mcz
by commits＠source.squeak.org 02 Jun '16

02 Jun '16

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1877.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1877 Author: eem Time: 1 June 2016, 4:45:31.895746 pm UUID: 638b0433-98fd-4fdf-8b75-588d6c09081f Ancestors: VMMaker.oscog-eem.1876 Cogit: revise Clément's two-path code for immutability to allow it to be used for frameless setters containing more than one inst var store, avoiding multiple store checks by checking once for the receiver being young. Good for a 4% speedup in the binary tree benchmark. Rename needsTwoPath to useTwoPaths. Refactor StackToRegisterMappingCogit>>scanMethod so that it is used by RegisterMappingCogit and SistaCogit without having to duplicate an already large method with very minor varations three times. Add an isInstVarStore property to CogBytecodeDescriptor and set it in the bytecode tables. Fix bug in ARM's concretizeSqrtRd. Fix Slang bug detabbing empty expansions in cppIf:ifTrue:ifFalse:. =============== Diff against VMMaker.oscog-eem.1876 =============== Item was changed: ----- Method: CCodeGenerator>>generateInlineCppIfElse:asArgument:on:indent: (in category 'C translation') ----- generateInlineCppIfElse: msgNode asArgument: asArgument on: aStream indent: level "Generate the C code for this message onto the given stream." | expr putStatement | "Compile-time expansion for constants set in the options dictionary, e.g. to cut down on noise for MULTIPLEBYTECODESETS." putStatement := asArgument ifTrue: "emitCCodeAsArgumentOn: doesn't indent, the code needs indenting if it takes multiple lines, so post-process." [[:node| | expansion | expansion := String streamContents: [:s| node emitCCodeAsArgumentOn: s level: level generator: self]. aStream nextPutAll: ((expansion includes: Character cr) ifTrue: [(String streamContents: [:s| s position > 0 ifTrue: [s tab: level + 1]. node emitCCodeAsArgumentOn: s level: level generator: self]) copyReplaceAll: (String with: Character cr) with: (String with: Character cr), (String new: level + 1 withAll: Character tab)] ifFalse: [expansion])]] ifFalse: [[:node| | expansion | expansion := String streamContents: [:s| node emitCCodeOn: s level: level generator: self]. "Remove tabs from first line to avoid indenting a second time" + expansion ifNotEmpty: + [expansion := expansion allButFirst: (expansion findFirst: [:c| c ~~ Character tab]) - 1]. - expansion := expansion allButFirst: (expansion findFirst: [:c| c ~~ Character tab]) - 1. aStream nextPutAll: expansion]]. (self nilOrBooleanConditionFor: msgNode) ifNotNil: [:condition| condition ifTrue: [putStatement value: msgNode args second] ifFalse: [msgNode args size >= 3 ifTrue: [putStatement value: msgNode args third]]. ^self]. "Full #if ... #else..." putStatement := asArgument ifTrue: "emitCCodeAsArgumentOn: doesn't indent, the code needs indenting in this case, so post-process." [[:node| aStream nextPutAll: ((String streamContents: [:s| s next: level + 1 put: Character tab. node emitCCodeAsArgumentOn: s level: level generator: self]) copyReplaceAll: (String with: Character cr) with: (String with: Character cr), (String new: level + 1 withAll: Character tab))]] ifFalse: [[:node| node emitCCodeOn: aStream level: level generator: self]]. expr := String streamContents: [:es| msgNode args first emitCCodeAsArgumentOn: es level: 0 generator: self]. [expr last isSeparator] whileTrue: [expr := expr allButLast]. aStream ensureCr; nextPut: $#; next: level * 2 put: Character space; nextPutAll: 'if '; nextPutAll: expr; cr. self with: msgNode args first ifAppropriateSetTo: true do: [putStatement value: msgNode args second]. expr := ' /* ', expr, ' */'. msgNode args size >= 3 ifTrue: [aStream ensureCr; nextPut: $#; next: level * 2 put: Character space; nextPutAll: 'else'; nextPutAll: expr; cr. self with: msgNode args first ifAppropriateSetTo: false do: [putStatement value: msgNode args third]]. aStream ensureCr; nextPut: $#; next: level * 2 put: Character space; nextPutAll: 'endif'; nextPutAll: expr; cr. asArgument ifTrue: [aStream next: level + 1 put: Character tab]! Item was changed: ----- Method: CogARMCompiler>>concretizeSqrtRd (in category 'generate machine code - concretize') ----- concretizeSqrtRd "Will get inlined into concretizeAt: switch." <inline: true> "Square root of FP regLHS into regLHS" | regLHS | + regLHS := operands at: 0. - regLHS := operands at: 1. machineCode at: 0 put:(self fsqrtd: regLHS). ^machineCodeSize := 4 ! Item was changed: VMStructType subclass: #CogBytecodeDescriptor + instanceVariableNames: 'generator spanFunction needsFrameFunction stackDelta opcode numBytes isBranchTrue isBranchFalse isReturn isBlockCreation isMapped isMappedInBlock isExtension isInstVarRef isInstVarStore hasIRC' - instanceVariableNames: 'generator spanFunction needsFrameFunction stackDelta opcode numBytes isBranchTrue isBranchFalse isReturn isBlockCreation isMapped isMappedInBlock isExtension isInstVarRef hasIRC' classVariableNames: '' poolDictionaries: '' category: 'VMMaker-JIT'! !CogBytecodeDescriptor commentStamp: 'eem 11/18/2010 06:32' prior: 0! I am an entry in the Cogit's dispatch table for bytecodes. I hold the routine to call to generate code for the partcular bytecode I represent and the number of bytes the bytecode has. For eliminating temps in frameless blocks I maintain a stack delta for bytecodes that are valid in a frameless block. The order of my instance variables is chosen for compact struct packing.! Item was added: + ----- Method: CogBytecodeDescriptor>>isInstVarStore (in category 'accessing') ----- + isInstVarStore + "Answer the value of isInstVarStore" + + ^ isInstVarStore! Item was added: + ----- Method: CogBytecodeDescriptor>>isInstVarStore: (in category 'accessing') ----- + isInstVarStore: anObject + "Set the value of isInstVarStore" + + ^isInstVarStore := anObject! Item was added: + ----- Method: CogObjectRepresentationForSpur>>genJumpInOldSpace: (in category 'compile abstract instructions') ----- + genJumpInOldSpace: reg + "Jump if reg is old." + <inline: true> + ^cogit + CmpCq: objectMemory storeCheckBoundary R: reg; "N.B. FLAGS := destReg - scratchReg" + JumpAboveOrEqual: 0! Item was added: + ----- Method: CogObjectRepresentationForSqueakV3>>genJumpInOldSpace: (in category 'compile abstract instructions') ----- + genJumpInOldSpace: reg + "Jump if reg is old." + <inline: true> + ^cogit + MoveAw: objectMemory youngStartAddress R: TempReg; + CmpR: TempReg R: reg; "N.B. FLAGS := destReg - scratchReg" + JumpBelow: 0! Item was changed: ----- Method: Cogit class>>generatorTableFrom: (in category 'class initialization') ----- generatorTableFrom: anArray | blockCreationBytecodeSize | generatorTable := CArrayAccessor on: (Array new: 256). anArray do: [:tuple| | descriptor | (descriptor := CogBytecodeDescriptor new) numBytes: tuple first; generator: tuple fourth; isReturn: (tuple includes: #return); isMapped: ((tuple includes: #isMappedIfImmutability) ifTrue: [self bindingOf: #IMMUTABILITY] ifFalse: [tuple includes: #isMapped]); isMappedInBlock: (tuple includes: #isMappedInBlock); isBlockCreation: (tuple includes: #block); spanFunction: (((tuple includes: #block) or: [(tuple includes: #branch)]) ifTrue: [tuple detect: [:thing| thing isSymbol and: [thing numArgs = 4]]]); isBranchTrue: (tuple includes: #isBranchTrue); isBranchFalse: (tuple includes: #isBranchFalse); isExtension: (tuple includes: #extension); isInstVarRef: (tuple includes: #isInstVarRef); "for Spur" + isInstVarStore: (tuple includes: #isInstVarStore); "for Spur" hasIRC: (tuple includes: #hasIRC); "for Newspeak" yourself. "As a hack to cut down on descriptor flags, use opcode to tag unusedBytecode for scanning. Currently descriptors are exactly 16 bytes with all 8 flag bits used (in Newspeak at least 17 bytes, 9 flag bits). As another hack to eliminate a test in scanMethod mark unknowns as extensions." descriptor generator == #unknownBytecode ifTrue: [descriptor opcode: Nop; isExtension: true]. descriptor isBlockCreation ifTrue: [blockCreationBytecodeSize ifNil: [blockCreationBytecodeSize := descriptor numBytes] ifNotNil: [self assert: blockCreationBytecodeSize = descriptor numBytes]]. tuple do: [:thing| thing isSymbol ifTrue: [(thing beginsWith: #needsFrame) ifTrue: [descriptor needsFrameFunction: thing]. (CogRTLOpcodes classPool at: thing ifAbsent: []) ifNotNil: [:opcode| descriptor opcode: opcode]]]. tuple last isInteger ifTrue: [descriptor stackDelta: tuple last] ifFalse: [descriptor needsFrameFunction ifNotNil: [self error: 'frameless block bytecodes must specify a stack delta']]. tuple second to: tuple third do: [:index| generatorTable at: index put: descriptor]]. BlockCreationBytecodeSize := blockCreationBytecodeSize. ^generatorTable! Item was added: + ----- Method: RegisterAllocatingCogit>>maybeCountFixup (in category 'compile abstract instructions') ----- + maybeCountFixup + <inline: true> + numFixups := numFixups + 1! Item was added: + ----- Method: RegisterAllocatingCogit>>maybeInitNumFixups (in category 'compile abstract instructions') ----- + maybeInitNumFixups + <inline: true> + numFixups := 0! Item was removed: - ----- Method: RegisterAllocatingCogit>>scanMethod (in category 'compile abstract instructions') ----- - scanMethod - "Overrides to count the number of fixups." - "Scan the method (and all embedded blocks) to determine - - what the last bytecode is; extra bytes at the end of a method are used to encode things like source pointers or temp names - - if the method needs a frame or not - - what are the targets of any backward branches. - - how many blocks it creates - Answer the block count or on error a negative error code" - | latestContinuation nExts descriptor pc numBlocks distance targetPC framelessStackDelta | - <var: #descriptor type: #'BytecodeDescriptor *'> - needsFrame := false. - numFixups := 0. - prevBCDescriptor := nil. - self - cppIf: IMMUTABILITY - ifTrue: [needsTwoPath := false]. - NewspeakVM ifTrue: - [numIRCs := 0]. - (primitiveIndex > 0 - and: [coInterpreter isQuickPrimitiveIndex: primitiveIndex]) ifTrue: - [^0]. - pc := latestContinuation := initialPC. - numBlocks := framelessStackDelta := nExts := extA := extB := 0. - [pc <= endPC] whileTrue: - [byte0 := (objectMemory fetchByte: pc ofObject: methodObj) + bytecodeSetOffset. - descriptor := self generatorAt: byte0. - descriptor isExtension ifTrue: - [descriptor opcode = Nop ifTrue: "unknown bytecode tag; see Cogit class>>#generatorTableFrom:" - [^EncounteredUnknownBytecode]. - self loadSubsequentBytesForDescriptor: descriptor at: pc. - self perform: descriptor generator]. - (descriptor isReturn - and: [pc >= latestContinuation]) ifTrue: - [endPC := pc]. - self - cppIf: IMMUTABILITY - ifTrue: [(needsFrame and: [needsTwoPath not]) - ifFalse: [(descriptor needsFrameFunction isNil - or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) - ifTrue: [needsFrame := true. - needsTwoPath := descriptor generator == #genStoreAndPopReceiverVariableBytecode] - ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta]]] - ifFalse: [needsFrame - ifFalse: [(descriptor needsFrameFunction isNil - or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) - ifTrue: [needsFrame := true] - ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta]]]. - descriptor isBranch ifTrue: - [distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. - targetPC := pc + descriptor numBytes + distance. - (self isBackwardBranch: descriptor at: pc exts: nExts in: methodObj) - ifTrue: [self initializeFixupAt: targetPC - initialPC] - ifFalse: - [latestContinuation := latestContinuation max: targetPC. - numFixups := numFixups + 1]]. - descriptor isBlockCreation ifTrue: - [numBlocks := numBlocks + 1. - distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. - targetPC := pc + descriptor numBytes + distance. - latestContinuation := latestContinuation max: targetPC. - numFixups := numFixups + 1]. - NewspeakVM ifTrue: - [descriptor hasIRC ifTrue: - [numIRCs := numIRCs + 1]]. - pc := pc + descriptor numBytes. - descriptor isExtension - ifTrue: [nExts := nExts + 1] - ifFalse: [nExts := extA := extB := 0]. - prevBCDescriptor := descriptor]. - ^numBlocks! Item was added: + ----- Method: SistaCogit>>maybeCountCounter (in category 'compile abstract instructions') ----- + maybeCountCounter + <inline: true> + numCounters := numCounters + 1! Item was added: + ----- Method: SistaCogit>>maybeInitNumCounters (in category 'compile abstract instructions') ----- + maybeInitNumCounters + <inline: true> + numCounters := 0! Item was removed: - ----- Method: SistaCogit>>scanMethod (in category 'compile abstract instructions') ----- - scanMethod - "Scan the method (and all embedded blocks) to determine - - what the last bytecode is; extra bytes at the end of a method are used to encode things like source pointers or temp names - - if the method needs a frame or not - - what are the targets of any backward branches. - - how many blocks it creates - - how many counters it needs/conditional branches it contains - Answer the block count or on error a negative error code" - | latestContinuation nExts descriptor pc numBlocks distance targetPC framelessStackDelta numFixups | - <var: #descriptor type: #'BytecodeDescriptor *'> - self flag: 'numFixup should be reverted to inst var when moving back sistaCogit as subclass of RegisterAllocatingCogit'. - needsFrame := false. - numFixups := 0. - prevBCDescriptor := nil. - numCounters := 0. - self - cppIf: IMMUTABILITY - ifTrue: [needsTwoPath := false]. - NewspeakVM ifTrue: - [numIRCs := 0]. - (primitiveIndex > 0 - and: [coInterpreter isQuickPrimitiveIndex: primitiveIndex]) ifTrue: - [^0]. - pc := latestContinuation := initialPC. - numBlocks := framelessStackDelta := nExts := extA := extB := 0. - [pc <= endPC] whileTrue: - [byte0 := (objectMemory fetchByte: pc ofObject: methodObj) + bytecodeSetOffset. - descriptor := self generatorAt: byte0. - descriptor isExtension ifTrue: - [descriptor opcode = Nop ifTrue: "unknown bytecode tag; see Cogit class>>#generatorTableFrom:" - [^EncounteredUnknownBytecode]. - self loadSubsequentBytesForDescriptor: descriptor at: pc. - self perform: descriptor generator]. - (descriptor isReturn - and: [pc >= latestContinuation]) ifTrue: - [endPC := pc]. - self - cppIf: IMMUTABILITY - ifTrue: [(needsFrame and: [needsTwoPath not]) - ifFalse: [(descriptor needsFrameFunction isNil - or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) - ifTrue: [needsFrame := true. - needsTwoPath := descriptor generator == #genStoreAndPopReceiverVariableBytecode] - ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta]]] - ifFalse: [needsFrame - ifFalse: [(descriptor needsFrameFunction isNil - or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) - ifTrue: [needsFrame := true] - ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta]]]. - descriptor isBranch ifTrue: - [distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. - targetPC := pc + descriptor numBytes + distance. - (self isBackwardBranch: descriptor at: pc exts: nExts in: methodObj) - ifTrue: [self initializeFixupAt: targetPC - initialPC] - ifFalse: - [latestContinuation := latestContinuation max: targetPC. - numFixups := numFixups + 1. - (descriptor isBranchTrue or: [descriptor isBranchFalse]) ifTrue: - [numCounters := numCounters + 1]]]. - descriptor isBlockCreation ifTrue: - [numBlocks := numBlocks + 1. - distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. - targetPC := pc + descriptor numBytes + distance. - latestContinuation := latestContinuation max: targetPC. - numFixups := numFixups + 1]. - NewspeakVM ifTrue: - [descriptor hasIRC ifTrue: - [numIRCs := numIRCs + 1]]. - pc := pc + descriptor numBytes. - descriptor isExtension - ifTrue: [nExts := nExts + 1] - ifFalse: [nExts := extA := extB := 0]. - prevBCDescriptor := descriptor]. - ^numBlocks! Item was changed: SimpleStackBasedCogit subclass: #StackToRegisterMappingCogit + instanceVariableNames: 'prevBCDescriptor numPushNilsFunction pushNilSizeFunction methodOrBlockNumTemps regArgsHaveBeenPushed simSelf simStack simStackPtr simSpillBase optStatus ceCallCogCodePopReceiverArg0Regs ceCallCogCodePopReceiverArg1Arg0Regs methodAbortTrampolines picAbortTrampolines picMissTrampolines ceCall0ArgsPIC ceCall1ArgsPIC ceCall2ArgsPIC debugStackPointers debugFixupBreaks realCECallCogCodePopReceiverArg0Regs realCECallCogCodePopReceiverArg1Arg0Regs deadCode useTwoPaths' - instanceVariableNames: 'prevBCDescriptor numPushNilsFunction pushNilSizeFunction methodOrBlockNumTemps regArgsHaveBeenPushed simSelf simStack simStackPtr simSpillBase optStatus ceCallCogCodePopReceiverArg0Regs ceCallCogCodePopReceiverArg1Arg0Regs methodAbortTrampolines picAbortTrampolines picMissTrampolines ceCall0ArgsPIC ceCall1ArgsPIC ceCall2ArgsPIC debugStackPointers debugFixupBreaks realCECallCogCodePopReceiverArg0Regs realCECallCogCodePopReceiverArg1Arg0Regs deadCode needsTwoPath' classVariableNames: 'NeedsMergeFixupFlag NeedsNonMergeFixupFlag' poolDictionaries: 'CogCompilationConstants VMMethodCacheConstants VMObjectIndices VMStackFrameOffsets' category: 'VMMaker-JIT'! StackToRegisterMappingCogit class instanceVariableNames: 'numPushNilsFunction pushNilSizeFunction'! + !StackToRegisterMappingCogit commentStamp: 'eem 6/1/2016 14:50' prior: 0! - !StackToRegisterMappingCogit commentStamp: 'eem 12/19/2010 18:12' prior: 0! StackToRegisterMappingCogit is an optimizing code generator that eliminates a lot of stack operations and inlines some special selector arithmetic. It does so by a simple stack-to-register mapping scheme based on deferring the generation of code to produce operands until operand-consuming operations. The operations that consume operands are sends, stores and returns. See methods in the class-side documentation protocol for more detail. Instance Variables callerSavedRegMask: <Integer> ceEnter0ArgsPIC: <Integer> ceEnter1ArgsPIC: <Integer> ceEnter2ArgsPIC: <Integer> ceEnterCogCodePopReceiverArg0Regs: <Integer> ceEnterCogCodePopReceiverArg1Arg0Regs: <Integer> debugBytecodePointers: <Set of Integer> debugFixupBreaks: <Set of Integer> debugStackPointers: <CArrayAccessor of (Integer|nil)> methodAbortTrampolines: <CArrayAccessor of Integer> methodOrBlockNumTemps: <Integer> optStatus: <Integer> picAbortTrampolines: <CArrayAccessor of Integer> picMissTrampolines: <CArrayAccessor of Integer> realCEEnterCogCodePopReceiverArg0Regs: <Integer> realCEEnterCogCodePopReceiverArg1Arg0Regs: <Integer> regArgsHaveBeenPushed: <Boolean> simSelf: <CogSimStackEntry> simSpillBase: <Integer> simStack: <CArrayAccessor of CogSimStackEntry> simStackPtr: <Integer> traceSimStack: <Integer> + useTwoPaths <Boolean> callerSavedRegMask - the bitmask of the ABI's caller-saved registers ceEnter0ArgsPIC ceEnter1ArgsPIC ceEnter2ArgsPIC - the trampoline for entering an N-arg PIC ceEnterCogCodePopReceiverArg0Regs ceEnterCogCodePopReceiverArg1Arg0Regs - teh trampoline for entering a method with N register args debugBytecodePointers - a Set of bytecode pcs for setting breakpoints (simulation only) debugFixupBreaks - a Set of fixup indices for setting breakpoints (simulation only) debugStackPointers - an Array of stack depths for each bytecode for code verification methodAbortTrampolines - a CArrayAccessor of abort trampolines for 0, 1, 2 and N args methodOrBlockNumTemps - the number of method or block temps (including args) in the current compilation unit (method or block) optStatus - the variable used to track the status of ReceiverResultReg for avoiding reloading that register with self between adjacent inst var accesses picAbortTrampolines - a CArrayAccessor of abort trampolines for 0, 1, 2 and N args picMissTrampolines - a CArrayAccessor of abort trampolines for 0, 1, 2 and N args realCEEnterCogCodePopReceiverArg0Regs realCEEnterCogCodePopReceiverArg1Arg0Regs - the real trampolines for ebtering machine code with N reg args when in the Debug regime regArgsHaveBeenPushed - whether the register args have been pushed before frame build (e.g. when an interpreter primitive is called) simSelf - the simulation stack entry representing self in the current compilation unit simSpillBase - the variable tracking how much of the simulation stack has been spilled to the real stack simStack - the simulation stack itself simStackPtr - the pointer to the top of the simulation stack + + useTwoPaths + - a variable controlling whether to create two paths through a method based on the existence of inst var stores. With immutability this causes a frameless path to be generated if an otherwise frameless method is frameful simply because of inst var stores. In this case the test to take the first frameless path is if the receiver is not immutable. Without immutability, if a frameless method contains two or more inst var stores, the first path will be code with no store check, chosen by a single check for the receiver being in new space. ! StackToRegisterMappingCogit class instanceVariableNames: 'numPushNilsFunction pushNilSizeFunction'! Item was changed: ----- Method: StackToRegisterMappingCogit class>>initializeBytecodeTableForNewspeakV4 (in category 'class initialization') ----- initializeBytecodeTableForNewspeakV4 "StackToRegisterMappingCogit initializeBytecodeTableForNewspeakV4" numPushNilsFunction := #v4:Num:Push:Nils:. pushNilSizeFunction := #v4PushNilSize:numInitialNils:. NSSendIsPCAnnotated := true. "IsNSSendCall used by SendAbsentImplicit" FirstSpecialSelector := 80. NumSpecialSelectors := 32. self flag: 'Special selector send class must be inlined to agree with the interpreter, which inlines class. If class is sent to e.g. a general instance of ProtoObject then unless class is inlined there will be an MNU. It must be that the Cointerpreter and Cogit have identical semantics. We get away with not hardwiring the other special selectors either because in the Cointerpreter they are not inlined or because they are inlined only to instances of classes for which there will always be a method.'. self generatorTableFrom: #( "1 byte bytecodes" (1 0 15 genPushReceiverVariableBytecode isInstVarRef needsFrameNever: 1) (1 16 31 genPushLiteralVariable16CasesBytecode needsFrameNever: 1) (1 32 63 genPushLiteralConstantBytecode needsFrameNever: 1) (1 64 75 genPushTemporaryVariableBytecode needsFrameIfMod16GENumArgs: 1) (1 76 76 genPushReceiverBytecode needsFrameNever: 1) (1 77 77 genExtPushPseudoVariableOrOuterBytecode needsFrameIfExtBGT2: 1) (1 78 78 genPushConstantZeroBytecode needsFrameNever: 1) (1 79 79 genPushConstantOneBytecode needsFrameNever: 1) (1 80 80 genSpecialSelectorArithmetic isMapped AddRR) (1 81 81 genSpecialSelectorArithmetic isMapped SubRR) (1 82 82 genSpecialSelectorComparison isMapped JumpLess) (1 83 83 genSpecialSelectorComparison isMapped JumpGreater) (1 84 84 genSpecialSelectorComparison isMapped JumpLessOrEqual) (1 85 85 genSpecialSelectorComparison isMapped JumpGreaterOrEqual) (1 86 86 genSpecialSelectorComparison isMapped JumpZero) (1 87 87 genSpecialSelectorComparison isMapped JumpNonZero) (1 88 93 genSpecialSelectorSend isMapped) " #* #/ #\\ #@ #bitShift: //" (1 94 94 genSpecialSelectorArithmetic isMapped AndRR) (1 95 95 genSpecialSelectorArithmetic isMapped OrRR) (1 96 101 genSpecialSelectorSend isMapped) "#at: #at:put: #size #next #nextPut: #atEnd" (1 102 102 genSpecialSelectorEqualsEquals needsFrameNever: notMapped -1) "not mapped because it is directly inlined (for now)" (1 103 103 genSpecialSelectorClass needsFrameIfStackGreaterThanOne: notMapped 0) "not mapped because it is directly inlined (for now)" (1 104 111 genSpecialSelectorSend isMapped) "#blockCopy: #value #value: #do: #new #new: #x #y" (1 112 127 genSendLiteralSelector0ArgsBytecode isMapped) (1 128 143 genSendLiteralSelector1ArgBytecode isMapped) (1 144 159 genSendLiteralSelector2ArgsBytecode isMapped) (1 160 175 genSendAbsentImplicit0ArgsBytecode isMapped hasIRC) + (1 176 183 genStoreAndPopReceiverVariableBytecode isInstVarRef isInstVarStore isMappedIfImmutability needsFrameIfImmutability: -1) - (1 176 183 genStoreAndPopReceiverVariableBytecode isInstVarRef isMappedIfImmutability needsFrameIfImmutability: -1) (1 184 191 genStoreAndPopTemporaryVariableBytecode) (1 192 199 genShortUnconditionalJump branch v3:ShortForward:Branch:Distance:) (1 200 207 genShortJumpIfTrue branch isBranchTrue isMapped "because of mustBeBoolean" v3:ShortForward:Branch:Distance:) (1 208 215 genShortJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean" v3:ShortForward:Branch:Distance:) (1 216 216 genReturnReceiver return needsFrameIfInBlock: isMappedInBlock 0) (1 217 217 genReturnTopFromMethod return needsFrameIfInBlock: isMappedInBlock -1) (1 218 218 genExtReturnTopFromBlock return needsFrameNever: -1) (1 219 219 duplicateTopBytecode needsFrameNever: 1) (1 220 220 genPopStackBytecode needsFrameNever: -1) (1 221 221 genExtNopBytecode needsFrameNever: 0) (1 222 223 unknownBytecode) "2 byte bytecodes" (2 224 224 extABytecode extension needsFrameNever: 0) (2 225 225 extBBytecode extension needsFrameNever: 0) (2 226 226 genExtPushReceiverVariableBytecode isInstVarRef) (2 227 227 genExtPushLiteralVariableBytecode needsFrameNever: 1) (2 228 228 genExtPushLiteralBytecode needsFrameNever: 1) (2 229 229 genExtPushIntegerBytecode needsFrameNever: 1) (2 230 230 genLongPushTemporaryVariableBytecode) (2 231 231 genPushNewArrayBytecode) + (2 232 232 genExtStoreReceiverVariableBytecode isInstVarRef isInstVarStore isMappedIfImmutability) - (2 232 232 genExtStoreReceiverVariableBytecode isInstVarRef isMappedIfImmutability) (2 233 233 genExtStoreLiteralVariableBytecode isMappedIfImmutability) (2 234 234 genLongStoreTemporaryVariableBytecode) + (2 235 235 genExtStoreAndPopReceiverVariableBytecode isInstVarRef isInstVarStore isMappedIfImmutability) - (2 235 235 genExtStoreAndPopReceiverVariableBytecode isInstVarRef isMappedIfImmutability) (2 236 236 genExtStoreAndPopLiteralVariableBytecode isMappedIfImmutability) (2 237 237 genLongStoreAndPopTemporaryVariableBytecode) (2 238 238 genExtSendBytecode isMapped) (2 239 239 genExtSendSuperBytecode isMapped) (2 240 240 genExtSendAbsentImplicitBytecode isMapped hasIRC) (2 241 241 genExtSendAbsentDynamicSuperBytecode isMapped hasIRC) (2 242 242 genExtUnconditionalJump branch isMapped "because of interrupt check" v4:Long:Branch:Distance:) (2 243 243 genExtJumpIfTrue branch isBranchTrue isMapped "because of mustBeBoolean" v4:Long:Branch:Distance:) (2 244 244 genExtJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean" v4:Long:Branch:Distance:) (2 245 245 genExtSendAbsentSelfBytecode isMapped hasIRC) (2 246 248 unknownBytecode) "3 byte bytecodes" (3 249 249 genCallPrimitiveBytecode) (3 250 250 genPushRemoteTempLongBytecode) (3 251 251 genStoreRemoteTempLongBytecode) (3 252 252 genStoreAndPopRemoteTempLongBytecode) (3 253 253 genExtPushClosureBytecode block v4:Block:Code:Size:) (3 254 254 genExtSendAbsentOuterBytecode isMapped hasIRC) (3 255 255 unknownBytecode))! Item was changed: ----- Method: StackToRegisterMappingCogit class>>initializeBytecodeTableForSistaV1 (in category 'class initialization') ----- initializeBytecodeTableForSistaV1 "StackToRegisterMappingCogit initializeBytecodeTableForSistaV1" numPushNilsFunction := #sistaV1:Num:Push:Nils:. pushNilSizeFunction := #sistaV1PushNilSize:numInitialNils:. BytecodeSetHasDirectedSuperSend := true. FirstSpecialSelector := 96. NumSpecialSelectors := 32. self flag: 'Special selector send class must be inlined to agree with the interpreter, which inlines class. If class is sent to e.g. a general instance of ProtoObject then unless class is inlined there will be an MNU. It must be that the Cointerpreter and Cogit have identical semantics. We get away with not hardwiring the other special selectors either because in the Cointerpreter they are not inlined or because they are inlined only to instances of classes for which there will always be a method.'. self generatorTableFrom: #( "1 byte bytecodes" "pushes" (1 0 15 genPushReceiverVariableBytecode isInstVarRef needsFrameNever: 1) (1 16 31 genPushLitVarDirSup16CasesBytecode needsFrameNever: 1) (1 32 63 genPushLiteralConstantBytecode needsFrameNever: 1) (1 64 75 genPushTemporaryVariableBytecode needsFrameIfMod16GENumArgs: 1) (1 76 76 genPushReceiverBytecode needsFrameNever: 1) (1 77 77 genPushConstantTrueBytecode needsFrameNever: 1) (1 78 78 genPushConstantFalseBytecode needsFrameNever: 1) (1 79 79 genPushConstantNilBytecode needsFrameNever: 1) (1 80 80 genPushConstantZeroBytecode needsFrameNever: 1) (1 81 81 genPushConstantOneBytecode needsFrameNever: 1) (1 82 82 genExtPushPseudoVariable) (1 83 83 duplicateTopBytecode needsFrameNever: 1) (1 84 87 unknownBytecode) "returns" (1 88 88 genReturnReceiver return needsFrameIfInBlock: isMappedInBlock 0) (1 89 89 genReturnTrue return needsFrameIfInBlock: isMappedInBlock 0) (1 90 90 genReturnFalse return needsFrameIfInBlock: isMappedInBlock 0) (1 91 91 genReturnNil return needsFrameIfInBlock: isMappedInBlock 0) (1 92 92 genReturnTopFromMethod return needsFrameIfInBlock: isMappedInBlock -1) (1 93 93 genReturnNilFromBlock return needsFrameNever: -1) (1 94 94 genReturnTopFromBlock return needsFrameNever: -1) (1 95 95 genExtNopBytecode needsFrameNever: 0) "sends" (1 96 96 genSpecialSelectorArithmetic isMapped AddRR) (1 97 97 genSpecialSelectorArithmetic isMapped SubRR) (1 98 98 genSpecialSelectorComparison isMapped JumpLess) (1 99 99 genSpecialSelectorComparison isMapped JumpGreater) (1 100 100 genSpecialSelectorComparison isMapped JumpLessOrEqual) (1 101 101 genSpecialSelectorComparison isMapped JumpGreaterOrEqual) (1 102 102 genSpecialSelectorComparison isMapped JumpZero) (1 103 103 genSpecialSelectorComparison isMapped JumpNonZero) (1 104 109 genSpecialSelectorSend isMapped) " #* #/ #\\ #@ #bitShift: //" (1 110 110 genSpecialSelectorArithmetic isMapped AndRR) (1 111 111 genSpecialSelectorArithmetic isMapped OrRR) (1 112 117 genSpecialSelectorSend isMapped) "#at: #at:put: #size #next #nextPut: #atEnd" (1 118 118 genSpecialSelectorEqualsEquals needsFrameNever: notMapped -1) "not mapped because it is directly inlined (for now)" (1 119 119 genSpecialSelectorClass needsFrameIfStackGreaterThanOne: notMapped 0) "not mapped because it is directly inlined (for now)" (1 120 127 genSpecialSelectorSend isMapped) "#blockCopy: #value #value: #do: #new #new: #x #y" (1 128 143 genSendLiteralSelector0ArgsBytecode isMapped) (1 144 159 genSendLiteralSelector1ArgBytecode isMapped) (1 160 175 genSendLiteralSelector2ArgsBytecode isMapped) "jumps" (1 176 183 genShortUnconditionalJump branch v3:ShortForward:Branch:Distance:) (1 184 191 genShortJumpIfTrue branch isBranchTrue isMapped "because of mustBeBoolean" v3:ShortForward:Branch:Distance:) (1 192 199 genShortJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean" v3:ShortForward:Branch:Distance:) + (1 200 207 genStoreAndPopReceiverVariableBytecode isInstVarRef isInstVarStore isMappedIfImmutability needsFrameIfImmutability: -1) - (1 200 207 genStoreAndPopReceiverVariableBytecode isInstVarRef isMappedIfImmutability needsFrameIfImmutability: -1) (1 208 215 genStoreAndPopTemporaryVariableBytecode) (1 216 216 genPopStackBytecode needsFrameNever: -1) (1 217 217 genUnconditionalTrapBytecode isMapped) (1 218 223 unknownBytecode) "2 byte bytecodes" (2 224 224 extABytecode extension) (2 225 225 extBBytecode extension) "pushes" (2 226 226 genExtPushReceiverVariableBytecode isInstVarRef) "Needs a frame for context inst var access" (2 227 227 genExtPushLitVarDirSupBytecode needsFrameNever: 1) (2 228 228 genExtPushLiteralBytecode needsFrameNever: 1) (2 229 229 genLongPushTemporaryVariableBytecode) (2 230 230 genPushClosureTempsBytecode) (2 231 231 genPushNewArrayBytecode) (2 232 232 genExtPushIntegerBytecode needsFrameNever: 1) (2 233 233 genExtPushCharacterBytecode needsFrameNever: 1) "returns" "sends" (2 234 234 genExtSendBytecode isMapped) (2 235 235 genExtSendSuperBytecode isMapped) "sista bytecodes" (2 236 236 unknownBytecode) "jumps" (2 237 237 genExtUnconditionalJump branch isMapped "because of interrupt check" v4:Long:Branch:Distance:) (2 238 238 genExtJumpIfTrue branch isBranchTrue isMapped "because of mustBeBoolean" v4:Long:Branch:Distance:) (2 239 239 genExtJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean" v4:Long:Branch:Distance:) "stores" + (2 240 240 genSistaExtStoreAndPopReceiverVariableBytecode isInstVarRef isInstVarStore isMappedIfImmutability) - (2 240 240 genSistaExtStoreAndPopReceiverVariableBytecode isInstVarRef isMappedIfImmutability) (2 241 241 genSistaExtStoreAndPopLiteralVariableBytecode isMappedIfImmutability) (2 242 242 genLongStoreAndPopTemporaryVariableBytecode) + (2 243 243 genSistaExtStoreReceiverVariableBytecode isInstVarRef isInstVarStore isMappedIfImmutability) - (2 243 243 genSistaExtStoreReceiverVariableBytecode isInstVarRef isMappedIfImmutability) (2 244 244 genSistaExtStoreLiteralVariableBytecode isMappedIfImmutability) (2 245 245 genLongStoreTemporaryVariableBytecode) (2 246 247 unknownBytecode) "3 byte bytecodes" (3 248 248 genCallPrimitiveBytecode) (3 249 249 unknownBytecode) "reserved for Push Float" (3 250 250 genExtPushClosureBytecode block v4:Block:Code:Size:) (3 251 251 genExtPushRemoteTempOrInstVarLongBytecode) (3 252 252 genExtStoreRemoteTempOrInstVarLongBytecode isMappedIfImmutability) (3 253 253 genExtStoreAndPopRemoteTempOrInstVarLongBytecode isMappedIfImmutability) (3 254 254 genExtJumpIfNotInstanceOfBehaviorsOrPopBytecode branch v4:Long:BranchIfNotInstanceOf:Distance:) (3 255 255 genExtPushFullClosureBytecode))! Item was changed: ----- Method: StackToRegisterMappingCogit class>>initializeBytecodeTableForSqueakV3PlusClosures (in category 'class initialization') ----- initializeBytecodeTableForSqueakV3PlusClosures "StackToRegisterMappingCogit initializeBytecodeTableForSqueakV3PlusClosures" numPushNilsFunction := #v3:Num:Push:Nils:. pushNilSizeFunction := #v3PushNilSize:numInitialNils:. FirstSpecialSelector := 176. NumSpecialSelectors := 32. self flag: 'Special selector send class must be inlined to agree with the interpreter, which inlines class. If class is sent to e.g. a general instance of ProtoObject then unless class is inlined there will be an MNU. It must be that the Cointerpreter and Cogit have identical semantics. We get away with not hardwiring the other special selectors either because in the Cointerpreter they are not inlined or because they are inlined only to instances of classes for which there will always be a method.'. self generatorTableFrom: #( (1 0 15 genPushReceiverVariableBytecode isInstVarRef needsFrameNever: 1) (1 16 31 genPushTemporaryVariableBytecode needsFrameIfMod16GENumArgs: 1) (1 32 63 genPushLiteralConstantBytecode needsFrameNever: 1) (1 64 95 genPushLiteralVariableBytecode needsFrameNever: 1) + (1 96 103 genStoreAndPopReceiverVariableBytecode isInstVarRef isInstVarStore isMappedIfImmutability needsFrameIfImmutability: -1) - (1 96 103 genStoreAndPopReceiverVariableBytecode isInstVarRef isMappedIfImmutability needsFrameIfImmutability: -1) (1 104 111 genStoreAndPopTemporaryVariableBytecode) (1 112 112 genPushReceiverBytecode needsFrameNever: 1) (1 113 113 genPushConstantTrueBytecode needsFrameNever: 1) (1 114 114 genPushConstantFalseBytecode needsFrameNever: 1) (1 115 115 genPushConstantNilBytecode needsFrameNever: 1) (1 116 119 genPushQuickIntegerConstantBytecode needsFrameNever: 1) "method returns in blocks need a frame because of nonlocalReturn:through:" (1 120 120 genReturnReceiver return needsFrameIfInBlock: isMappedInBlock 0) (1 121 121 genReturnTrue return needsFrameIfInBlock: isMappedInBlock 0) (1 122 122 genReturnFalse return needsFrameIfInBlock: isMappedInBlock 0) (1 123 123 genReturnNil return needsFrameIfInBlock: isMappedInBlock 0) (1 124 124 genReturnTopFromMethod return needsFrameIfInBlock: isMappedInBlock -1) (1 125 125 genReturnTopFromBlock return needsFrameNever: -1) (1 126 127 unknownBytecode) (2 128 128 extendedPushBytecode isInstVarRef) "well, maybe inst var ref" (2 129 129 extendedStoreBytecode isInstVarRef isMappedIfImmutability) "well, maybe inst var ref" (2 130 130 extendedStoreAndPopBytecode isInstVarRef isMappedIfImmutability) "well, maybe inst var ref" (2 131 131 genExtendedSendBytecode isMapped) (3 132 132 doubleExtendedDoAnythingBytecode isMapped) "well, maybe inst var ref" (2 133 133 genExtendedSuperBytecode isInstVarRef isMapped) (2 134 134 genSecondExtendedSendBytecode isMapped) (1 135 135 genPopStackBytecode needsFrameNever: -1) (1 136 136 duplicateTopBytecode needsFrameNever: 1) (1 137 137 genPushActiveContextBytecode) (2 138 138 genPushNewArrayBytecode)), ((initializationOptions at: #SpurObjectMemory ifAbsent: [false]) ifTrue: [#((3 139 139 genCallPrimitiveBytecode))] ifFalse: [#((1 139 139 unknownBytecode))]), #( (3 140 140 genPushRemoteTempLongBytecode) (3 141 141 genStoreRemoteTempLongBytecode) (3 142 142 genStoreAndPopRemoteTempLongBytecode) (4 143 143 genPushClosureCopyCopiedValuesBytecode block v3:Block:Code:Size:) (1 144 151 genShortUnconditionalJump branch v3:ShortForward:Branch:Distance:) (1 152 159 genShortJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean" v3:ShortForward:Branch:Distance:) (2 160 163 genLongUnconditionalBackwardJump branch isMapped "because of interrupt check" v3:Long:Branch:Distance:) (2 164 167 genLongUnconditionalForwardJump branch v3:Long:Branch:Distance:) (2 168 171 genLongJumpIfTrue branch isBranchTrue isMapped "because of mustBeBoolean" v3:LongForward:Branch:Distance:) (2 172 175 genLongJumpIfFalse branch isBranchFalse isMapped "because of mustBeBoolean" v3:LongForward:Branch:Distance:) (1 176 176 genSpecialSelectorArithmetic isMapped AddRR) (1 177 177 genSpecialSelectorArithmetic isMapped SubRR) (1 178 178 genSpecialSelectorComparison isMapped JumpLess) (1 179 179 genSpecialSelectorComparison isMapped JumpGreater) (1 180 180 genSpecialSelectorComparison isMapped JumpLessOrEqual) (1 181 181 genSpecialSelectorComparison isMapped JumpGreaterOrEqual) (1 182 182 genSpecialSelectorComparison isMapped JumpZero) (1 183 183 genSpecialSelectorComparison isMapped JumpNonZero) (1 184 189 genSpecialSelectorSend isMapped) " #* #/ #\\ #@ #bitShift: //" (1 190 190 genSpecialSelectorArithmetic isMapped AndRR) (1 191 191 genSpecialSelectorArithmetic isMapped OrRR) (1 192 197 genSpecialSelectorSend isMapped) "#at: #at:put: #size #next #nextPut: #atEnd" (1 198 198 genSpecialSelectorEqualsEquals needsFrameNever: notMapped -1) "not mapped because it is directly inlined (for now)" (1 199 199 genSpecialSelectorClass needsFrameIfStackGreaterThanOne: notMapped 0) "not mapped because it is directly inlined (for now)" (1 200 207 genSpecialSelectorSend isMapped) "#blockCopy: #value #value: #do: #new #new: #x #y" (1 208 223 genSendLiteralSelector0ArgsBytecode isMapped) (1 224 239 genSendLiteralSelector1ArgBytecode isMapped) (1 240 255 genSendLiteralSelector2ArgsBytecode isMapped))! Item was changed: ----- Method: StackToRegisterMappingCogit>>compileFrameBuild (in category 'compile abstract instructions') ----- compileFrameBuild "Build a frame for a CogMethod activation. See CoInterpreter class>>initializeFrameIndices. Override to push the register receiver and register arguments, if any." self cppIf: IMMUTABILITY ifTrue: + [useTwoPaths ifTrue: - [needsTwoPath ifTrue: [self compileTwoPathFrameBuild. ^self]]. needsFrame ifFalse: + [useTwoPaths ifTrue: + [self compileTwoPathFramelessInit]. + self initSimStackForFramelessMethod: initialPC. - [self initSimStackForFramelessMethod: initialPC. ^self]. self genPushRegisterArgs. super compileFrameBuild. self initSimStackForFramefulMethod: initialPC! Item was changed: ----- Method: StackToRegisterMappingCogit>>compileTwoPathFrameBuild (in category 'compile abstract instructions') ----- compileTwoPathFrameBuild - <option: #IMMUTABILITY> "We are in a method where the frame is needed *only* for instance variable store, typically a setter method. This case has 20% overhead with Immutability compared to setter without immutability because of the stack frame creation. We compile two path, one where the object is immutable, one where it isn't. At the beginning of the frame build, we take one path or the other depending on the receiver mutability. Note: this specific case happens only where there are only instance variabel stores. We could do something similar for literal variable stores, but we don't as it's too uncommon." + <option: #IMMUTABILITY> + | jumpImmutable | - |jumpImmutable| self assert: needsFrame. + self assert: useTwoPaths. - self assert: IMMUTABILITY. - self assert: needsTwoPath. self assert: blockCount = 0. jumpImmutable := objectRepresentation genJumpImmutable: ReceiverResultReg scratchReg: TempReg. "first path. The receiver is mutable" + needsFrame := false. self initSimStackForFramelessMethod: initialPC. self compileMethodBody. "second path. The receiver is mutable" + useTwoPaths := false. "reset because it impacts inst var store compilation" + needsFrame := true. - needsTwoPath := false. "reset because it impact inst var store compilation" jumpImmutable jmpTarget: self Label. self genPushRegisterArgs. super compileFrameBuild. self initSimStackForFramefulMethod: initialPC! Item was added: + ----- Method: StackToRegisterMappingCogit>>compileTwoPathFramelessInit (in category 'compile abstract instructions') ----- + compileTwoPathFramelessInit + "We are in a frameless method with at least two inst var stores. We compile two paths, + one where the object is in new space, and one where it isn't. At the beginning + of the method, we take one path or the other depending on the receiver being in newSpace." + | jumpOld | + self deny: IMMUTABILITY. + self deny: needsFrame. + self assert: useTwoPaths. + jumpOld := objectRepresentation genJumpInOldSpace: ReceiverResultReg. + "first path. The receiver is young" + self initSimStackForFramelessMethod: initialPC. + self compileMethodBody. + "second path. The receiver is old" + useTwoPaths := false. "reset because it impacts inst var store compilation" + jumpOld jmpTarget: self Label! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:slotIndex:destReg:needsStoreCheck:needsRestoreRcvr: (in category 'bytecode generator support') ----- genStorePop: popBoolean slotIndex: slotIndex destReg: destReg needsStoreCheck: needsStoreCheck needsRestoreRcvr: needsRestoreReceiver <inline: true> "This method expects destReg to hold the object to store into. In practice, it is almost always RcvrResultReg because it is mandatory for the various store checks. We could put any register there if no store check is needed" self cppIf: IMMUTABILITY ifTrue: + [useTwoPaths - [needsTwoPath ifTrue: [self "first path, receiver is mutable" genVanillaStorePop: popBoolean slotIndex: slotIndex destReg: destReg needsStoreCheck: needsStoreCheck] ifFalse: [self genImmCheckStorePop: popBoolean slotIndex: slotIndex destReg: destReg needsStoreCheck: needsStoreCheck needsRestoreRcvr: needsRestoreReceiver]] ifFalse: [self genVanillaStorePop: popBoolean slotIndex: slotIndex destReg: destReg needsStoreCheck: needsStoreCheck]. ! Item was changed: ----- Method: StackToRegisterMappingCogit>>genUpArrowReturn (in category 'bytecode generators') ----- genUpArrowReturn "Generate a method return from within a method or a block. Frameless method activation looks like CISCs (x86): receiver args sp-> ret pc. RISCs (ARM): receiver args ret pc in LR. A fully framed activation is described in CoInterpreter class>initializeFrameIndices. Return pops receiver and arguments off the stack. Callee pushes the result." | framelessReturn | deadCode := true. "can't fall through" inBlock ifTrue: [self assert: needsFrame. self CallRT: ceNonLocalReturnTrampoline. self annotateBytecode: self Label. ^0]. self cppIf: IMMUTABILITY + ifTrue: [framelessReturn := needsFrame and: [useTwoPaths not]] - ifTrue: [framelessReturn := needsFrame and: [needsTwoPath not]] ifFalse: [framelessReturn := needsFrame]. framelessReturn ifTrue: [self MoveR: FPReg R: SPReg. self PopR: FPReg. backEnd hasLinkRegister ifTrue: [self PopR: LinkReg]. self RetN: methodOrBlockNumArgs + 1 * objectMemory wordSize] ifFalse: [self RetN: ((methodOrBlockNumArgs > self numRegArgs "A method with an interpreter prim will push its register args for the prim. If the failure body is frameless the args must still be popped, see e.g. Behavior>>nextInstance." or: [regArgsHaveBeenPushed]) ifTrue: [methodOrBlockNumArgs + 1 * objectMemory wordSize] ifFalse: [0])]. ^0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genVanillaStorePop:slotIndex:destReg:needsStoreCheck: (in category 'bytecode generator support') ----- genVanillaStorePop: popBoolean slotIndex: slotIndex destReg: destReg needsStoreCheck: needsStoreCheck <inline: true> | topReg | + + self cppIf: IMMUTABILITY + ifTrue: [] + ifFalse: "First path, receiver is in newSpace" + [(destReg = ReceiverResultReg and: [needsFrame not and: [useTwoPaths]]) ifTrue: + [topReg := self ssStorePop: popBoolean toPreferredReg: TempReg. + self MoveR: topReg + Mw: slotIndex * objectMemory wordSize + objectMemory baseHeaderSize + r: ReceiverResultReg. + traceStores > 0 ifTrue: + [topReg ~= TempReg ifTrue: + [self MoveR: topReg R: TempReg]. + self CallRT: ceTraceStoreTrampoline]. + ^0]]. + topReg := self allocateRegForStackEntryAt: 0 notConflictingWith: (self registerMaskFor: destReg). self ssStorePop: popBoolean toReg: topReg. objectRepresentation genStoreSourceReg: topReg slotIndex: slotIndex destReg: destReg scratchReg: TempReg inFrame: needsFrame + needsStoreCheck: needsStoreCheck! - needsStoreCheck: needsStoreCheck.! Item was added: + ----- Method: StackToRegisterMappingCogit>>maybeCountCounter (in category 'compile abstract instructions') ----- + maybeCountCounter + "This is a hook for SistaCogit" + <inline: true>! Item was added: + ----- Method: StackToRegisterMappingCogit>>maybeCountFixup (in category 'compile abstract instructions') ----- + maybeCountFixup + "This is a hook for RegisterAllocatingCogit" + <inline: true>! Item was added: + ----- Method: StackToRegisterMappingCogit>>maybeInitNumCounters (in category 'compile abstract instructions') ----- + maybeInitNumCounters + "This is a hook for SistaCogit" + <inline: true>! Item was added: + ----- Method: StackToRegisterMappingCogit>>maybeInitNumFixups (in category 'compile abstract instructions') ----- + maybeInitNumFixups + "This is a hook for RegisterAllocatingCogit" + <inline: true>! Item was changed: ----- Method: StackToRegisterMappingCogit>>scanMethod (in category 'compile abstract instructions') ----- scanMethod "Scan the method (and all embedded blocks) to determine - what the last bytecode is; extra bytes at the end of a method are used to encode things like source pointers or temp names - if the method needs a frame or not - what are the targets of any backward branches. - how many blocks it creates Answer the block count or on error a negative error code" + | latestContinuation nExts descriptor pc numBlocks distance targetPC framelessStackDelta seenInstVarStore | - | latestContinuation nExts descriptor pc numBlocks distance targetPC framelessStackDelta | <var: #descriptor type: #'BytecodeDescriptor *'> + needsFrame := useTwoPaths := seenInstVarStore := false. + self maybeInitNumFixups. + self maybeInitNumCounters. - needsFrame := false. prevBCDescriptor := nil. - self cppIf: IMMUTABILITY ifTrue: [ needsTwoPath := false ]. NewspeakVM ifTrue: [numIRCs := 0]. (primitiveIndex > 0 and: [coInterpreter isQuickPrimitiveIndex: primitiveIndex]) ifTrue: [^0]. pc := latestContinuation := initialPC. numBlocks := framelessStackDelta := nExts := extA := extB := 0. [pc <= endPC] whileTrue: [byte0 := (objectMemory fetchByte: pc ofObject: methodObj) + bytecodeSetOffset. descriptor := self generatorAt: byte0. descriptor isExtension ifTrue: [descriptor opcode = Nop ifTrue: "unknown bytecode tag; see Cogit class>>#generatorTableFrom:" [^EncounteredUnknownBytecode]. self loadSubsequentBytesForDescriptor: descriptor at: pc. self perform: descriptor generator]. (descriptor isReturn and: [pc >= latestContinuation]) ifTrue: [endPC := pc]. + + needsFrame ifFalse: + [(descriptor needsFrameFunction isNil + or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) + ifTrue: + [needsFrame := true. + self cppIf: IMMUTABILITY + ifTrue: [useTwoPaths := descriptor isInstVarStore]] + ifFalse: + [framelessStackDelta := framelessStackDelta + descriptor stackDelta. + self cppIf: IMMUTABILITY + ifTrue: [] + ifFalse: + [descriptor isInstVarStore ifTrue: + [seenInstVarStore + ifTrue: [useTwoPaths := true] + ifFalse: [seenInstVarStore := true]]]]]. + - self cppIf: IMMUTABILITY - ifTrue: - [(needsFrame and: [needsTwoPath not]) ifFalse: - [(descriptor needsFrameFunction isNil - or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) - ifTrue: - [needsFrame := true. - needsTwoPath := descriptor generator == #genStoreAndPopReceiverVariableBytecode ] - ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta]]] - ifFalse: - [needsFrame ifFalse: - [(descriptor needsFrameFunction isNil - or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) - ifTrue: [needsFrame := true] - ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta]]]. - descriptor isBranch ifTrue: [distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. targetPC := pc + descriptor numBytes + distance. (self isBackwardBranch: descriptor at: pc exts: nExts in: methodObj) ifTrue: [self initializeFixupAt: targetPC - initialPC] + ifFalse: + [latestContinuation := latestContinuation max: targetPC. + self maybeCountFixup. + self maybeCountCounter]]. - ifFalse: [latestContinuation := latestContinuation max: targetPC]]. descriptor isBlockCreation ifTrue: [numBlocks := numBlocks + 1. distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. targetPC := pc + descriptor numBytes + distance. + latestContinuation := latestContinuation max: targetPC. + self maybeCountFixup]. + - latestContinuation := latestContinuation max: targetPC]. NewspeakVM ifTrue: [descriptor hasIRC ifTrue: [numIRCs := numIRCs + 1]]. pc := pc + descriptor numBytes. descriptor isExtension ifTrue: [nExts := nExts + 1] ifFalse: [nExts := extA := extB := 0]. prevBCDescriptor := descriptor]. ^numBlocks!

1 0

Fwd: [vm-dev-owner@lists.squeakfoundation.org: Re: Amazing ARM simulator experience]
by Eliot Miranda 01 Jun '16

01 Jun '16

---------- Forwarded message ---------- From: ghost <ghost(a)major2nd.com> Date: Wed, Jun 1, 2016 at 12:12 PM Subject: [vm-dev-owner(a)lists.squeakfoundation.org: Re: Amazing ARM simulator experience] To: eliot.miranda(a)gmail.com Eliot, please pass this along to the mailing list if you like. Thanks- P. From: ghost <ghost(a)major2nd.com> To: Eliot Miranda <eliot.miranda(a)gmail.com> CC: vm-dev(a)lists.squeakfoundation.org In-reply-to: < CAC20JE1dBwTXJNxOaiLbwhU8O8eeTV4Wg_AJtUSuA2ZO4bkKtA(a)mail.gmail.com> (message from Eliot Miranda on Wed, 1 Jun 2016 10:43:24 -0700) Subject: Re: Amazing ARM simulator experience Date: Wed, 1 Jun 2016 12:11:29 -0700 (PDT) Eliot, I can't top your adventure, but I have a similar experience to share. As part of work I was doing on binary code decompilation, for each ISA I had to build a translator from binary code into something fairly close to C parse trees. Now, I didn't intend these trees to be used for anything other than analysis, but it turned out to be pretty easy to actually execute them. The project is all written in JavaScript*, and compiling the trees into JavaScript code turned out to only require a few hundred lines of code because the primitives are all very low-level and there aren't many of them. So what we have here is binary code, decompiled into machine-oriented JavaScript, which is then executed by Google's v8 JIT compiler. My primo test case was Ghostscript executing "-dNODISPLAY -c 3 4 add = quit", which doesn't look like much but does require loading and initializing the entire graphics rendering system (a good deal of which is written in PostScript and interpreted by GS). This took 522M ARMv7 instructions in 472 seconds, or a bit over 1 MIPS, on a 2014-era x86/64 workstation. I wasn't sure whether to be more impressed by v8, or appalled by how much work GS had to do to get up to speed. -- L Peter Deutsch <ghost(a)major2nd.com> :: Aladdin Enterprises :: Healdsburg, CA Was your vote really counted? http://www.verifiedvoting.org ---------------------------------------------------------------- *If you want to discuss the choice of JavaScript as implementation language, please e-mail me privately. :-)

1 0

[commit][3733] CogVM source as per VMMaker.oscog-eem.1876
by commits＠squeakvm.org 01 Jun '16

01 Jun '16

Revision: 3733 Author: eliot Date: 2016-06-01 12:32:08 -0700 (Wed, 01 Jun 2016) Log Message: ----------- CogVM source as per VMMaker.oscog-eem.1876 Cogit: Change the JIT so that (with Immutability/Write barrier ON) methods with only frameless instance variable stores are compiled with two paths. The code first checks if the receiver is immutable/read-only, and takes the right path accordingly. The first path is frameless and does not include immutability/write barrier checks. The second one is frameful and does all the immutability/write barrier checks. Eliminate the callerSavedRegMask variable and replace it with a CallerSavedRegisterMask variable computed at register initialization time. On ARM: - define the caller-saved registers as the subset of the caller-saved registers that excludes R0/CArg0Reg/TempReg & R1/CArg1Reg (R0 is the C result register), and use R2 & R3 for abstract registers (ClassReg and Arg0Reg). - save and restore elements of the caller-saved registers as appropriate around run-time calls. - use LDM & STM to do the saving. - hence provide two extra registers, now provinding Extra[012]Reg Fix some compilation warnings in cogitX64.c Plugins: Change the JPEGReaderPlugin to handle 8- and 16- bit JPEGs (thank you Laura ! ; still to integrate the refactoring into C and Smalltalk code). More inlining of low-level copy routines in the LargeInegersPlugin. Modified Paths: -------------- branches/Cog/nsspur64src/vm/cogit.h branches/Cog/nsspur64src/vm/cogitX64.c branches/Cog/nsspur64src/vm/cointerp.c branches/Cog/nsspur64src/vm/cointerp.h branches/Cog/nsspur64src/vm/gcc3x-cointerp.c branches/Cog/nsspursrc/vm/cogit.h branches/Cog/nsspursrc/vm/cogitARMv5.c branches/Cog/nsspursrc/vm/cogitIA32.c branches/Cog/nsspursrc/vm/cogitMIPSEL.c branches/Cog/nsspursrc/vm/cointerp.c branches/Cog/nsspursrc/vm/cointerp.h branches/Cog/nsspursrc/vm/gcc3x-cointerp.c branches/Cog/nsspurstack64src/vm/gcc3x-interp.c branches/Cog/nsspurstack64src/vm/interp.c branches/Cog/nsspurstacksrc/vm/gcc3x-interp.c branches/Cog/nsspurstacksrc/vm/interp.c branches/Cog/spur64src/vm/cogit.h branches/Cog/spur64src/vm/cogitX64.c branches/Cog/spur64src/vm/cointerp.c branches/Cog/spur64src/vm/cointerp.h branches/Cog/spur64src/vm/gcc3x-cointerp.c branches/Cog/spursistasrc/vm/cogit.h branches/Cog/spursistasrc/vm/cogitARMv5.c branches/Cog/spursistasrc/vm/cogitIA32.c branches/Cog/spursistasrc/vm/cogitMIPSEL.c branches/Cog/spursistasrc/vm/cointerp.c branches/Cog/spursistasrc/vm/cointerp.h branches/Cog/spursistasrc/vm/gcc3x-cointerp.c branches/Cog/spursrc/vm/cogit.h branches/Cog/spursrc/vm/cogitARMv5.c branches/Cog/spursrc/vm/cogitIA32.c branches/Cog/spursrc/vm/cogitMIPSEL.c branches/Cog/spurstack64src/vm/gcc3x-interp.c branches/Cog/spurstack64src/vm/interp.c branches/Cog/spurstacksrc/vm/gcc3x-interp.c branches/Cog/spurstacksrc/vm/interp.c branches/Cog/src/plugins/B2DPlugin/B2DPlugin.c branches/Cog/src/plugins/BitBltPlugin/BitBltPlugin.c branches/Cog/src/plugins/JPEGReaderPlugin/JPEGReaderPlugin.c branches/Cog/src/plugins/LargeIntegers/LargeIntegers.c branches/Cog/src/plugins/SqueakFFIPrims/ARM32FFIPlugin.c branches/Cog/src/plugins/SqueakFFIPrims/X64SysVFFIPlugin.c branches/Cog/src/plugins/SqueakFFIPrims/X64Win64FFIPlugin.c branches/Cog/src/vm/cogit.h branches/Cog/src/vm/cogitARMv5.c branches/Cog/src/vm/cogitIA32.c branches/Cog/src/vm/cogitMIPSEL.c branches/Cog/src/vm/cointerp.c branches/Cog/src/vm/cointerp.h branches/Cog/src/vm/cointerpmt.c branches/Cog/src/vm/cointerpmt.h branches/Cog/src/vm/gcc3x-cointerp.c branches/Cog/src/vm/gcc3x-cointerpmt.c branches/Cog/stacksrc/vm/gcc3x-interp.c branches/Cog/stacksrc/vm/interp.c Property Changed: ---------------- branches/Cog/platforms/Cross/vm/sqSCCSVersion.h Modified: branches/Cog/nsspur64src/vm/cogit.h =================================================================== --- branches/Cog/nsspur64src/vm/cogit.h 2016-05-26 20:01:37 UTC (rev 3732) +++ branches/Cog/nsspur64src/vm/cogit.h 2016-06-01 19:32:08 UTC (rev 3733) @@ -1,5 +1,5 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 + CCodeGenerator VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e */ Modified: branches/Cog/nsspur64src/vm/cogitX64.c =================================================================== --- branches/Cog/nsspur64src/vm/cogitX64.c 2016-05-26 20:01:37 UTC (rev 3732) +++ branches/Cog/nsspur64src/vm/cogitX64.c 2016-06-01 19:32:08 UTC (rev 3733) @@ -1,9 +1,9 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1860 uuid: 4d58d995-ee0c-4330-9190-adfa038e8f24 + CCodeGenerator VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e from - StackToRegisterMappingCogit VMMaker.oscog-eem.1860 uuid: 4d58d995-ee0c-4330-9190-adfa038e8f24 + StackToRegisterMappingCogit VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e */ -static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1860 uuid: 4d58d995-ee0c-4330-9190-adfa038e8f24 " __DATE__ ; +static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e " __DATE__ ; char *__cogitBuildInfo = __buildInfo; @@ -45,6 +45,7 @@ #define BlockCreationBytecodeSize 4 #define BytecodeSetHasDirectedSuperSend 0 #define Call 6 +#define CallerSavedRegisterMask 0xFC7 #define CallFull 7 #define CDQ 116 #if !defined(CheckRememberedInTrampoline) /* Allow this to be overridden on the compiler command line */ @@ -248,8 +249,6 @@ #define PushCq 74 #define PushCw 75 #define PushR 73 -#define R10 10 -#define R11 11 #define R12 12 #define R13 13 #define R15 15 @@ -469,6 +468,7 @@ static sqInt NoDbgRegParms blockDispatchTargetsForperformarg(CogMethod *cogMethod, usqInt (*binaryFunction)(sqInt mcpc, sqInt arg), sqInt arg); extern sqInt bytecodePCForstartBcpcin(sqInt mcpc, sqInt startbcpc, CogBlockMethod *cogMethod); static AbstractInstruction * NoDbgRegParms CallNewspeakSend(sqInt callTarget); +static AbstractInstruction * NoDbgRegParms CallRTregistersToBeSavedMask(sqInt callTarget, sqInt registersToBeSaved); static AbstractInstruction * NoDbgRegParms gCall(sqInt callTarget); static AbstractInstruction * NoDbgRegParms gCmpCqR(sqInt quickConstant, sqInt reg); static AbstractInstruction * NoDbgRegParms gCmpCwR(sqInt wordConstant, sqInt reg); @@ -601,7 +601,7 @@ static AbstractInstruction * NoDbgRegParms gMoveCwR(sqInt wordConstant, sqInt reg); static AbstractInstruction * NoDbgRegParms gMoveRMwr(sqInt sourceReg, sqInt offset, sqInt baseReg); static AbstractInstruction * NoDbgRegParms gMoveRR(sqInt reg1, sqInt reg2); -static usqInt NoDbgRegParms mapEndFor(CogMethod *cogMethod); +static sqInt NoDbgRegParms mapEndFor(CogMethod *cogMethod); static sqInt NoDbgRegParms mapForperformUntilarg(CogMethod *cogMethod, sqInt (*functionSymbol)(sqInt annotation, char *mcpc, sqInt arg), sqInt arg); static sqInt NoDbgRegParms mapObjectReferencesInClosedPIC(CogMethod *cPIC); static void mapObjectReferencesInGeneratedRuntime(void); @@ -632,7 +632,7 @@ static sqInt NoDbgRegParms needsFrameNever(sqInt stackDelta); static sqInt NoDbgRegParms noAssertMethodClassAssociationOf(sqInt methodPointer); static sqInt noCogMethodsMaximallyMarked(void); -static sqInt NoDbgRegParms noTargetsFreeInClosedPIC(sqInt cPIC); +static sqInt NoDbgRegParms noTargetsFreeInClosedPIC(CogMethod *cPIC); static sqInt NoDbgRegParms outputInstructionsAt(sqInt startAddress); static sqInt NoDbgRegParms outputInstructionsForGeneratedRuntimeAt(sqInt startAddress); static AbstractInstruction * NoDbgRegParms gPushCw(sqInt wordConstant); @@ -889,11 +889,8 @@ static sqInt NoDbgRegParms registerMask(SimStackEntry * self_in_registerMask); static sqInt NoDbgRegParms registerOrNone(SimStackEntry * self_in_registerOrNone); static SimStackEntry * NoDbgRegParms storeToReg(SimStackEntry * self_in_storeToReg, sqInt reg); -static sqInt NoDbgRegParms isBackwardBranchFixup(BytecodeFixup * self_in_isBackwardBranchFixup); static sqInt NoDbgRegParms isMergeFixup(BytecodeFixup * self_in_isMergeFixup); -static sqInt NoDbgRegParms isMergeFixupOrIsFixedUp(BytecodeFixup * self_in_isMergeFixupOrIsFixedUp); static sqInt NoDbgRegParms availableRegisterOrNoneFor(AbstractInstruction * self_in_availableRegisterOrNoneFor, sqInt liveRegsMask); -static sqInt NoDbgRegParms callerSavedRegisterMask(AbstractInstruction * self_in_callerSavedRegisterMask); static sqInt NoDbgRegParms callFullTargetFromReturnAddress(AbstractInstruction * self_in_callFullTargetFromReturnAddress, sqInt callSiteReturnAddress); static sqInt NoDbgRegParms callInstructionByteSize(AbstractInstruction * self_in_callInstructionByteSize); static sqInt NoDbgRegParms callTargetFromReturnAddress(AbstractInstruction * self_in_callTargetFromReturnAddress, sqInt callSiteReturnAddress); @@ -1076,6 +1073,9 @@ static CogMethod * NoDbgRegParms compileCogMethod(sqInt selector); static sqInt compileEntireMethod(void); static void compileFrameBuild(void); +#if IMMUTABILITY +static void compileTwoPathFrameBuild(void); +#endif /* IMMUTABILITY */ static sqInt NoDbgRegParms cPICMissTrampolineFor(sqInt numArgs); static sqInt doubleExtendedDoAnythingBytecode(void); static sqInt duplicateTopBytecode(void); @@ -1210,7 +1210,6 @@ static sqInt bytecodeSetOffset; void * CFramePointer; void * CStackPointer; -static sqInt callerSavedRegMask; static sqInt cbEntryOffset; static sqInt cbNoSwitchEntryOffset; sqInt ceBaseFrameReturnTrampoline; @@ -1273,12 +1272,13 @@ static sqInt debugFixupBreaks; static sqInt debugOpcodeIndices; unsigned long debugPrimCallStackOffset; +static sqInt debugStackPointers; static sqInt disassemblingMethod; static sqInt dynamicSuperSendTrampolines[NumSendTrampolines]; static AbstractInstruction * endCPICCase0; static sqInt endPC; static AbstractInstruction * entry; -static sqInt enumeratingCogMethod; +static CogMethod * enumeratingCogMethod; static sqInt expectedFPAlignment; static sqInt expectedSPAlignment; static sqInt extA; @@ -1831,6 +1831,7 @@ sqInt missOffset; static usqInt mzFreeStart; static sqInt needsFrame; +static sqInt needsTwoPath; static AbstractInstruction * noCheckEntry; static sqInt numAbstractOpcodes; static sqInt numIRCs; @@ -1885,7 +1886,6 @@ #define blockAlignment(self) 8 #define blockStartAt(index) (&blockStarts[index]) #define breakOnImplicitReceiver() (traceFlags & 64) -#define callerSavedRegMask() callerSavedRegMask #define ceBaseFrameReturnPC() ceBaseFrameReturnTrampoline #define ceCannotResumePC() ((usqInt)ceCannotResumeTrampoline) #define ceCheckFeatures() ceCheckFeaturesFunction() @@ -2605,7 +2605,7 @@ static sqInt NoDbgRegParms addressIsInInstructions(AbstractInstruction *address) { - return !((unsigned)(address) & BytesPerWord-1) \ + return !((usqInt)(address) & BytesPerWord-1) \ && (address) >= &abstractOpcodes[0] \ && (address) < &abstractOpcodes[opcodeIndex]; } @@ -2796,7 +2796,7 @@ sqInt byte; BytecodeDescriptor *descriptor; sqInt distance; - usqInt endbcpc; + sqInt endbcpc; CogMethod *homeMethod; sqInt isBackwardBranch; sqInt isInBlock; @@ -2962,6 +2962,44 @@ return abstractInstruction; } + /* Cogit>>#CallRT:registersToBeSavedMask: */ +static AbstractInstruction * NoDbgRegParms +CallRTregistersToBeSavedMask(sqInt callTarget, sqInt registersToBeSaved) +{ + AbstractInstruction *abstractInstruction; + sqInt callerSavedRegsToBeSaved; + AbstractInstruction *lastInst; + sqInt reg; + sqInt registersToBePushed; + + reg = 0; + callerSavedRegsToBeSaved = CallerSavedRegisterMask & registersToBeSaved; + registersToBePushed = callerSavedRegsToBeSaved; + reg = 0; + while (registersToBePushed != 0) { + if (registersToBePushed & 1) { + /* begin PushR: */ + genoperand(PushR, reg); + } + reg += 1; + registersToBePushed = ((sqInt) registersToBePushed) >> 1; + } + + /* begin CallRT: */ + abstractInstruction = genoperand(Call, callTarget); + (abstractInstruction->annotation = IsRelativeCall); + lastInst = abstractInstruction; + while (reg >= 0) { + if (callerSavedRegsToBeSaved & (1LL << reg)) { + /* begin PopR: */ + lastInst = genoperand(PopR, reg); + } + reg -= 1; + } + return lastInst; + +} + /* Cogit>>#Call: */ static AbstractInstruction * NoDbgRegParms gCall(sqInt callTarget) @@ -3667,7 +3705,7 @@ closedPICRefersToUnmarkedObject(CogMethod *cPIC) { sqInt i; - sqInt object; + usqInt object; sqInt pc; if (!((isImmediate((cPIC->selector))) @@ -4464,6 +4502,8 @@ # if ABI == MSVC + + /* completely untested... */ if (regOrConst2 < NoReg) { /* begin MoveCq:R: */ anInstruction4 = genoperandoperand(MoveCqR, -2 - regOrConst2, R8); @@ -5236,7 +5276,7 @@ findMapLocationForMcpcinMethod(sqInt targetMcpc, CogMethod *cogMethod) { sqInt annotation; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; @@ -5320,7 +5360,7 @@ followForwardedLiteralsIn(CogMethod *cogMethod) { sqInt annotation; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -6721,8 +6761,7 @@ (methodLabel->opcode = Label); ((methodLabel->operands))[0] = 0; ((methodLabel->operands))[1] = 0; - callerSavedRegMask = callerSavedRegisterMask(backEnd); - assert(((registerMaskFor(VarBaseReg)) & callerSavedRegMask) == 0); + assert(((registerMaskFor(VarBaseReg)) & CallerSavedRegisterMask) == 0); } @@ -7136,10 +7175,10 @@ /* Answer the address of the null byte at the end of the method map. */ /* Cogit>>#mapEndFor: */ -static usqInt NoDbgRegParms +static sqInt NoDbgRegParms mapEndFor(CogMethod *cogMethod) { - usqInt end; + sqInt end; end = ((((usqInt)cogMethod)) + ((cogMethod->blockSize))) - 1; while ((byteAt(end)) != MapEnd) { @@ -7157,7 +7196,7 @@ mapForperformUntilarg(CogMethod *cogMethod, sqInt (*functionSymbol)(sqInt annotation, char *mcpc, sqInt arg), sqInt arg) { sqInt annotation; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -7264,7 +7303,7 @@ sqInt freedPIC; sqInt hasYoungObj; sqInt hasYoungObjPtr; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt remappedMethod; @@ -7382,7 +7421,7 @@ { sqInt annotation; CogMethod *cogMethod; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -7462,7 +7501,7 @@ CogMethod *cogMethod; sqInt hasYoungObj; sqInt hasYoungObjPtr; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; usqInt pointer; @@ -7582,8 +7621,8 @@ sqInt annotation; sqInt annotation1; CogMethod *cogMethod; - usqInt map; - usqInt map1; + sqInt map; + sqInt map1; sqInt mapByte; sqInt mapByte1; usqInt mcpc; @@ -7742,7 +7781,7 @@ markAndTraceOrFreeCogMethodfirstVisit(CogMethod *cogMethod, sqInt firstVisit) { sqInt annotation; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -8070,7 +8109,7 @@ { sqInt annotation; CogMethod *cogMethod; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -8198,7 +8237,7 @@ sqInt byte; BytecodeDescriptor *descriptor; sqInt distance; - usqInt endbcpc; + sqInt endbcpc; CogMethod *homeMethod; sqInt isBackwardBranch; sqInt isInBlock; @@ -8483,7 +8522,7 @@ /* Cogit>>#noTargetsFreeInClosedPIC: */ static sqInt NoDbgRegParms -noTargetsFreeInClosedPIC(sqInt cPIC) +noTargetsFreeInClosedPIC(CogMethod *cPIC) { return !(cPICHasFreedTargets(cPIC)); } @@ -8628,8 +8667,15 @@ cogMethod = methodFor(address); if (cogMethod == 0) { - print("not a method"); - cr(); + if ((codeEntryFor(address)) == null) { + print("not a method"); + cr(); + } + else { + print("trampoline "); + print(codeEntryNameFor(address)); + cr(); + } } else { printCogMethod(cogMethod); @@ -8641,9 +8687,9 @@ printPCMapPairsFor(CogMethod *cogMethod) { sqInt annotation; - usqInt map; + sqInt map; unsigned char mapByte; - usqInt mcpc; + sqInt mcpc; sqInt value; mcpc = (0 @@ -8820,7 +8866,7 @@ { sqInt annotation; sqLong callDelta; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqLong refDelta; @@ -9394,7 +9440,7 @@ { sqInt annotation; CogMethod *cogMethod; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -9837,7 +9883,7 @@ sqInt annotation; CogMethod *cogMethod; sqInt freedPIC; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -9914,7 +9960,7 @@ { sqInt annotation; CogMethod *cogMethod; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt mustScanAndUnlink; @@ -10013,7 +10059,7 @@ { sqInt annotation; CogMethod *cogMethod; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -10082,7 +10128,7 @@ sqInt annotation; CogMethod *cogMethod; sqInt freedPIC; - usqInt map; + sqInt map; sqInt mapByte; usqInt mcpc; sqInt result; @@ -10471,8 +10517,6 @@ freeOlderMethodsForCompaction(void) { usqInt amountToFree; - sqInt cascade0; - sqInt cascade1; CogMethod *cogMethod; sqInt freeableUsage; usqInt freedSoFar; @@ -10499,7 +10543,7 @@ } } while((freedSoFar < amountToFree) && (((freeableUsage += 1)) < CMMaxUsageCount)); - } +} /* Answer that all entries in youngReferrers are in-use and have the @@ -15000,11 +15044,11 @@ genoperand(RetN, 0); jmpTarget(jumpSC, gLabel()); } - ceStoreCheckTrampoline = genTrampolineForcallednumArgsargargargargregsToSavepushLinkRegresultRegappendOpcodes(remember, "ceStoreCheckTrampoline", 1, ReceiverResultReg, null, null, null, (((callerSavedRegMask()) | (1LL << ReceiverResultReg)) - (1LL << ReceiverResultReg)), 1, (callerSavedRegMask & (1LL << ReceiverResultReg) + ceStoreCheckTrampoline = genTrampolineForcallednumArgsargargargargregsToSavepushLinkRegresultRegappendOpcodes(remember, "ceStoreCheckTrampoline", 1, ReceiverResultReg, null, null, null, ((CallerSavedRegisterMask | (1LL << ReceiverResultReg)) - (1LL << ReceiverResultReg)), 1, (CallerSavedRegisterMask & (1LL << ReceiverResultReg) ? ReceiverResultReg : RAX), CheckRememberedInTrampoline); ceStoreCheckContextReceiverTrampoline = genStoreCheckContextReceiverTrampoline(); - ceScheduleScavengeTrampoline = genTrampolineForcalledregsToSave(ceScheduleScavenge, "ceScheduleScavengeTrampoline", callerSavedRegMask()); + ceScheduleScavengeTrampoline = genTrampolineForcalledregsToSave(ceScheduleScavenge, "ceScheduleScavengeTrampoline", CallerSavedRegisterMask); ceSmallActiveContextInMethodTrampoline = genActiveContextTrampolineLargeinBlockcalled(0, 0, "ceSmallMethodContext"); ceSmallActiveContextInBlockTrampoline = genActiveContextTrampolineLargeinBlockcalled(0, 1, "ceSmallBlockContext"); ceLargeActiveContextInMethodTrampoline = genActiveContextTrampolineLargeinBlockcalled(1, 0, "ceLargeMethodContext"); @@ -15020,7 +15064,6 @@ static sqInt NoDbgRegParms genGetActiveContextLargeinBlock(sqInt isLarge, sqInt isInBlock) { - AbstractInstruction *abstractInstruction; sqInt address; sqInt address1; AbstractInstruction *anInstruction; @@ -15241,9 +15284,7 @@ /* begin RetN: */ genoperand(RetN, 0); jmpTarget(jumpNeedScavenge, gLabel()); - /* begin CallRT: */ - abstractInstruction = genoperand(Call, ceScheduleScavengeTrampoline); - (abstractInstruction->annotation = IsRelativeCall); + CallRTregistersToBeSavedMask(ceScheduleScavengeTrampoline, ((1LL << ReceiverResultReg) | (1LL << SendNumArgsReg)) | (1LL << ClassReg)); /* begin Jump: */ genoperand(Jump, ((sqInt)continuation)); @@ -16794,13 +16835,6 @@ return self_in_storeToReg; } - /* CogSSBytecodeFixup>>#isBackwardBranchFixup */ -static sqInt NoDbgRegParms -isBackwardBranchFixup(BytecodeFixup * self_in_isBackwardBranchFixup) -{ - return ((self_in_isBackwardBranchFixup->simStackPtr)) == UnknownSimStackPtrFlag; -} - /* CogSSBytecodeFixup>>#isMergeFixup */ static sqInt NoDbgRegParms isMergeFixup(BytecodeFixup * self_in_isMergeFixup) @@ -16808,14 +16842,7 @@ return (((usqInt)((self_in_isMergeFixup->targetInstruction)))) == NeedsMergeFixupFlag; } - /* CogSSBytecodeFixup>>#isMergeFixupOrIsFixedUp */ -static sqInt NoDbgRegParms -isMergeFixupOrIsFixedUp(BytecodeFixup * self_in_isMergeFixupOrIsFixedUp) -{ - return (((usqInt)((self_in_isMergeFixupOrIsFixedUp->targetInstruction)))) >= NeedsMergeFixupFlag; -} - /* Answer an unused abstract register in the liveRegMask. Subclasses with more registers can override to answer them. N.B. Do /not/ allocate TempReg. */ @@ -16864,20 +16891,6 @@ } -/* See e.g. Figure 3.4 Register Usage in - System V Application Binary Interface - AMD64 Architecture Processor Supplement - N.B. We are playing fast and loose here being processor-specific. - Soon enough this needs to be OS-specific. */ - - /* CogX64Compiler>>#callerSavedRegisterMask */ -static sqInt NoDbgRegParms -callerSavedRegisterMask(AbstractInstruction * self_in_callerSavedRegisterMask) -{ - return ((((((((1LL << RAX) | (1LL << RCX)) | (1LL << RDX)) | (1LL << RSI)) | (1LL << RDI)) | (1LL << R8)) | (1LL << R9)) | (1LL << R10)) | (1LL << R11); -} - - /* Answer the address the full call immediately preceding callSiteReturnAddress will jump to. */ @@ -23144,7 +23157,7 @@ CogBlockMethod *cogMethod1; BytecodeDescriptor *descriptor; sqInt distance; - usqInt endbcpc; + sqInt endbcpc; sqInt errCode; CogMethod *homeMethod; sqInt isBackwardBranch; @@ -24748,7 +24761,6 @@ compileCogMethod(sqInt selector) { unsigned long allocBytes; - sqInt debugStackPointers; int extra; unsigned long fixupBytes; sqInt numBlocks; @@ -24880,6 +24892,15 @@ sqInt iLimiT; AbstractInstruction *jumpSkip; + +# if IMMUTABILITY + if (needsTwoPath) { + compileTwoPathFrameBuild(); + return; + } + +# endif /* IMMUTABILITY */ + if (!needsFrame) { initSimStackForFramelessMethod(initialPC); return; @@ -24945,6 +24966,134 @@ initSimStackForFramefulMethod(initialPC); } + +/* Build a frame for a CogMethod activation. See CoInterpreter + class>>initializeFrameIndices. receiver (in ReceiverResultReg) + arg0 + ... + argN + caller's saved ip/this stackPage (for a base frame) + fp-> saved fp + method + context (uninitialized?) + receiver + first temp + ... + sp-> Nth temp + If there is a primitive and an error code the Nth temp is the error code. + Ensure SendNumArgsReg is set early on (incidentally to nilObj) because + it is the flag determining whether context switch is allowed on + stack-overflow. */ +/* We are in a method where the frame is needed *only* for instance variable + store, typically a setter method. + This case has 20% overhead with Immutability compared to setter without + immutability because of the stack + frame creation. We compile two path, one where the object is immutable, + one where it isn't. At the beginning + of the frame build, we take one path or the other depending on the + receiver mutability. + + Note: this specific case happens only where there are only instance + variabel stores. We could do something + similar for literal variable stores, but we don't as it's too uncommon. + */ + + /* StackToRegisterMappingCogit>>#compileTwoPathFrameBuild */ +#if IMMUTABILITY +static void +compileTwoPathFrameBuild(void) +{ + sqInt address; + AbstractInstruction *anInstruction; + AbstractInstruction *anInstruction1; + AbstractInstruction *anInstruction2; + AbstractInstruction *anInstruction3; + sqInt constant; + sqInt i; + sqInt iLimiT; + AbstractInstruction * jumpImmutable; + AbstractInstruction *jumpSkip; + + assert(needsFrame); + assert(IMMUTABILITY); + assert(needsTwoPath); + assert(blockCount == 0); + + /* first path. The receiver is mutable */ + jumpImmutable = genJumpImmutablescratchReg(ReceiverResultReg, TempReg); + initSimStackForFramelessMethod(initialPC); + /* begin compileMethodBody */ + if (endPC < initialPC) { + goto l7; + } + compileAbstractInstructionsFromthrough(initialPC + (deltaToSkipPrimAndErrorStoreInheader(methodObj, methodHeader)), endPC); +l7: /* end compileMethodBody */; + + /* reset because it impact inst var store compilation */ + needsTwoPath = 0; + jmpTarget(jumpImmutable, gLabel()); + genPushRegisterArgs(); + if (!needsFrame) { + return; + } + /* begin PushR: */ + genoperand(PushR, FPReg); + /* begin MoveR:R: */ + genoperandoperand(MoveRR, SPReg, FPReg); + addDependent(methodLabel, annotateAbsolutePCRef(gPushCw(((sqInt)methodLabel)))); + /* begin genMoveNilR: */ + constant = nilObject(); + if (shouldAnnotateObjectReference(constant)) { + annotateobjRef(gMoveCwR(constant, SendNumArgsReg), constant); + } + else { + /* begin MoveCq:R: */ + anInstruction = genoperandoperand(MoveCqR, constant, SendNumArgsReg); + } + /* begin PushR: */ + genoperand(PushR, SendNumArgsReg); + /* begin PushR: */ + genoperand(PushR, ReceiverResultReg); + for (i = (methodOrBlockNumArgs + 1), iLimiT = (temporaryCountOfMethodHeader(methodHeader)); i <= iLimiT; i += 1) { + /* begin PushR: */ + genoperand(PushR, SendNumArgsReg); + } + if (((primitiveIndexOfMethodheader(methodObj, methodHeader)) > 0) + && ((longStoreBytecodeForHeader(methodHeader)) == (fetchByteofObject(initialPC + (sizeOfCallPrimitiveBytecode(methodHeader)), methodObj)))) { + compileGetErrorCode(); + } + /* begin MoveAw:R: */ + address = stackLimitAddress(); + /* begin gen:literal:operand: */ + anInstruction3 = genoperandoperand(MoveAwR, address, TempReg); + /* begin CmpR:R: */ + genoperandoperand(CmpRR, TempReg, SPReg); + if (canContextSwitchIfActivatingheader(methodObj, methodHeader)) { + /* begin JumpBelow: */ + genConditionalBranchoperand(JumpBelow, ((sqInt)stackOverflowCall)); + /* begin Label */ + stackCheckLabel = genoperandoperand(Label, (labelCounter += 1), bytecodePC); + } + else { + /* begin JumpAboveOrEqual: */ + jumpSkip = genConditionalBranchoperand(JumpAboveOrEqual, ((sqInt)0)); + /* begin MoveCq:R: */ + anInstruction1 = genoperandoperand(MoveCqR, 0, SendNumArgsReg); + /* begin Jump: */ + genoperand(Jump, ((sqInt)stackOverflowCall)); + jmpTarget(jumpSkip, (stackCheckLabel = gLabel())); + } + /* begin annotateBytecode: */ + (stackCheckLabel->annotation = HasBytecodePC); + if (numIRCs > 0) { + /* begin PrefetchAw: */ + anInstruction2 = genoperand(PrefetchAw, theIRCs); + } + + initSimStackForFramefulMethod(initialPC); +} +#endif /* IMMUTABILITY */ + /* StackToRegisterMappingCogit>>#cPICMissTrampolineFor: */ static sqInt NoDbgRegParms cPICMissTrampolineFor(sqInt numArgs) @@ -25561,9 +25710,9 @@ static void generateTracingTrampolines(void) { - ceTraceLinkedSendTrampoline = genTrampolineForcalledargregsToSave(ceTraceLinkedSend, "ceTraceLinkedSendTrampoline", ReceiverResultReg, callerSavedRegMask); - ceTraceBlockActivationTrampoline = genTrampolineForcalledregsToSave(ceTraceBlockActivation, "ceTraceBlockActivationTrampoline", callerSavedRegMask); - ceTraceStoreTrampoline = genTrampolineForcalledargargregsToSave(ceTraceStoreOfinto, "ceTraceStoreTrampoline", TempReg, ReceiverResultReg, callerSavedRegMask); + ceTraceLinkedSendTrampoline = genTrampolineForcalledargregsToSave(ceTraceLinkedSend, "ceTraceLinkedSendTrampoline", ReceiverResultReg, CallerSavedRegisterMask); + ceTraceBlockActivationTrampoline = genTrampolineForcalledregsToSave(ceTraceBlockActivation, "ceTraceBlockActivationTrampoline", CallerSavedRegisterMask); + ceTraceStoreTrampoline = genTrampolineForcalledargargregsToSave(ceTraceStoreOfinto, "ceTraceStoreTrampoline", TempReg, ReceiverResultReg, CallerSavedRegisterMask); } /* StackToRegisterMappingCogit>>#genJumpBackTo: */ @@ -26076,7 +26225,7 @@ ensureReceiverResultRegContainsSelf(); /* begin genPushMaybeContextSlotIndex: */ assert(needsFrame); - if (callerSavedRegMask & (1LL << ReceiverResultReg)) { + if (CallerSavedRegisterMask & (1LL << ReceiverResultReg)) { /* We have no way of reloading ReceiverResultReg since we need the inst var value as the result. */ (optStatus.isReceiverResultRegLive = 0); @@ -26979,6 +27128,7 @@ AbstractInstruction *anInstruction; sqInt association; sqInt topReg; + sqInt topReg1; assert(needsFrame); /* begin genLoadLiteralVariable:in: */ @@ -26998,17 +27148,27 @@ /* begin genStorePop:slotIndex:destReg:needsStoreCheck:needsRestoreRcvr: */ # if IMMUTABILITY - /* begin genImmCheckStorePop:slotIndex:destReg:needsStoreCheck:needsRestoreRcvr: */ - ssAllocateRequiredReg(ClassReg); - ssStoreAndReplacePoptoReg(popBoolean, ClassReg); - ssFlushTo(simStackPtr); - genStoreWithImmutabilityCheckSourceRegslotIndexdestRegscratchRegneedsStoreCheckneedRestoreRcvr(ClassReg, ValueIndex, ReceiverResultReg, TempReg, needsStoreCheck, 0); + if (needsTwoPath) { + /* first path, receiver is mutable */ + /* begin genVanillaStorePop:slotIndex:destReg:needsStoreCheck: */ + topReg = allocateRegForStackEntryAtnotConflictingWith(0, 1LL << ReceiverResultReg); + ssStorePoptoReg(popBoolean, topReg); + genStoreSourceRegslotIndexdestRegscratchReginFrameneedsStoreCheck(topReg, ValueIndex, ReceiverResultReg, TempReg, needsFrame, needsStoreCheck); + } + else { + /* begin genImmCheckStorePop:slotIndex:destReg:needsStoreCheck:needsRestoreRcvr: */ + ssAllocateRequiredReg(ClassReg); + ssStoreAndReplacePoptoReg(popBoolean, ClassReg); + ssFlushTo(simStackPtr); + genStoreWithImmutabilityCheckSourceRegslotIndexdestRegscratchRegneedsStoreCheckneedRestoreRcvr(ClassReg, ValueIndex, ReceiverResultReg, TempReg, needsStoreCheck, 0); + } + # else /* IMMUTABILITY */ /* begin genVanillaStorePop:slotIndex:destReg:needsStoreCheck: */ - topReg = allocateRegForStackEntryAtnotConflictingWith(0, 1LL << ReceiverResultReg); - ssStorePoptoReg(popBoolean, topReg); - genStoreSourceRegslotIndexdestRegscratchReginFrameneedsStoreCheck(topReg, ValueIndex, ReceiverResultReg, TempReg, needsFrame, needsStoreCheck); + topReg1 = allocateRegForStackEntryAtnotConflictingWith(0, 1LL << ReceiverResultReg); + ssStorePoptoReg(popBoolean, topReg1); + genStoreSourceRegslotIndexdestRegscratchReginFrameneedsStoreCheck(topReg1, ValueIndex, ReceiverResultReg, TempReg, needsFrame, needsStoreCheck); # endif /* IMMUTABILITY */ @@ -27108,23 +27268,34 @@ genStorePopReceiverVariableneedsStoreCheck(sqInt popBoolean, sqInt slotIndex, sqInt needsStoreCheck) { sqInt topReg; + sqInt topReg1; ssFlushUpThroughReceiverVariable(slotIndex); ensureReceiverResultRegContainsSelf(); /* begin genStorePop:slotIndex:destReg:needsStoreCheck:needsRestoreRcvr: */ # if IMMUTABILITY - /* begin genImmCheckStorePop:slotIndex:destReg:needsStoreCheck:needsRestoreRcvr: */ - ssAllocateRequiredReg(ClassReg); - ssStoreAndReplacePoptoReg(popBoolean, ClassReg); - ssFlushTo(simStackPtr); - genStoreWithImmutabilityCheckSourceRegslotIndexdestRegscratchRegneedsStoreCheckneedRestoreRcvr(ClassReg, slotIndex, ReceiverResultReg, TempReg, needsStoreCheck, 1); + if (needsTwoPath) { + /* first path, receiver is mutable */ + /* begin genVanillaStorePop:slotIndex:destReg:needsStoreCheck: */ + topReg = allocateRegForStackEntryAtnotConflictingWith(0, 1LL << ReceiverResultReg); + ssStorePoptoReg(popBoolean, topReg); + genStoreSourceRegslotIndexdestRegscratchReginFrameneedsStoreCheck(topReg, slotIndex, ReceiverResultReg, TempReg, needsFrame, needsStoreCheck); + } + else { + /* begin genImmCheckStorePop:slotIndex:destReg:needsStoreCheck:needsRestoreRcvr: */ + ssAllocateRequiredReg(ClassReg); + ssStoreAndReplacePoptoReg(popBoolean, ClassReg); + ssFlushTo(simStackPtr); + genStoreWithImmutabilityCheckSourceRegslotIndexdestRegscratchRegneedsStoreCheckneedRestoreRcvr(ClassReg, slotIndex, ReceiverResultReg, TempReg, needsStoreCheck, 1); + } + # else /* IMMUTABILITY */ /* begin genVanillaStorePop:slotIndex:destReg:needsStoreCheck: */ - topReg = allocateRegForStackEntryAtnotConflictingWith(0, 1LL << ReceiverResultReg); - ssStorePoptoReg(popBoolean, topReg); - genStoreSourceRegslotIndexdestRegscratchReginFrameneedsStoreCheck(topReg, slotIndex, ReceiverResultReg, TempReg, needsFrame, needsStoreCheck); + topReg1 = allocateRegForStackEntryAtnotConflictingWith(0, 1LL << ReceiverResultReg); + ssStorePoptoReg(popBoolean, topReg1); + genStoreSourceRegslotIndexdestRegscratchReginFrameneedsStoreCheck(topReg1, slotIndex, ReceiverResultReg, TempReg, needsFrame, needsStoreCheck); # endif /* IMMUTABILITY */ @@ -27207,6 +27378,7 @@ { AbstractInstruction *abstractInstruction; AbstractInstruction *abstractInstruction1; + sqInt framelessReturn; sqInt offset; @@ -27222,7 +27394,17 @@ (abstractInstruction->annotation = HasBytecodePC); return 0; } - if (needsFrame) { + +# if IMMUTABILITY + framelessReturn = needsFrame + && (!needsTwoPath); + +# else /* IMMUTABILITY */ + framelessReturn = needsFrame; + +# endif /* IMMUTABILITY */ + + if (framelessReturn) { /* begin MoveR:R: */ genoperandoperand(MoveRR, FPReg, SPReg); /* begin PopR: */ @@ -27871,6 +28053,12 @@ needsFrame = 0; prevBCDescriptor = null; + +# if IMMUTABILITY + needsTwoPath = 0; + +# endif /* IMMUTABILITY */ + numIRCs = 0; if ((primitiveIndex > 0) @@ -27895,6 +28083,21 @@ && (pc >= latestContinuation)) { endPC = pc; } + +# if IMMUTABILITY + if (!(needsFrame + && (!needsTwoPath))) { + if ((((descriptor->needsFrameFunction)) == null) + || (((descriptor->needsFrameFunction))(framelessStackDelta))) { + needsFrame = 1; + needsTwoPath = ((descriptor->generator)) == genStoreAndPopReceiverVariableBytecode; + } + else { + framelessStackDelta += (descriptor->stackDelta); + } + } + +# else /* IMMUTABILITY */ if (!needsFrame) { if ((((descriptor->needsFrameFunction)) == null) || (((descriptor->needsFrameFunction))(framelessStackDelta))) { @@ -27904,6 +28107,9 @@ framelessStackDelta += (descriptor->stackDelta); } } + +# endif /* IMMUTABILITY */ + if (isBranch(descriptor)) { distance = ((descriptor->spanFunction))(descriptor, pc, nExts, methodObj); targetPC = (pc + ((descriptor->numBytes))) + distance; @@ -27945,7 +28151,7 @@ static void NoDbgRegParms ssAllocateCallReg(sqInt requiredReg) { - ssAllocateRequiredRegMaskupThrough(callerSavedRegMask | (1LL << requiredReg), simStackPtr); + ssAllocateRequiredRegMaskupThrough(CallerSavedRegisterMask | (1LL << requiredReg), simStackPtr); } @@ -27957,7 +28163,7 @@ static void NoDbgRegParms ssAllocateCallRegand(sqInt requiredReg1, sqInt requiredReg2) { - ssAllocateRequiredRegMaskupThrough(callerSavedRegMask | ((1LL << requiredReg1) | (1LL << requiredReg2)), simStackPtr); + ssAllocateRequiredRegMaskupThrough(CallerSavedRegisterMask | ((1LL << requiredReg1) | (1LL << requiredReg2)), simStackPtr); } @@ -27969,7 +28175,7 @@ static void NoDbgRegParms ssAllocateCallRegandand(sqInt requiredReg1, sqInt requiredReg2, sqInt requiredReg3) { - ssAllocateRequiredRegMaskupThrough(callerSavedRegMask | ((1LL << requiredReg1) | ((1LL << requiredReg2) | (1LL << requiredReg3))), simStackPtr); + ssAllocateRequiredRegMaskupThrough(CallerSavedRegisterMask | ((1LL << requiredReg1) | ((1LL << requiredReg2) | (1LL << requiredReg3))), simStackPtr); } /* StackToRegisterMappingCogit>>#ssAllocateRequiredRegMask:upThrough: */ Modified: branches/Cog/nsspur64src/vm/cointerp.c =================================================================== --- branches/Cog/nsspur64src/vm/cointerp.c 2016-05-26 20:01:37 UTC (rev 3732) +++ branches/Cog/nsspur64src/vm/cointerp.c 2016-06-01 19:32:08 UTC (rev 3733) @@ -1,9 +1,9 @@ /* Automatically generated by - CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 + CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e from - CoInterpreter VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 + CoInterpreter VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e */ -static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 " __DATE__ ; +static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e " __DATE__ ; char *__interpBuildInfo = __buildInfo; @@ -2452,7 +2452,7 @@ }; sqInt checkedPluginName; char expensiveAsserts = 0; -const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1872"; +const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1876"; sqInt minBackwardJumpCountForCompile = MinBackwardJumpCountForCompile /* 40 */; volatile int sendTrace; @@ -40930,7 +40930,7 @@ sqInt oopRcvr; sqInt oopResult; usqLong result; - sqInt resultIsNegative; + int resultIsNegative; char *sp; oopArg = longAt(GIV(stackPointer) + (0 * BytesPerWord)); @@ -61627,7 +61627,7 @@ usqInt prevFree; usqInt prevFreeChunk; usqInt prevPrevFree; - usqInt prevPrevFreeChunk; + sqInt prevPrevFreeChunk; sqInt slotBytes; sqInt slotBytes1; usqInt there; @@ -67437,7 +67437,7 @@ bridgeFromto(SpurSegmentInfo *aSegment, SpurSegmentInfo *nextSegmentOrNil) { usqInt bridgeSpan; - usqInt clifton; + sqInt clifton; usqInt segEnd; segEnd = ((aSegment->segSize)) + ((aSegment->segStart)); @@ -67618,7 +67618,7 @@ static void postSnapshot(void) { DECL_MAYBE_SQ_GLOBAL_STRUCT - usqInt address; + sqInt address; sqInt bytes; usqInt freeChunk; sqInt i; @@ -67681,7 +67681,7 @@ sqInt limit; sqInt newEndOfMemory; sqInt next; - usqInt node; + sqInt node; usqInt numSlots; usqInt numSlots1; SpurSegmentInfo *seg; @@ -68024,8 +68024,8 @@ { usqLong firstSavedBridgeWord; sqInt nWritten; - usqInt pier1; - usqInt pier2; + sqInt pier1; + sqInt pier2; usqLong secondSavedBridgeWord; pier1 = (((segment->segSize)) + ((segment->segStart))) - (2 * BaseHeaderSize); Modified: branches/Cog/nsspur64src/vm/cointerp.h =================================================================== --- branches/Cog/nsspur64src/vm/cointerp.h 2016-05-26 20:01:37 UTC (rev 3732) +++ branches/Cog/nsspur64src/vm/cointerp.h 2016-06-01 19:32:08 UTC (rev 3733) @@ -1,5 +1,5 @@ /* Automatically generated by - CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 + CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e */ Modified: branches/Cog/nsspur64src/vm/gcc3x-cointerp.c =================================================================== --- branches/Cog/nsspur64src/vm/gcc3x-cointerp.c 2016-05-26 20:01:37 UTC (rev 3732) +++ branches/Cog/nsspur64src/vm/gcc3x-cointerp.c 2016-06-01 19:32:08 UTC (rev 3733) @@ -2,11 +2,11 @@ /* Automatically generated by - CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 + CCodeGeneratorGlobalStructure VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e from - CoInterpreter VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 + CoInterpreter VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e */ -static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 " __DATE__ ; +static char __buildInfo[] = "CoInterpreter VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e " __DATE__ ; char *__interpBuildInfo = __buildInfo; @@ -2455,7 +2455,7 @@ }; sqInt checkedPluginName; char expensiveAsserts = 0; -const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1872"; +const char *interpreterVersion = "Newspeak Virtual Machine CoInterpreterPrimitives_VMMaker.oscog-eem.1876"; sqInt minBackwardJumpCountForCompile = MinBackwardJumpCountForCompile /* 40 */; volatile int sendTrace; @@ -40939,7 +40939,7 @@ sqInt oopRcvr; sqInt oopResult; usqLong result; - sqInt resultIsNegative; + int resultIsNegative; char *sp; oopArg = longAt(GIV(stackPointer) + (0 * BytesPerWord)); @@ -61636,7 +61636,7 @@ usqInt prevFree; usqInt prevFreeChunk; usqInt prevPrevFree; - usqInt prevPrevFreeChunk; + sqInt prevPrevFreeChunk; sqInt slotBytes; sqInt slotBytes1; usqInt there; @@ -67446,7 +67446,7 @@ bridgeFromto(SpurSegmentInfo *aSegment, SpurSegmentInfo *nextSegmentOrNil) { usqInt bridgeSpan; - usqInt clifton; + sqInt clifton; usqInt segEnd; segEnd = ((aSegment->segSize)) + ((aSegment->segStart)); @@ -67627,7 +67627,7 @@ static void postSnapshot(void) { DECL_MAYBE_SQ_GLOBAL_STRUCT - usqInt address; + sqInt address; sqInt bytes; usqInt freeChunk; sqInt i; @@ -67690,7 +67690,7 @@ sqInt limit; sqInt newEndOfMemory; sqInt next; - usqInt node; + sqInt node; usqInt numSlots; usqInt numSlots1; SpurSegmentInfo *seg; @@ -68033,8 +68033,8 @@ { usqLong firstSavedBridgeWord; sqInt nWritten; - usqInt pier1; - usqInt pier2; + sqInt pier1; + sqInt pier2; usqLong secondSavedBridgeWord; pier1 = (((segment->segSize)) + ((segment->segStart))) - (2 * BaseHeaderSize); Modified: branches/Cog/nsspursrc/vm/cogit.h =================================================================== --- branches/Cog/nsspursrc/vm/cogit.h 2016-05-26 20:01:37 UTC (rev 3732) +++ branches/Cog/nsspursrc/vm/cogit.h 2016-06-01 19:32:08 UTC (rev 3733) @@ -1,5 +1,5 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1872 uuid: 6db6d610-b1a5-4f4d-978d-22c917bdb3e4 + CCodeGenerator VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e */ Modified: branches/Cog/nsspursrc/vm/cogitARMv5.c =================================================================== --- branches/Cog/nsspursrc/vm/cogitARMv5.c 2016-05-26 20:01:37 UTC (rev 3732) +++ branches/Cog/nsspursrc/vm/cogitARMv5.c 2016-06-01 19:32:08 UTC (rev 3733) @@ -1,9 +1,9 @@ /* Automatically generated by - CCodeGenerator VMMaker.oscog-eem.1860 uuid: 4d58d995-ee0c-4330-9190-adfa038e8f24 + CCodeGenerator VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e from - StackToRegisterMappingCogit VMMaker.oscog-eem.1860 uuid: 4d58d995-ee0c-4330-9190-adfa038e8f24 + StackToRegisterMappingCogit VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e */ -static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1860 uuid: 4d58d995-ee0c-4330-9190-adfa038e8f24 " __DATE__ ; +static char __buildInfo[] = "StackToRegisterMappingCogit VMMaker.oscog-eem.1876 uuid: 28e91d90-4197-436d-9702-7c7dae02e85e " __DATE__ ; char *__cogitBuildInfo = __buildInfo; @@ -39,8 +39,8 @@ #define AndOpcode 0 #define AndRR 91 #define AnnotationShift 5 -#define Arg0Reg 4 -#define Arg1Reg 5 +#define Arg0Reg 3 +#define Arg1Reg 4 #define ArithmeticShiftRightCqR 80 #define ArithmeticShiftRightRR 81 #define BadRegisterSet 1 @@ -52,6 +52,7 @@ #define CArg2Reg 2 #define CArg3Reg 3 #define Call 6 +#define CallerSavedRegisterMask 0x120C #define CallFull 7 #define CC 3 #if !defined(CheckRememberedInTrampoline) /* Allow this to be overridden on the compiler command line */ @@ -61,7 +62,7 @@ #define ClassBlockClosureCompactIndex 37 #define ClassFloatCompactIndex 34 #define ClassMethodContextCompactIndex 36 -#define ClassReg 8 +#define ClassReg 2 #define ClosureFirstCopiedValueIndex 3 #define ClosureIndex 4 #define ClosureNumArgsIndex 2 @@ -73,7 +74,7 @@ #define CMMaxUsageCount 7 #define CMMethod 2 #define CMOpenPIC 5 -#define CMPSMULL 121 +#define CMPSMULL 123 #define CmpC32R 102 #define CmpCqR 94 #define CmpCwR 101 @@ -96,7 +97,9 @@ #define DPFPReg2 2 #define EncounteredUnknownBytecode -6 #define EQ 0 -#define Extra0Reg 9 +#define Extra0Reg 7 +#define Extra1Reg 8 +#define Extra2Reg 9 #define Fill32 4 #define FirstAnnotation 64 #define FirstJump 11 @@ -249,6 +252,7 @@ #define PC 15 #define PCReg 15 #define PL 5 +#define PopLDM 119 #define PopR 72 #define PrefetchAw 76 #define PrimCallCollectsProfileSamples 8 @@ -261,9 +265,10 @@ #define PushCq 74 #define PushCw 75 #define PushR 73 +#define PushSTM 120 #define R0 0 #define ReceiverIndex 5 -#define ReceiverResultReg 7 +#define ReceiverResultReg 5 #define RetN 8 #define RISCTempReg 12 #define RsbOpcode 3 @@ -445,7 +450,6 @@ static sqInt NoDbgRegParms bicsrnimmror(AbstractInstruction * self_in_bicsrnimmror, sqInt destReg, sqInt srcReg, sqInt immediate, sqInt rot); static sqInt NoDbgRegParms bl(AbstractInstruction * self_in_bl, sqInt offset); static sqInt NoDbgRegParms b(AbstractInstruction * self_in_b, sqInt offset); -static sqInt NoDbgRegParms callerSavedRegisterMask(AbstractInstruction * self_in_callerSavedRegisterMask); static sqInt NoDbgRegParms callInstructionByteSize(AbstractInstruction * self_in_callInstructionByteSize); static sqInt NoDbgRegParms callTargetFromReturnAddress(AbstractInstruction * self_in_callTargetFromReturnAddress, sqInt callSiteReturnAddress); static sqInt NoDbgRegParms computeMaximumSize(AbstractInstruction * self_in_computeMaximumSize); @@ -456,6 +460,7 @@ static void NoDbgRegParms concretizeConditionalInstruction(AbstractInstruction * self_in_concretizeConditionalInstruction); static usqInt NoDbgRegParms concretizeFill32(AbstractInstruction * self_in_concretizeFill32); static usqInt NoDbgRegParms concretizeMSR(AbstractInstruction * self_in_concretizeMSR); +static usqInt NoDbgRegParms concretizePushOrPopMultipleRegisters(AbstractInstruction * self_in_concretizePushOrPopMultipleRegisters, sqInt doPush); static usqInt NoDbgRegParms concretizeSMULL(AbstractInstruction * self_in_concretizeSMULL); static sqInt NoDbgRegParms conditionIsNotNever(AbstractInstruction * self_in_conditionIsNotNever, sqInt instr); static sqInt NoDbgRegParms dataOpTyperdrnrmlsr(AbstractInstruction * self_in_dataOpTyperdrnrmlsr, sqInt armOpcode, sqInt destReg, sqInt srcReg, sqInt addReg, sqInt shft); @@ -472,8 +477,6 @@ static AbstractInstruction * NoDbgRegParms genPushRegisterArgsForNumArgsscratchReg(AbstractInstruction * self_in_genPushRegisterArgsForNumArgsscratchReg, sqInt numArgs, sqInt ignored); static sqInt NoDbgRegParms genRemoveNArgsFromStack(AbstractInstruction * self_in_genRemoveNArgsFromStack, sqInt n); static AbstractInstruction * NoDbgRegParms genRestoreRegsExcept(AbstractInstruction * self_in_genRestoreRegsExcept, sqInt abstractReg); -static sqInt NoDbgRegParms genRestoreRegs(AbstractInstruction * self_in_genRestoreRegs, sqInt regMask); -static sqInt NoDbgRegParms genSaveRegs(AbstractInstruction * self_in_genSaveRegs, sqInt regMask); static sqInt NoDbgRegParms genSaveStackPointers(AbstractInstruction * self_in_genSaveStackPointers); static AbstractInstruction * NoDbgRegParms genSubstituteReturnAddress(AbstractInstruction * self_in_genSubstituteReturnAddress, sqInt retpc); static sqInt NoDbgRegParms instructionBeforeAddress(AbstractInstruction * self_in_instructionBeforeAddress, sqInt followingAddress); @@ -569,7 +572,9 @@ static sqInt NoDbgRegParms blockCreationBytecodeSizeForHeader(sqInt aMethodHeader); static sqInt NoDbgRegParms blockDispatchTargetsForperformarg(CogMethod *cogMethod, usqInt (*binaryFunction)(sqInt mcpc, sqInt arg), sqInt arg); extern sqInt bytecodePCForstartBcpcin(sqInt mcpc, sqInt startbcpc, CogBlockMethod *cogMethod); +static AbstractInstruction * NoDbgRegParms CallFullRTregistersToBeSavedMask(sqInt callTarget, sqInt registersToBeSaved); static AbstractInstruction * NoDbgRegParms CallNewspeakSend(sqInt callTarget); +static AbstractInstruction * NoDbgRegParms CallRTregistersToBeSavedMask(sqInt callTarget, sqInt registersToBeSaved); static AbstractInstruction * NoDbgRegParms gCall(sqInt callTarget); static AbstractInstruction * NoDbgRegParms gCmpCqR(sqInt quickConstant, sqInt reg); static AbstractInstruction * NoDbgRegParms gCmpCwR(sqInt wordConstant, sqInt reg); @@ -703,7 +708,7 @@ static AbstractInstruction * NoDbgRegParms gMoveMwrR(sqInt offset, sqInt baseReg, sqInt destReg); static AbstractInstruction * NoDbgRegParms gMoveRMwr(sqInt sourceReg, sqInt offset, sqInt baseReg); static AbstractInstruction * NoDbgRegParms gMoveRR(sqInt reg1, sqInt reg2); -static sqInt NoDbgRegParms mapEndFor(CogMethod *cogMethod); +static usqInt NoDbgRegParms mapEndFor(CogMethod *cogMethod); static sqInt NoDbgRegParms mapForperformUntilarg(CogMethod *cogMethod, sqInt (*functionSymbol)(sqInt annotation, char *mcpc, sqInt arg), sqInt arg); static sqInt NoDbgRegParms mapObjectReferencesInClosedPIC(CogMethod *cPIC); static void mapObjectReferencesInGeneratedRuntime(void); @@ -734,7 +739,7 @@ static sqInt NoDbgRegParms needsFrameNever(sqInt stackDelta); static sqInt NoDbgRegParms noAssertMethodClassAssociationOf(sqInt methodPointer); static sqInt noCogMethodsMaximallyMarked(void); -static sqInt NoDbgRegParms noTargetsFreeInClosedPIC(sqInt cPIC); +static sqInt NoDbgRegParms noTargetsFreeInClosedPIC(CogMethod *cPIC); static sqInt NoDbgRegParms outputInstructionsAt(sqInt startAddress); static sqInt NoDbgRegParms outputInstructionsForGeneratedRuntimeAt(sqInt startAddress); static AbstractInstruction * NoDbgRegParms gPopR(sqInt reg); @@ -992,9 +997,7 @@ static sqInt NoDbgRegParms registerMask(SimStackEntry * self_in_registerMask); static sqInt NoDbgRegParms registerOrNone(SimStackEntry * self_in_registerOrNone); static SimStackEntry * NoDbgRegParms storeToReg(SimStackEntry * self_in_storeToReg, sqInt reg); -static sqInt NoDbgRegParms isBackwardBranchFixup(BytecodeFixup * self_in_isBackwardBranchFixup); static sqInt NoDbgRegParms isMergeFixup(BytecodeFixup * self_in_isMergeFixup); -static sqInt NoDbgRegParms isMergeFixupOrIsFixedUp(BytecodeFixup * self_in_isMergeFixupOrIsFixedUp); static AbstractInstruction * NoDbgRegParms allocateLiteral(sqInt aLiteral); static AbstractInstruction * NoDbgRegParms checkLiteralforInstruction(sqInt literal, AbstractInstruction *anInstruction); static sqInt NoDbgRegParms dumpLiterals(sqInt generateBranchAround); @@ -1117,6 +1120,9 @@ static CogMethod * NoDbgRegParms compileCogMethod(sqInt selector); static sqInt compileEntireMethod(void); static void compileFrameBuild(void); +#if IMMUTABILITY +static void compileTwoPathFrameBuild(void); +#endif /* IMMUTABILITY */ static sqInt NoDbgRegParms cPICMissTrampolineFor(sqInt numArgs); static sqInt doubleExtendedDoAnythingBytecode(void); static sqInt duplicateTopBytecode(void); @@ -1251,7 +1257,6 @@ static sqInt bytecodeSetOffset; void * CFramePointer; void * CStackPointer; -static sqInt callerSavedRegMask; static sqInt cbEntryOffset; static sqInt cbNoSwitchEntryOffset; sqInt ceBaseFrameReturnTrampoline; @@ -1314,6 +1319,7 @@ static sqInt debugFixupBreaks; static sqInt debugOpcodeIndices; unsigned long debugPrimCallStackOffset; +static sqInt debugStackPointers; static sqInt disassemblingMethod; static sqInt dynamicSuperSendTrampolines[NumSendTrampolines]; static AbstractInstruction * endCPICCase0; @@ -1877,6 +1883,7 @@ sqInt missOffset; static usqInt mzFreeStart; static sqInt needsFrame; +static sqInt needsTwoPath; static sqInt nextLiteralIndex; static AbstractInstruction * noCheckEntry; static sqInt numAbstractOpcodes; @@ -1938,7 +1945,6 @@ #define blockAlignment(self) 8 #define blockStartAt(index) (&blockStarts[index]) #define breakOnImplicitReceiver() (traceFlags & 64) -#define callerSavedRegMask() callerSavedRegMask #define ceBaseFrameReturnPC() ceBaseFrameReturnTrampoline #define ceCannotResumePC() ((usqInt)ceCannotResumeTrampoline) #define ceCheckFeatures() ceCheckFeaturesFunction() @@ -2341,6 +2347,12 @@ if (!(liveRegsMask & (1L << Extra0Reg))) { return Extra0Reg; } + if (!(liveRegsMask & (1L << Extra1Reg))) { + return Extra1Reg; + } + if (!(liveRegsMask & (1L << Extra2Reg))) { + return Extra2Reg; + } if (!(liveRegsMask & (1L << Arg1Reg))) { return Arg1Reg; } @@ -2399,23 +2411,6 @@ } -/* According to IHI0042E ARM Architecture Procedure Calling Standard, in - section 5.1.1: - A subroutine must preserve the contents of the registers r4-r8, r10, r11 - and SP (and r9 in PCS variants that designate r9 as v6). - SP = r13, so the callee-saved regs are r4-r8 & r10-r12. - The caller-saved registers are those that are not callee-saved and not - reserved for hardware/abi uses, - i..e r0-r3, r9 & r12. */ - - /* CogARMCompiler>>#callerSavedRegisterMask */ -static sqInt NoDbgRegParms -callerSavedRegisterMask(AbstractInstruction * self_in_callerSavedRegisterMask) -{ - return (((((1L << 0) | (1L << 1)) | (1L << 2)) | (1L << 3)) | (1L << 9)) | (1L << 12); -} - - /* ARM calls and jumps span +/- 32 mb, more than enough for intra-zone calls and jumps. */ @@ -2533,6 +2528,8 @@ case SMULL: case MSR: case CMPSMULL: + case PopLDM: + case PushSTM: case MoveRR: case MoveRdRd: case MoveXbrRR: @@ -2851,7 +2848,18 @@ return ((self_in_concretizeMSR->machineCodeSize) = 4); } + /* CogARMCompiler>>#concretizePushOrPopMultipleRegisters: */ +static usqInt NoDbgRegParms +concretizePushOrPopMultipleRegisters(AbstractInstruction * self_in_concretizePushOrPopMultipleRegisters, sqInt doPush) +{ + assert((((self_in_concretizePushOrPopMultipleRegisters->operands))[0]) != 0); + ((self_in_concretizePushOrPopMultipleRegisters->machineCode))[0] = ((((AL << 28) + ((doPush + ? 146L << 20 + : 139L << 20))) + (SP << 16)) + (((self_in_concretizePushOrPopMultipleRegisters->operands))[0])); + return ((self_in_concretizePushOrPopMultipleRegisters->machineCodeSize) = 4); +} + /* Generate an SMULL loResultReg, hiResultReg, srcA, srcB instruction */ /* CogARMCompiler>>#concretizeSMULL */ @@ -5008,6 +5016,14 @@ concretizeMSR(self_in_dispatchConcretize); return; + case PopLDM: + concretizePushOrPopMultipleRegisters(self_in_dispatchConcretize, 0); + return; + + case PushSTM: + concretizePushOrPopMultipleRegisters(self_in_dispatchConcretize, 1); + return; + case MoveCqR: /* begin concretizeMoveCqR */ word2 = ((self_in_dispatchConcretize->operands))[0]; @@ -5838,7 +5854,6 @@ static AbstractInstruction * NoDbgRegParms genDivRRQuoRem(AbstractInstruction * self_in_genDivRRQuoRem, sqInt abstractRegDivisor, sqInt abstractRegDividend, sqInt abstractRegQuotient, sqInt abstractRegRemainder) { - sqInt callTarget; usqInt divRemFunctionAddr; AbstractInstruction * inst; sqInt rDividend; @@ -5876,12 +5891,8 @@ self_in_saveAndRestoreLinkRegAround = ((AbstractInstruction *) (backEnd())); /* begin PushR: */ inst = genoperand(PushR, LinkReg); - /* begin CallFullRT: */ - callTarget = ((usqInt)divRemFunctionAddr); - /* begin CallFull: */ @@ Diff output truncated at 50000 characters. @@

1 0

VM Maker: VMMaker.oscog-eem.1876.mcz
by commits＠source.squeak.org 01 Jun '16

01 Jun '16

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1876.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1876 Author: eem Time: 1 June 2016, 12:02:13.056404 pm UUID: 28e91d90-4197-436d-9702-7c7dae02e85e Ancestors: VMMaker.oscog-cb.1875 Eliminate the callerSavedRegMask variable and replace it with a CallerSavedRegisterMask variable computed at register initialization time. On ARM: - define the caller-saved registers as the subset of the caller-saved registers that excludes R0/CArg0Reg/TempReg & R1/CArg1Reg (R0 is the C result register), and use R2 & R3 for abstract registers (ClassReg and Arg0Reg). - save and restore elements of the caller-saved registers as appropriate around run-time calls. - use LDM & STM to do the saving. - hence provide two extra registers, now provinding Extra[012]Reg Fix the various nameForRegister: to get a useful printRegisterMap on RISCs that have register arguments in the C calling convention (x64 & ARM). In the simulator, provide the same breakpoiting facilities for "click step" in ABI calls as for run-time calls, and have prntCogMethodFor: print something useful for trampoline addresses.. =============== Diff against VMMaker.oscog-cb.1875 =============== Item was changed: CogAbstractInstruction subclass: #CogARMCompiler instanceVariableNames: 'conditionOrNil' + classVariableNames: 'AL AddOpcode AndOpcode BicOpcode CArg0Reg CArg1Reg CArg2Reg CArg3Reg CC CMPSMULL CPSRReg CS CmpNotOpcode CmpOpcode ConcreteIPReg ConcretePCReg ConcreteVarBaseReg D0 D1 D2 D3 D4 D5 D6 D7 EQ GE GT HI LDMFD LE LR LS LT MI MRS MSR MoveNotOpcode MoveOpcode NE OrOpcode OverflowFlag PC PL PopLDM PushSTM R0 R1 R10 R11 R12 R2 R3 R4 R5 R6 R7 R8 R9 RsbOpcode SMLALOpcode SMULL SP STMFD SubOpcode TstOpcode VC VS XorOpcode' - classVariableNames: 'AL AddOpcode AndOpcode BicOpcode CArg0Reg CArg1Reg CArg2Reg CArg3Reg CC CMPSMULL CPSRReg CS CmpNotOpcode CmpOpcode ConcreteIPReg ConcretePCReg ConcreteVarBaseReg D0 D1 D2 D3 D4 D5 D6 D7 EQ GE GT HI LDMFD LE LR LS LT MI MRS MSR MoveNotOpcode MoveOpcode NE OrOpcode OverflowFlag PC PL R0 R1 R10 R11 R12 R2 R3 R4 R5 R6 R7 R8 R9 RsbOpcode SMLALOpcode SMULL SP STMFD SubOpcode TstOpcode VC VS XorOpcode' poolDictionaries: '' category: 'VMMaker-JIT'! !CogARMCompiler commentStamp: 'lw 8/23/2012 19:38' prior: 0! I generate ARM instructions from CogAbstractInstructions. For reference see http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.set.architectur… The Architecture Reference Manual used is that of version 5, which includes some version 6 instructions. Of those, only pld is used(for PrefetchAw). This class does not take any special action to flush the instruction cache on instruction-modification.! Item was changed: ----- Method: CogARMCompiler class>>initialize (in category 'class initialization') ----- initialize "Initialize various ARM instruction-related constants." "CogARMCompiler initialize" super initialize. self ~~ CogARMCompiler ifTrue: [^self]. "ARM general registers" R0 := 0. R1 := 1. R2 := 2. R3 := 3. R4 := 4. R5 := 5. R6 := 6. R7 := 7. R8 := 8. R9 := 9. R10 := 10. R11 := 11. R12 := 12. SP := 13. LR := 14. PC := 15. "ARM VFP Double precision floating point registers" D0 := 0. D1 := 1. D2 := 2. D3 := 3. D4 := 4. D5 := 5. D6 := 6. D7 := 7. CArg0Reg := 0. CArg1Reg := 1. CArg2Reg := 2. CArg3Reg := 3. ConcreteVarBaseReg := 10. ConcreteIPReg := 12. "IP, The Intra-Procedure-call scratch register." ConcretePCReg := 15. "Condition Codes. Note that cc=16rF is NOT ALLOWED as a condition; it specifies an extension instruction. See e.g.ARM_ARM v5 DDI01001.pdf A3.2.1" EQ := 0. NE := 1. CS := 2. CC := 3. MI := 4. PL := 5. VS := 6. VC := 7. HI := 8. LS := 9. GE := 10. LT := 11. GT := 12. LE := 13. AL := 14. "Table A3-2 in sec A3.4 Data-processing instructions of the AARM." AddOpcode := 4. AndOpcode := 0. BicOpcode := 14. CmpOpcode := 10. CmpNotOpcode := 11. MoveOpcode := 13. MoveNotOpcode := 15. OrOpcode := 12. RsbOpcode := 3. SMLALOpcode := 7. SubOpcode := 2. TstOpcode := 8. XorOpcode := 1. CPSRReg := 16. OverflowFlag := 1 << 28. "Specific instructions" self + initializeSpecificOpcodes: #(SMULL MSR MRS PopLDM PushSTM LDMFD STMFD CMPSMULL) - initializeSpecificOpcodes: #(SMULL MSR MRS LDMFD STMFD CMPSMULL) in: thisContext method! Item was changed: ----- Method: CogARMCompiler class>>initializeAbstractRegisters (in category 'class initialization') ----- initializeAbstractRegisters "Assign the abstract registers with the identities/indices of the relevant concrete registers." - "N.B. According to BSABI, R0-R3 are caller-save, R4-R12 are callee save. - Note that R9 might be a special register for the implementation. In some slides - it is refered to as sb. R10 can contain the stack limit (sl), R11 the fp. R12 is an - intra-procedure scratch instruction pointer for link purposes. It can also be used. - R10 is used as temporary inside a single abstract opcode implementation" - "R0-R3 are used when calling back to the interpreter. Using them would require - saving and restoring their values, so they are omitted so far. R12 is the only - scratch register at the moment.." - super initializeAbstractRegisters. + "According to IHI0042E ARM Architecture Procedure Calling Standard, in section 5.1.1: + A subroutine must preserve the contents of the registers r4-r8, r10, r11 and SP (and r9 in PCS variants that designate r9 as v6). + SP = r13, so the callee-saved regs are r4-r8 & r10-r12. + The caller-saved registers are those that are not callee-saved and not reserved for hardware/abi uses, + i..e r0-r3, r9 & r12. + We exclude registers 0 & 1 (TempReg/CArg0Reg & CArg1Reg) from the CallerSavedRegisterMask because we only + use them for argument passing and so never want to save and restore them. In fact restoring TempReg/CArg0Reg + would overwrite function results, so it shouldn't be included under any circumstances." + + CallerSavedRegisterMask := self registerMaskFor: "0 and: 1 and:" 2 and: 3 and: 9 and: 12. + TempReg := R0. + ClassReg := R2. + ReceiverResultReg := R5. - ClassReg := R8. - ReceiverResultReg := R7. SendNumArgsReg := R6. SPReg := SP. "a.k.a. R13" self assert: SP = 13. FPReg := R11. + Arg0Reg := R3. "overlaps with last C arg reg" + Arg1Reg := R4. + Extra0Reg := R7. + Extra1Reg := R8. + Extra2Reg := R9. - Arg0Reg := R4. - Arg1Reg := R5. - Extra0Reg := R9. VarBaseReg := R10. "Must be callee saved" self assert: ConcreteVarBaseReg = R10. RISCTempReg := R12. "a.k.a. IP" self assert: ConcreteIPReg = R12. LinkReg := LR. "R14" PCReg := PC. "R15" DPFPReg0 := D0. DPFPReg1 := D1. DPFPReg2 := D2. DPFPReg3 := D3. DPFPReg4 := D4. DPFPReg5 := D5. DPFPReg6 := D6. + DPFPReg7 := D7! - DPFPReg7 := D7 - ! Item was changed: ----- Method: CogARMCompiler>>availableRegisterOrNoneFor: (in category 'register allocation') ----- availableRegisterOrNoneFor: liveRegsMask "Answer an unused abstract register in the liveRegMask. Subclasses with more registers can override to answer them. N.B. Do /not/ allocate TempReg." <returnTypeC: #sqInt> (cogit register: Extra0Reg isInMask: liveRegsMask) ifFalse: [^Extra0Reg]. + (cogit register: Extra1Reg isInMask: liveRegsMask) ifFalse: + [^Extra1Reg]. + (cogit register: Extra2Reg isInMask: liveRegsMask) ifFalse: + [^Extra2Reg]. ^super availableRegisterOrNoneFor: liveRegsMask! Item was removed: - ----- Method: CogARMCompiler>>callerSavedRegisterMask (in category 'accessing') ----- - callerSavedRegisterMask - "According to IHI0042E ARM Architecture Procedure Calling Standard, in section 5.1.1: - A subroutine must preserve the contents of the registers r4-r8, r10, r11 and SP (and r9 in PCS variants that designate r9 as v6). - SP = r13, so the callee-saved regs are r4-r8 & r10-r12. - The caller-saved registers are those that are not callee-saved and not reserved for hardware/abi uses, - i..e r0-r3, r9 & r12." - ^cogit registerMaskFor: 0 and: 1 and: 2 and: 3 and: 9 and: 12! Item was added: + ----- Method: CogARMCompiler>>canPushPopMultipleRegisters (in category 'testing') ----- + canPushPopMultipleRegisters + <inline: true> + ^true! Item was changed: ----- Method: CogARMCompiler>>computeMaximumSize (in category 'generate machine code') ----- computeMaximumSize "Because we don't use Thumb, each ARM instruction has 4 bytes. Many abstract opcodes need more than one instruction. Instructions that refer to constants and/or literals depend on literals being stored in-line or out-of-line. N.B. The ^N forms are to get around the bytecode compiler's long branch limits which are exceeded when each case jumps around the otherwise." opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^0]. [Literal] -> [^4]. [AlignmentNops] -> [^(operands at: 0) - 4]. [Fill32] -> [^4]. [Nop] -> [^4]. "Control" [Call] -> [^4]. [CallFull] -> [^self literalLoadInstructionBytes + 4]. [JumpR] -> [^4]. [Jump] -> [^4]. [JumpFull] -> [^self literalLoadInstructionBytes + 4]. [JumpLong] -> [^4]. [JumpZero] -> [^4]. [JumpNonZero] -> [^4]. [JumpNegative] -> [^4]. [JumpNonNegative] -> [^4]. [JumpOverflow] -> [^4]. [JumpNoOverflow] -> [^4]. [JumpCarry] -> [^4]. [JumpNoCarry] -> [^4]. [JumpLess] -> [^4]. [JumpGreaterOrEqual] -> [^4]. [JumpGreater] -> [^4]. [JumpLessOrEqual] -> [^4]. [JumpBelow] -> [^4]. [JumpAboveOrEqual] -> [^4]. [JumpAbove] -> [^4]. [JumpBelowOrEqual] -> [^4]. [JumpLongZero] -> [^4]. [JumpLongNonZero] -> [^4]. [JumpFPEqual] -> [^8]. [JumpFPNotEqual] -> [^8]. [JumpFPLess] -> [^8]. [JumpFPGreaterOrEqual]-> [^8]. [JumpFPGreater] -> [^8]. [JumpFPLessOrEqual] -> [^8]. [JumpFPOrdered] -> [^8]. [JumpFPUnordered] -> [^8]. [RetN] -> [^(operands at: 0) = 0 ifTrue: [4] ifFalse: [8]]. [Stop] -> [^4]. "Arithmetic" [AddCqR] -> [^self rotateable8bitSignedImmediate: (operands at: 0) ifTrue: [:r :i :n| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [AndCqR] -> [^self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| 4] ifFalse: [self literalLoadInstructionBytes = 4 ifTrue: [8] ifFalse: [1 << (operands at: 0) highBit = ((operands at: 0) + 1) ifTrue: [8] ifFalse: [self literalLoadInstructionBytes + 4]]]]. [AndCqRR] -> [^self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| 4] ifFalse: [self literalLoadInstructionBytes = 4 ifTrue: [8] ifFalse: [1 << (operands at: 0) highBit = ((operands at: 0) + 1) ifTrue: [8] ifFalse: [self literalLoadInstructionBytes + 4]]]]. [CmpCqR] -> [^self rotateable8bitSignedImmediate: (operands at: 0) ifTrue: [:r :i :n| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [OrCqR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [SubCqR] -> [^self rotateable8bitSignedImmediate: (operands at: 0) ifTrue: [:r :i :n| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [TstCqR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [XorCqR] -> [^self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| 4] ifFalse: [self literalLoadInstructionBytes = 4 ifTrue: [8] ifFalse: [1 << (operands at: 0) highBit = ((operands at: 0) + 1) ifTrue: [8] ifFalse: [self literalLoadInstructionBytes + 4]]]]. [AddCwR] -> [^self literalLoadInstructionBytes + 4]. [AndCwR] -> [^self literalLoadInstructionBytes + 4]. [CmpCwR] -> [^self literalLoadInstructionBytes + 4]. [OrCwR] -> [^self literalLoadInstructionBytes + 4]. [SubCwR] -> [^self literalLoadInstructionBytes + 4]. [XorCwR] -> [^self literalLoadInstructionBytes + 4]. [AddRR] -> [^4]. [AndRR] -> [^4]. [CmpRR] -> [^4]. [OrRR] -> [^4]. [XorRR] -> [^4]. [SubRR] -> [^4]. [NegateR] -> [^4]. [LoadEffectiveAddressMwrR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [LogicalShiftLeftCqR] -> [^4]. [LogicalShiftRightCqR] -> [^4]. [ArithmeticShiftRightCqR] -> [^4]. [LogicalShiftLeftRR] -> [^4]. [LogicalShiftRightRR] -> [^4]. [ArithmeticShiftRightRR] -> [^4]. [AddRdRd] -> [^4]. [CmpRdRd] -> [^4]. [SubRdRd] -> [^4]. [MulRdRd] -> [^4]. [DivRdRd] -> [^4]. [SqrtRd] -> [^4]. "ARM Specific Arithmetic" [SMULL] -> [^4]. [MSR] -> [^4]. [CMPSMULL] -> [^4]. "special compare for genMulR:R: usage" + "ARM Specific Data Movement" + [PopLDM] -> [^4]. + [PushSTM] -> [^4]. "Data Movement" [MoveCqR] -> [^self literalLoadInstructionBytes = 4 ifTrue: [self literalLoadInstructionBytes] ifFalse: [self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| 4] ifFalse: [self literalLoadInstructionBytes]]]. [MoveCwR] -> [^self literalLoadInstructionBytes = 4 ifTrue: [self literalLoadInstructionBytes] ifFalse: [(self inCurrentCompilation: (operands at: 0)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes]]]. [MoveRR] -> [^4]. [MoveRdRd] -> [^4]. [MoveAwR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRAw] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveAbR] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRAb] -> [^(self isAddressRelativeToVarBase: (operands at: 1)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRMwr] -> [^self is12BitValue: (operands at: 1) ifTrue: [:u :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRdM64r] -> [^self literalLoadInstructionBytes + 4]. [MoveMbrR] -> [^self is12BitValue: (operands at: 0) ifTrue: [:u :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRMbr] -> [^self is12BitValue: (operands at: 1) ifTrue: [:u :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveRM16r] -> [^self is12BitValue: (operands at: 1) ifTrue: [:u :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveM16rR] -> [^self rotateable8bitImmediate: (operands at: 0) ifTrue: [:r :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveM64rRd] -> [^self literalLoadInstructionBytes + 4]. [MoveMwrR] -> [^self is12BitValue: (operands at: 0) ifTrue: [:u :i| 4] ifFalse: [self literalLoadInstructionBytes + 4]]. [MoveXbrRR] -> [^4]. [MoveRXbrR] -> [^4]. [MoveXwrRR] -> [^4]. [MoveRXwrR] -> [^4]. [PopR] -> [^4]. [PushR] -> [^4]. [PushCw] -> [^self literalLoadInstructionBytes = 4 ifTrue: [self literalLoadInstructionBytes + 4] ifFalse: [(self inCurrentCompilation: (operands at: 0)) ifTrue: [8] ifFalse: [self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| 8] ifFalse: [self literalLoadInstructionBytes + 4]]]]. [PushCq] -> [^self literalLoadInstructionBytes = 4 ifTrue: [self literalLoadInstructionBytes + 4] ifFalse: [self rotateable8bitBitwiseImmediate: (operands at: 0) ifTrue: [:r :i :n| 8] ifFalse: [self literalLoadInstructionBytes + 4]]]. [PrefetchAw] -> [^(self isAddressRelativeToVarBase: (operands at: 0)) ifTrue: [4] ifFalse: [self literalLoadInstructionBytes + 4]]. "Conversion" [ConvertRRd] -> [^8]. }. ^0 "to keep C compiler quiet" ! Item was added: + ----- Method: CogARMCompiler>>concretizePushOrPopMultipleRegisters: (in category 'generate machine code - concretize') ----- + concretizePushOrPopMultipleRegisters: doPush + self assert: (operands at: 0) ~= 0. + machineCode at: 0 put: AL << 28 + + (doPush "2r100PUSWL" + ifTrue: [2r10010010 << 20] + ifFalse: [2r10001011 << 20]) + + (SP << 16) + + (operands at: 0). + ^machineCodeSize := 4! Item was changed: ----- Method: CogARMCompiler>>dispatchConcretize (in category 'generate machine code') ----- dispatchConcretize "Attempt to generate concrete machine code for the instruction at address. This is the inner dispatch of concretizeAt: actualAddress which exists only to get around the branch size limits in the SqueakV3 (blue book derived) bytecode set." <returnTypeC: #void> conditionOrNil ifNotNil: [self concretizeConditionalInstruction. ^self]. opcode caseOf: { "Noops & Pseudo Ops" [Label] -> [^self concretizeLabel]. [Literal] -> [^self concretizeLiteral]. [AlignmentNops] -> [^self concretizeAlignmentNops]. [Fill32] -> [^self concretizeFill32]. [Nop] -> [^self concretizeNop]. "Control" [Call] -> [^self concretizeCall]. "call code within code space" [CallFull] -> [^self concretizeCallFull]. "call code anywhere in address space" [JumpR] -> [^self concretizeJumpR]. [JumpFull] -> [^self concretizeJumpFull]."jump within address space" [JumpLong] -> [^self concretizeConditionalJump: AL]."jumps witihn code space" [JumpLongZero] -> [^self concretizeConditionalJump: EQ]. [JumpLongNonZero] -> [^self concretizeConditionalJump: NE]. [Jump] -> [^self concretizeConditionalJump: AL]. [JumpZero] -> [^self concretizeConditionalJump: EQ]. [JumpNonZero] -> [^self concretizeConditionalJump: NE]. [JumpNegative] -> [^self concretizeConditionalJump: MI]. [JumpNonNegative] -> [^self concretizeConditionalJump: PL]. [JumpOverflow] -> [^self concretizeConditionalJump: VS]. [JumpNoOverflow] -> [^self concretizeConditionalJump: VC]. [JumpCarry] -> [^self concretizeConditionalJump: CS]. [JumpNoCarry] -> [^self concretizeConditionalJump: CC]. [JumpLess] -> [^self concretizeConditionalJump: LT]. [JumpGreaterOrEqual] -> [^self concretizeConditionalJump: GE]. [JumpGreater] -> [^self concretizeConditionalJump: GT]. [JumpLessOrEqual] -> [^self concretizeConditionalJump: LE]. [JumpBelow] -> [^self concretizeConditionalJump: CC]. "unsigned lower" [JumpAboveOrEqual] -> [^self concretizeConditionalJump: CS]. "unsigned greater or equal" [JumpAbove] -> [^self concretizeConditionalJump: HI]. [JumpBelowOrEqual] -> [^self concretizeConditionalJump: LS]. [JumpFPEqual] -> [^self concretizeFPConditionalJump: EQ]. [JumpFPNotEqual] -> [^self concretizeFPConditionalJump: NE]. [JumpFPLess] -> [^self concretizeFPConditionalJump: LT]. [JumpFPGreaterOrEqual] -> [^self concretizeFPConditionalJump: GE]. [JumpFPGreater] -> [^self concretizeFPConditionalJump: GT]. [JumpFPLessOrEqual] -> [^self concretizeFPConditionalJump: LE]. [JumpFPOrdered] -> [^self concretizeFPConditionalJump: VC]. [JumpFPUnordered] -> [^self concretizeFPConditionalJump: VS]. [RetN] -> [^self concretizeRetN]. [Stop] -> [^self concretizeStop]. "Arithmetic" [AddCqR] -> [^self concretizeNegateableDataOperationCqR: AddOpcode]. [AndCqR] -> [^self concretizeInvertibleDataOperationCqR: AndOpcode]. [AndCqRR] -> [^self concretizeAndCqRR]. [CmpCqR] -> [^self concretizeNegateableDataOperationCqR: CmpOpcode]. [OrCqR] -> [^self concretizeDataOperationCqR: OrOpcode]. [SubCqR] -> [^self concretizeSubCqR]. [TstCqR] -> [^self concretizeTstCqR]. [XorCqR] -> [^self concretizeInvertibleDataOperationCqR: XorOpcode]. [AddCwR] -> [^self concretizeDataOperationCwR: AddOpcode]. [AndCwR] -> [^self concretizeDataOperationCwR: AndOpcode]. [CmpCwR] -> [^self concretizeDataOperationCwR: CmpOpcode]. [OrCwR] -> [^self concretizeDataOperationCwR: OrOpcode]. [SubCwR] -> [^self concretizeDataOperationCwR: SubOpcode]. [XorCwR] -> [^self concretizeDataOperationCwR: XorOpcode]. [AddRR] -> [^self concretizeDataOperationRR: AddOpcode]. [AndRR] -> [^self concretizeDataOperationRR: AndOpcode]. [CmpRR] -> [^self concretizeDataOperationRR: CmpOpcode]. [OrRR] -> [^self concretizeDataOperationRR: OrOpcode]. [SubRR] -> [^self concretizeDataOperationRR: SubOpcode]. [XorRR] -> [^self concretizeDataOperationRR: XorOpcode]. [AddRdRd] -> [^self concretizeAddRdRd]. [CmpRdRd] -> [^self concretizeCmpRdRd]. [DivRdRd] -> [^self concretizeDivRdRd]. [MulRdRd] -> [^self concretizeMulRdRd]. [SubRdRd] -> [^self concretizeSubRdRd]. [SqrtRd] -> [^self concretizeSqrtRd]. [NegateR] -> [^self concretizeNegateR]. [LoadEffectiveAddressMwrR] -> [^self concretizeLoadEffectiveAddressMwrR]. [ArithmeticShiftRightCqR] -> [^self concretizeArithmeticShiftRightCqR]. [LogicalShiftRightCqR] -> [^self concretizeLogicalShiftRightCqR]. [LogicalShiftLeftCqR] -> [^self concretizeLogicalShiftLeftCqR]. [ArithmeticShiftRightRR] -> [^self concretizeArithmeticShiftRightRR]. [LogicalShiftLeftRR] -> [^self concretizeLogicalShiftLeftRR]. [LogicalShiftRightRR] -> [^self concretizeLogicalShiftRightRR]. "ARM Specific Arithmetic" [SMULL] -> [^self concretizeSMULL] . [CMPSMULL] -> [^self concretizeCMPSMULL]. [MSR] -> [^self concretizeMSR]. + "ARM Specific Data Movement" + [PopLDM] -> [^self concretizePushOrPopMultipleRegisters: false]. + [PushSTM] -> [^self concretizePushOrPopMultipleRegisters: true]. "Data Movement" [MoveCqR] -> [^self concretizeMoveCqR]. [MoveCwR] -> [^self concretizeMoveCwR]. [MoveRR] -> [^self concretizeMoveRR]. [MoveAwR] -> [^self concretizeMoveAwR]. [MoveRAw] -> [^self concretizeMoveRAw]. [MoveAbR] -> [^self concretizeMoveAbR]. [MoveRAb] -> [^self concretizeMoveRAb]. [MoveMbrR] -> [^self concretizeMoveMbrR]. [MoveRMbr] -> [^self concretizeMoveRMbr]. [MoveRM16r] -> [^self concretizeMoveRM16r]. [MoveM16rR] -> [^self concretizeMoveM16rR]. [MoveM64rRd] -> [^self concretizeMoveM64rRd]. [MoveMwrR] -> [^self concretizeMoveMwrR]. [MoveXbrRR] -> [^self concretizeMoveXbrRR]. [MoveRXbrR] -> [^self concretizeMoveRXbrR]. [MoveXwrRR] -> [^self concretizeMoveXwrRR]. [MoveRXwrR] -> [^self concretizeMoveRXwrR]. [MoveRMwr] -> [^self concretizeMoveRMwr]. [MoveRdM64r] -> [^self concretizeMoveRdM64r]. [PopR] -> [^self concretizePopR]. [PushR] -> [^self concretizePushR]. [PushCq] -> [^self concretizePushCq]. [PushCw] -> [^self concretizePushCw]. [PrefetchAw] -> [^self concretizePrefetchAw]. "Conversion" [ConvertRRd] -> [^self concretizeConvertRRd]}! Item was changed: ----- Method: CogARMCompiler>>genDivR:R:Quo:Rem: (in category 'abstract instructions') ----- genDivR: abstractRegDivisor R: abstractRegDividend Quo: abstractRegQuotient Rem: abstractRegRemainder "Currently no instruction level support for divide on ARM. See also #canDivQuoRem" | rDividend rDivisor rQuotient rRemainder divRemFunctionAddr | <var: #divRemFunctionAddr type: #usqInt> self assert: abstractRegDividend ~= abstractRegDivisor. self assert: abstractRegQuotient ~= abstractRegRemainder. rDividend := abstractRegDividend. rDivisor := abstractRegDivisor. + rDividend = CArg0Reg ifFalse: + ["we need to move the value in rDividend to CArg0Reg. Best to double check if rDivisor is already using it first" + rDivisor = CArg0Reg ifTrue: "oh dear; we also need to move rDivisor's value out of the way first.. I'll move it to CArg1Reg and if some nitwit has managed to put rDividend there they deserve the crash" + [rDividend = CArg1Reg ifTrue: + [self error: 'register choices in genDivR:R:Quo:Rem: made life impossible']. - rDividend = CArg0Reg ifFalse:[ - "we need to move the value in rDividend to CArg0Reg. Best to double check if rDivisor is already using it first" - rDivisor = CArg0Reg ifTrue:[ "oh dear; we also need to move rDivisor's value out of the way first.. I'll move it to CArg1Reg and if some nitwit has managed to put rDividend there they deserve the crash" - rDividend = CArg1Reg ifTrue:[self error: 'register choices in genDivR:R:Quo:Rem: made life impossible']. cogit MoveR: rDivisor R: CArg1Reg. "and update rDivisor or we get buggerd by the next clause" rDivisor := CArg1Reg]. + cogit MoveR: rDividend R: CArg0Reg]. + rDivisor = CArg1Reg ifFalse: + [cogit MoveR: rDivisor R: CArg1Reg]. - cogit MoveR: rDividend R: CArg0Reg. - ]. - rDivisor = CArg1Reg ifFalse:[ - cogit MoveR: rDivisor R: CArg1Reg]. divRemFunctionAddr := self aeabiDivModFunctionAddr. cogit backEnd saveAndRestoreLinkRegAround: [cogit CallFullRT: (self cCode: [divRemFunctionAddr asUnsignedInteger] + inSmalltalk: [cogit simulatedTrampolineFor: divRemFunctionAddr]) + registersToBeSavedMask: (cogit registerMaskFor: CArg2Reg and: CArg3Reg)]. - inSmalltalk: [cogit simulatedTrampolineFor: divRemFunctionAddr])]. "Now we need to move the r0/1 results back to rQuotient & rRemainder" rQuotient := abstractRegQuotient. rRemainder := abstractRegRemainder. + rQuotient = CArg0Reg ifFalse: "oh good grief, not again" + [cogit MoveR: CArg0Reg R: rQuotient. + rQuotient = CArg1Reg ifTrue: + [self error: 'register choices in genDivR:R:Quo:Rem: made life impossible'] ]. + rRemainder = CArg1Reg ifFalse: + [cogit MoveR: CArg1Reg R: rRemainder] - rQuotient = CArg0Reg ifFalse:["oh good grief, not again" - cogit MoveR: CArg0Reg R: rQuotient. - rQuotient = CArg1Reg ifTrue:[self error: 'register choices in genDivR:R:Quo:Rem: made life impossible'] ]. - rRemainder = CArg1Reg ifFalse:[ - cogit MoveR: CArg1Reg R: rRemainder]. - ! Item was added: + ----- Method: CogARMCompiler>>genPopRegisterMask: (in category 'generate machine code') ----- + genPopRegisterMask: registersToBeSavedMask + <inline: true> + ^registersToBeSavedMask = 0 + ifTrue: [cogit Label] + ifFalse: [cogit gen: PopLDM operand: registersToBeSavedMask]! Item was added: + ----- Method: CogARMCompiler>>genPushRegisterMask: (in category 'generate machine code') ----- + genPushRegisterMask: registersToBeSavedMask + <inline: true> + ^registersToBeSavedMask = 0 + ifTrue: [cogit Label] + ifFalse: [cogit gen: PushSTM operand: registersToBeSavedMask]! Item was changed: ----- Method: CogARMCompiler>>genRestoreRegs: (in category 'abi') ----- genRestoreRegs: regMask + "Restore the registers in regMask as saved by genSaveRegs:." + <inline: true> + ^self genPopRegisterMask: regMask! - "Restore the registers in regMask as saved by genSaveRegs:. - Restore none, because the ARM ABI only defines callee saved registers, no caller-saved regs." - ^0! Item was changed: ----- Method: CogARMCompiler>>genSaveRegs: (in category 'abi') ----- genSaveRegs: regMask + "Save the registers in regMask for a call into the C run-time from a trampoline" + <inline: true> + ^self genPushRegisterMask: regMask! - "Save the registers in regMask for a call into the C run-time from a trampoline. - Save none, because the ARM ABI only defines callee saved registers, no caller-saved regs." - ^0! Item was changed: ----- Method: CogARMCompiler>>generalPurposeRegisterMap (in category 'disassembly') ----- generalPurposeRegisterMap <doNotGenerate> "Answer a Dictionary from register getter to register index." ^Dictionary newFromPairs: { #r0. R0. + #r1. R1. + #r2. R2. + #r3. R3. #r4. R4. #r5. R5. #r6. R6. #r7. R7. #r8. R8. + #r9. R9. #r10. R10. #r11. R11. #r12. R12 }! Item was changed: ----- Method: CogARMCompiler>>nameForRegister: (in category 'printing') ----- nameForRegister: reg "<Integer>" <doNotGenerate> + | default | + default := super nameForRegister: reg. + ^default last = $? + ifTrue: + [#(LR SP PC CArg0Reg CArg0Reg CArg1Reg CArg2Reg CArg3Reg) + detect: [:sym| (thisContext method methodClass classPool at: sym) = reg] + ifNone: [default]] + ifFalse: + [default]! - reg < 0 ifTrue: - [^super nameForRegister: reg]. - ^#(LR SP PC CArg0Reg CArg0Reg CArg1Reg CArg2Reg CArg3Reg) - detect: [:sym| (thisContext method methodClass classPool at: sym) = reg] - ifNone: [super nameForRegister: reg]! Item was changed: ----- Method: CogAbstractInstruction class>>initializeAbstractRegisters (in category 'class initialization') ----- initializeAbstractRegisters + "Assign the abstract registers with the identities/indices of the relevant concrete registers, + and assign CallerSavedRegisterMask appropriately. - "Assign the abstract registers with the identities/indices of the relevant concrete registers. First set all abstract registers to #undefined via CogAbstractRegisters initialize, and then, each subclasses assigns the subset they choose with values of specific concrete registers." + CallerSavedRegisterMask := #undefined. CogAbstractRegisters initialize! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor: (in category 'register management') ----- + registerMaskFor: reg + ^Cogit basicNew registerMaskFor: reg! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 + ^Cogit basicNew registerMaskFor: reg1 and: reg2! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3 and: reg4! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and:and:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and:and:and:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and:and:and:and:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7 and: reg8 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7 and: reg8! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and:and:and:and:and:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7 and: reg8 and: reg9 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7 and: reg8 and: reg9! Item was added: + ----- Method: CogAbstractInstruction class>>registerMaskFor:and:and:and:and:and:and:and:and:and: (in category 'register management') ----- + registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7 and: reg8 and: reg9 and: reg10 + ^Cogit basicNew registerMaskFor: reg1 and: reg2 and: reg3 and: reg4 and: reg5 and: reg6 and: reg7 and: reg8 and: reg9 and: reg10! Item was removed: - ----- Method: CogAbstractInstruction>>callerSavedRegisterMask (in category 'accessing') ----- - callerSavedRegisterMask - "Answer an abstract register mask as computed by StackToRegisterMappingCogit registerMaskFor:" - self subclassResponsibility! Item was added: + ----- Method: CogAbstractInstruction>>canPushPopMultipleRegisters (in category 'testing') ----- + canPushPopMultipleRegisters + <inline: true> + ^false! Item was changed: SharedPool subclass: #CogAbstractRegisters instanceVariableNames: '' + classVariableNames: 'Arg0Reg Arg1Reg CallerSavedRegisterMask ClassReg DPFPReg0 DPFPReg1 DPFPReg10 DPFPReg11 DPFPReg12 DPFPReg13 DPFPReg14 DPFPReg15 DPFPReg2 DPFPReg3 DPFPReg4 DPFPReg5 DPFPReg6 DPFPReg7 DPFPReg8 DPFPReg9 Extra0Reg Extra1Reg Extra2Reg Extra3Reg Extra4Reg Extra5Reg Extra6Reg Extra7Reg FPReg LinkReg NoReg PCReg RISCTempReg ReceiverResultReg SPReg SendNumArgsReg TempReg VarBaseReg' - classVariableNames: 'Arg0Reg Arg1Reg ClassReg DPFPReg0 DPFPReg1 DPFPReg10 DPFPReg11 DPFPReg12 DPFPReg13 DPFPReg14 DPFPReg15 DPFPReg2 DPFPReg3 DPFPReg4 DPFPReg5 DPFPReg6 DPFPReg7 DPFPReg8 DPFPReg9 Extra0Reg Extra1Reg Extra2Reg Extra3Reg Extra4Reg Extra5Reg Extra6Reg Extra7Reg FPReg LinkReg NoReg PCReg RISCTempReg ReceiverResultReg SPReg SendNumArgsReg TempReg VarBaseReg' poolDictionaries: '' category: 'VMMaker-JIT'! !CogAbstractRegisters commentStamp: 'eem 12/26/2015 14:06' prior: 0! I am a pool for the abstract register set that the Cogit uses to define its model of Smalltalk compiled to machine code.! Item was changed: ----- Method: CogAbstractRegisters class>>nameForRegister: (in category 'debug printing') ----- nameForRegister: reg "<Integer>" ^#(Arg0Reg Arg1Reg ClassReg FPReg ReceiverResultReg SPReg SendNumArgsReg TempReg LinkReg RISCTempReg VarBaseReg PCReg + Extra0Reg Extra1Reg Extra2Reg Extra3Reg Extra4Reg Extra5Reg) - Scratch0Reg Scratch1Reg Scratch2Reg Scratch3Reg Scratch4Reg Scratch5Reg) detect: [:sym| (classPool at: sym) = reg] ifNone: ['REG', reg printString, '?']! Item was changed: ----- Method: CogIA32Compiler class>>initializeAbstractRegisters (in category 'class initialization') ----- initializeAbstractRegisters "Assign the abstract registers with the identities/indices of the relevant concrete registers." + super initializeAbstractRegisters. + "N.B. EAX ECX & EDX are caller-save (scratch) registers. Hence we use ECX for class and EDX for receiver/result since these are written in all normal sends. EBX ESI & EDI are callee-save." + CallerSavedRegisterMask := self registerMaskFor: EAX and: ECX and: EDX. - super initializeAbstractRegisters. TempReg := EAX. ClassReg := ECX. ReceiverResultReg := EDX. SendNumArgsReg := EBX. SPReg := ESP. FPReg := EBP. Arg0Reg := ESI. Arg1Reg := EDI. DPFPReg0 := XMM0L. DPFPReg1 := XMM1L. DPFPReg2 := XMM2L. DPFPReg3 := XMM3L. DPFPReg4 := XMM4L. DPFPReg5 := XMM5L. DPFPReg6 := XMM6L. DPFPReg7 := XMM7L! Item was removed: - ----- Method: CogIA32Compiler>>callerSavedRegisterMask (in category 'accessing') ----- - callerSavedRegisterMask - ^cogit registerMaskFor: EAX and: ECX and: EDX! Item was changed: ----- Method: CogMIPSELCompiler class>>initializeAbstractRegisters (in category 'class initialization') ----- initializeAbstractRegisters "Assign the abstract registers with the identities/indices of the relevant concrete registers." "See MIPSConstants>>initializeRegisters for a description of the C ABI." "Note we can fit all of the abstract registers in C preserved registers, and not need to save or restore them at runtime calls." super initializeAbstractRegisters. + self flag: #OABI. + CallerSavedRegisterMask := self + registerMaskFor: T0 and: T1 and: T2 and: T3 + and: T4 and: T5 and: T6 and: T7 and: T8 and: T9. + ReceiverResultReg := S0. Arg0Reg := S1. Arg1Reg := S2. ClassReg := S3. SendNumArgsReg := S4. TempReg := S5. VarBaseReg := S6. "Must be callee saved" SPReg := SP. FPReg := FP. RISCTempReg := AT. LinkReg := RA. self flag: #todo. "Extra0Reg := ??. Extra1Reg := ??. Extra2Reg := ??. Extra3Reg := ??. Extra4Reg := ??. Extra5Reg := ??. Extra6Reg := ??. Extra7Reg := ??." self flag: #todo. "DPFPReg0 := ??. DPFPReg1 := ??. DPFPReg2 := ??. DPFPReg3 := ??. DPFPReg4 := ??. DPFPReg5 := ??. DPFPReg6 := ??. DPFPReg7 := ??. DPFPReg8 := ??. DPFPReg9 := ??. DPFPReg10 := ??. DPFPReg11 := ??. DPFPReg12 := ??. DPFPReg13 := ??. DPFPReg14 := ??. DPFPReg15 := ??"! Item was removed: - ----- Method: CogMIPSELCompiler>>callerSavedRegisterMask (in category 'accessing') ----- - callerSavedRegisterMask - "Volatile" - "See MIPSConstants initializeRegisters." - self flag: #OABI. - ^cogit - registerMaskFor: T0 - and: T1 - and: T2 - and: T3 - and: T4 - and: T5 - and: T6 - and: T7 - and: T8 - and: T9! Item was changed: ----- Method: CogMIPSELCompiler>>nameForRegister: (in category 'printing') ----- nameForRegister: reg "<Integer>" <doNotGenerate> - reg < 0 ifTrue: [^super nameForRegister: reg]. ^MIPSConstants nameForRegister: reg! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genGetActiveContextLarge:inBlock: (in category 'initialization') ----- genGetActiveContextLarge: isLarge inBlock: isInBlock "Create a trampoline to answer the active context that will answer it if a frame is already married, and create it otherwise. Assume numArgs is in SendNumArgsReg and ClassReg is free." | header slotSize jumpSingle loopHead jumpNeedScavenge continuation exit | <var: #jumpNeedScavenge type: #'AbstractInstruction *'> <var: #continuation type: #'AbstractInstruction *'> <var: #jumpSingle type: #'AbstractInstruction *'> <var: #loopHead type: #'AbstractInstruction *'> <var: #exit type: #'AbstractInstruction *'> cogit "load the flag; stash it in both TempReg & ClassReg; do the compare (a prime candidated for use of AndCq:R:R:)" MoveMw: FoxMethod r: FPReg R: ClassReg; AndCq: MFMethodFlagHasContextFlag R: ClassReg R: TempReg. jumpSingle := cogit JumpZero: 0. "jump if flag bit not set" cogit "since the flag bit was set, get the context in the receiver reg and return" MoveMw: FoxThisContext r: FPReg R: ReceiverResultReg; RetN: 0. jumpSingle jmpTarget: cogit Label. "OK, it doesn't exist; instantiate and initialize it" "set the hasContext flag; See CoInterpreter class>>initializeFrameIndices" cogit OrCq: MFMethodFlagHasContextFlag R: ClassReg; MoveR: ClassReg Mw: FoxMethod r: FPReg. "now get the home CogMethod into ClassReg and save for post-instantiation." isInBlock ifTrue: [cogit SubCq: 3 R: ClassReg; "-3 is -(hasContext+isBlock) flags" MoveM16: 0 r: ClassReg R: TempReg; SubR: TempReg R: ClassReg] ifFalse: [cogit SubCq: 1 R: ClassReg]. "-1 is hasContext flag" "instantiate the context..." slotSize := isLarge ifTrue: [LargeContextSlots] ifFalse: [SmallContextSlots]. header := objectMemory headerForSlots: slotSize format: objectMemory indexablePointersFormat classIndex: ClassMethodContextCompactIndex. self flag: #endianness. cogit MoveAw: objectMemory freeStartAddress R: ReceiverResultReg. self genStoreHeader: header intoNewInstance: ReceiverResultReg using: TempReg. cogit MoveR: ReceiverResultReg R: TempReg; AddCq: (objectMemory smallObjectBytesForSlots: slotSize) R: TempReg; MoveR: TempReg Aw: objectMemory freeStartAddress; CmpCq: objectMemory getScavengeThreshold R: TempReg. jumpNeedScavenge := cogit JumpAboveOrEqual: 0. "Now initialize the fields of the context. See CoInterpreter>>marryFrame:SP:copyTemps:" "sender gets frame pointer as a SmallInteger" continuation := cogit MoveR: FPReg R: TempReg. self genSetSmallIntegerTagsIn: TempReg. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (SenderIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "pc gets frame caller as a SmallInteger" cogit MoveMw: FoxSavedFP r: FPReg R: TempReg. self genSetSmallIntegerTagsIn: TempReg. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (InstructionPointerIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Set the method field, freeing up ClassReg again, and frame's context field," cogit MoveMw: (cogit offset: CogMethod of: #methodObject) r: ClassReg R: TempReg; MoveR: TempReg Mw: objectMemory baseHeaderSize + (MethodIndex * objectMemory wordSize) r: ReceiverResultReg; MoveR: ReceiverResultReg Mw: FoxThisContext r: FPReg. "Now compute stack pointer; this is stackPointer (- 1 for return pc if a CISC) - framePointer - wordSize (1 each for saved pc, method, context, receiver) + 1 (1-relative) + numArgs" "TPR note - the code here is actually doing context stackPointer := ((((fp - sp) / wordSize) - [3|4]) + num args) asSmallInteger" cogit MoveR: FPReg R: TempReg; SubR: SPReg R: TempReg; LogicalShiftRightCq: self log2BytesPerWord R: TempReg; SubCq: (cogit backEnd hasLinkRegister ifTrue: [3] ifFalse: [4]) R: TempReg; AddR: SendNumArgsReg R: TempReg. self genConvertIntegerToSmallIntegerInReg: TempReg. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (StackPointerIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Set closureOrNil to either the stacked receiver or nil" isInBlock ifTrue: [cogit MoveR: SendNumArgsReg R: TempReg; AddCq: 2 R: TempReg; "+2 for saved fp and saved pc" MoveXwr: TempReg R: FPReg R: TempReg] ifFalse: [cogit genMoveNilR: TempReg]. cogit MoveR: TempReg Mw: objectMemory baseHeaderSize + (ClosureIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Set the receiver" cogit MoveMw: FoxMFReceiver r: FPReg R: TempReg; MoveR: TempReg Mw: objectMemory baseHeaderSize + (ReceiverIndex * objectMemory bytesPerOop) r: ReceiverResultReg. "Now copy the arguments. This is tricky because of the shortage of registers,. ClassReg ranges from 1 to numArgs (SendNumArgsReg), and from ReceiverIndex + 1 to ReceiverIndex + numArgs. 1 to: numArgs do: [:i| temp := longAt(FPReg + ((SendNumArgs - i + 2) * wordSize)). +2 for saved pc and savedfp longAtput(FPReg + FoxMFReceiver + (i * wordSize), temp)]" "TPR note: this is a prime candidate for passing off to the backend to do at least faintly optimal code" cogit MoveCq: 1 R: ClassReg. loopHead := cogit CmpR: SendNumArgsReg R: ClassReg. exit := cogit JumpGreater: 0. cogit MoveR: SendNumArgsReg R: TempReg; SubR: ClassReg R: TempReg; AddCq: 2 R: TempReg; "+2 for saved fp and saved pc" MoveXwr: TempReg R: FPReg R: TempReg; AddCq: ReceiverIndex + (objectMemory baseHeaderSize / objectMemory wordSize) R: ClassReg; "Now convert ClassReg from frame index to context index" MoveR: TempReg Xwr: ClassReg R: ReceiverResultReg; SubCq: ReceiverIndex + (objectMemory baseHeaderSize / objectMemory wordSize) - 1 R: ClassReg; "convert back adding 1 ;-)" Jump: loopHead. exit jmpTarget: cogit Label. "Finally nil or copy the non-argument temps. ClassReg := FPReg + FoxMFReceiver. SendNumArgsReg := SendNumArgsReg+ReceiverIndex. [ClassReg := ClassReg - wordSize. backEnd hasLinkRegister ifTrue: [ClassReg > SPReg] ifFalse: [ClassReg >= SPReg]] whileTrue: [receiver[SendNumArgsReg] := *ClassReg. SendNumArgsReg := SendNumArgsReg + 1]]" coInterpreter marryFrameCopiesTemps ifFalse: [cogit MoveCq: objectMemory nilObject R: TempReg]. cogit MoveR: FPReg R: ClassReg; AddCq: FoxMFReceiver R: ClassReg; AddCq: ReceiverIndex + 1 + (objectMemory baseHeaderSize / objectMemory wordSize) R: SendNumArgsReg. loopHead := cogit SubCq: objectMemory wordSize R: ClassReg. cogit CmpR: SPReg R: ClassReg. "If on a CISC there's a retpc for the trampoline call on top of stack; if on a RISC there isn't." exit := cogit backEnd hasLinkRegister ifTrue: [cogit JumpBelow: 0] ifFalse: [cogit JumpBelowOrEqual: 0]. coInterpreter marryFrameCopiesTemps ifTrue: [cogit MoveMw: 0 r: ClassReg R: TempReg]. cogit MoveR: TempReg Xwr: SendNumArgsReg R: ReceiverResultReg; AddCq: 1 R: SendNumArgsReg; Jump: loopHead. exit jmpTarget: cogit Label. cogit RetN: 0. jumpNeedScavenge jmpTarget: cogit Label. cogit backEnd saveAndRestoreLinkRegAround: + [cogit + CallRT: ceScheduleScavengeTrampoline + registersToBeSavedMask: (cogit registerMaskFor: ReceiverResultReg and: SendNumArgsReg and: ClassReg)]. - [cogit CallRT: ceScheduleScavengeTrampoline]. cogit Jump: continuation. ^0! Item was changed: ----- Method: CogObjectRepresentationForSpur>>genStoreCheckTrampoline (in category 'initialization') ----- genStoreCheckTrampoline | jumpSC | <var: #jumpSC type: #'AbstractInstruction *'> <inline: true> CheckRememberedInTrampoline ifTrue: [cogit zeroOpcodeIndex. jumpSC := self genCheckRememberedBitOf: ReceiverResultReg scratch: cogit backEnd cResultRegister. self assert: jumpSC opcode = JumpNonZero. jumpSC opcode: JumpZero. cogit RetN: 0. jumpSC jmpTarget: cogit Label]. ^cogit genTrampolineFor: #remember: called: 'ceStoreCheckTrampoline' numArgs: 1 arg: ReceiverResultReg arg: nil arg: nil arg: nil + regsToSave: (CallerSavedRegisterMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) - regsToSave: (cogit callerSavedRegMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) pushLinkReg: true resultReg: cogit returnRegForStoreCheck appendOpcodes: CheckRememberedInTrampoline! Item was changed: ----- Method: CogObjectRepresentationForSpur>>generateObjectRepresentationTrampolines (in category 'initialization') ----- generateObjectRepresentationTrampolines "Do the store check. Answer the argument for the benefit of the code generator; ReceiverResultReg may be caller-saved and hence smashed by this call. Answering it allows the code generator to reload ReceiverResultReg cheaply. In Spur the only thing we leave to the run-time is adding the receiver to the remembered set and setting its isRemembered bit." self cppIf: IMMUTABILITY ifTrue: [self cCode: [] inSmalltalk: [ceStoreTrampolines := CArrayAccessor on: (Array new: NumStoreTrampolines)]. 0 to: NumStoreTrampolines - 1 do: [:instVarIndex | ceStoreTrampolines at: instVarIndex put: (self genStoreTrampolineCalled: (cogit trampolineName: 'ceStoreTrampoline' numArgs: instVarIndex limit: NumStoreTrampolines - 2) instVarIndex: instVarIndex)]]. ceStoreCheckTrampoline := self genStoreCheckTrampoline. ceStoreCheckContextReceiverTrampoline := self genStoreCheckContextReceiverTrampoline. ceScheduleScavengeTrampoline := cogit genTrampolineFor: #ceScheduleScavenge called: 'ceScheduleScavengeTrampoline' + regsToSave: CallerSavedRegisterMask. - regsToSave: cogit callerSavedRegMask. ceSmallActiveContextInMethodTrampoline := self genActiveContextTrampolineLarge: false inBlock: false called: 'ceSmallMethodContext'. ceSmallActiveContextInBlockTrampoline := self genActiveContextTrampolineLarge: false inBlock: true called: 'ceSmallBlockContext'. ceLargeActiveContextInMethodTrampoline := self genActiveContextTrampolineLarge: true inBlock: false called: 'ceLargeMethodContext'. ceLargeActiveContextInBlockTrampoline := self genActiveContextTrampolineLarge: true inBlock: true called: 'ceLargeBlockContext'! Item was changed: ----- Method: CogObjectRepresentationForSqueakV3>>generateObjectRepresentationTrampolines (in category 'initialization') ----- generateObjectRepresentationTrampolines "Do the store check. Answer the argument for the benefit of the code generator; ReceiverResultReg may be caller-saved and hence smashed by this call. Answering it allows the code generator to reload ReceiverResultReg cheaply." ceStoreCheckTrampoline := cogit genTrampolineFor: #ceStoreCheck: called: 'ceStoreCheckTrampoline' arg: ReceiverResultReg + regsToSave: (CallerSavedRegisterMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) - regsToSave: (cogit callerSavedRegMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) result: cogit returnRegForStoreCheck. ceCreateNewArrayTrampoline := cogit genTrampolineFor: #ceNewArraySlotSize: called: 'ceCreateNewArrayTrampoline' arg: SendNumArgsReg + regsToSave: (CallerSavedRegisterMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) - regsToSave: (cogit callerSavedRegMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) result: ReceiverResultReg. cePositive32BitIntegerTrampoline := cogit genTrampolineFor: #positive32BitIntegerFor: called: 'cePositive32BitIntegerTrampoline' arg: ReceiverResultReg + regsToSave: (CallerSavedRegisterMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) - regsToSave: (cogit callerSavedRegMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) result: TempReg. ceActiveContextTrampoline := self genActiveContextTrampoline. ceClosureCopyTrampoline := cogit genTrampolineFor: #ceClosureCopyDescriptor: called: 'ceClosureCopyTrampoline' arg: SendNumArgsReg + regsToSave: (CallerSavedRegisterMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) - regsToSave: (cogit callerSavedRegMask bitClear: (cogit registerMaskFor: ReceiverResultReg)) result: ReceiverResultReg! Item was changed: ----- Method: CogX64Compiler class>>initializeAbstractRegisters (in category 'class initialization') ----- initializeAbstractRegisters "Assign the abstract registers with the identities/indices of the relevant concrete registers." "[1] Figure 3.4 Register Usage in System V Application Binary Interface + AMD64 Architecture Processor Supplement" - AMD64 Architecture Processor Supplement + super initializeAbstractRegisters. + + "N.B. RAX RCX & RDX are caller-save (scratch) registers. Hence we use RCX for class and RDX for - N.B. RAX RCX & RDX are caller-save (scratch) registers. Hence we use RCX for class and RDX for receiver/result since these are written in all normal sends." + CallerSavedRegisterMask := self + registerMaskFor: RAX + and: RCX + and: RDX + and: RSI + and: RDI + and: R8 + and: R9 + and: R10 + and: R11. - super initializeAbstractRegisters. TempReg := RAX. ClassReg := RCX. ReceiverResultReg := RDX. SendNumArgsReg := R9. SPReg := RSP. FPReg := RBP. Arg0Reg := RDI. "So as to agree with C ABI arg 0" Arg1Reg := RSI. "So as to agree with C ABI arg 1" VarBaseReg := RBX. "Must be callee saved" "R8 is either RISCTempReg or Extra6Reg depending on subclass." Extra0Reg := R10. Extra1Reg := R11. Extra2Reg := R12. Extra3Reg := R13. Extra4Reg := R14. Extra5Reg := R15. DPFPReg0 := XMM0L. DPFPReg1 := XMM1L. DPFPReg2 := XMM2L. DPFPReg3 := XMM3L. DPFPReg4 := XMM4L. DPFPReg5 := XMM5L. DPFPReg6 := XMM6L. DPFPReg7 := XMM7L. DPFPReg8 := XMM8L. DPFPReg9 := XMM9L. DPFPReg10 := XMM10L. DPFPReg11 := XMM11L. DPFPReg12 := XMM12L. DPFPReg13 := XMM13L. DPFPReg14 := XMM14L. DPFPReg15 := XMM15L! Item was removed: - ----- Method: CogX64Compiler>>callerSavedRegisterMask (in category 'accessing') ----- - callerSavedRegisterMask - "See e.g. Figure 3.4 Register Usage in - System V Application Binary Interface - AMD64 Architecture Processor Supplement - N.B. We are playing fast and loose here being processor-specific. - Soon enough this needs to be OS-specific." - ^cogit - registerMaskFor: RAX - and: RCX - and: RDX - and: RSI - and: RDI - and: R8 - and: R9 - and: R10 - and: R11! Item was changed: ----- Method: CogX64Compiler>>genMarshallNArgs:arg:arg:arg:arg: (in category 'abi') ----- genMarshallNArgs: numArgs arg: regOrConst0 arg: regOrConst1 arg: regOrConst2 arg: regOrConst3 "Generate the code to pass up to four arguments in a C run-time call. Hack: each argument is either a negative number, which encodes a constant, or a non-negative number, that of a register. Run-time calls have no more than four arguments, so chosen so that on ARM, where in its C ABI the first four integer arguments are passed in registers, all arguments can be passed in registers. We defer to the back end to generate this code not so much that the back end knows whether it uses the stack or registers to pass arguments (it does, but...). In fact we defer for an extremely evil reason. Doing so allows the x64 (where up to 6 args are passed) to assign the register arguments in an order that allows some of the argument registers to be used for specific abstract registers, specifically ReceiverResultReg and ClassReg. This is evil, evil, evil, but also it's really nice to keep using the old register assignments the original author has grown accustomed to. How can this possibly work? Look at Cogit class>>runtime for a list of the run-time calls and their arguments, including which arguments are passed in which registers. Look at CogX64Compiler's subclass implementations of initializeAbstractRegisters. There are no calls in which ReceiverResultReg (RDX) and/or ClassReg (RCX) are passed along with Arg0Reg and Arg1Reg, and none in which the use of either ReceiverResultReg or ClassReg conflict for args 3 & 4. So if args are assigned in order, the registers do not get overwritten. Yes, this is evil, but it's so nice to continue to use RCX & RDX. Argument registers for args 0 to 3 in SysV are RDI RSI RDX RCX, and in Win64 are RDI RSI R8 R9" <inline: true> numArgs = 0 ifTrue: [^self]. (cogit isTrampolineArgConstant: regOrConst0) + ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst0) R: RDI] "a.k.a. Arg0Reg" - ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst0) R: RDI] ifFalse: [regOrConst0 ~= RDI ifTrue: [cogit MoveR: regOrConst0 R: RDI]]. numArgs = 1 ifTrue: [^self]. (cogit isTrampolineArgConstant: regOrConst1) + ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst1) R: RSI] "a.k.a. Arg1Reg" - ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst1) R: RSI] ifFalse: [regOrConst1 ~= RSI ifTrue: [cogit MoveR: regOrConst1 R: RSI]]. numArgs = 2 ifTrue: [^self]. self cppIf: ABI == #SysV ifTrue: [(cogit isTrampolineArgConstant: regOrConst2) + ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst2) R: RDX] "a.k.a. ReceiverResultReg" - ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst2) R: RDX] ifFalse: [regOrConst2 ~= RDX ifTrue: [cogit MoveR: regOrConst2 R: RDX]]. numArgs = 3 ifTrue: [^self]. (cogit isTrampolineArgConstant: regOrConst3) + ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst3) R: RCX] "a.k.a. ClassReg" - ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst3) R: RCX] ifFalse: [regOrConst3 ~= RCX ifTrue: [cogit MoveR: regOrConst3 R: RCX]]]. + self cppIf: ABI == #MSVC ifTrue: "completely untested..." - self cppIf: ABI == #MSVC ifTrue: [(cogit isTrampolineArgConstant: regOrConst2) + ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst2) R: R8] "a.k.a. RISCTempReg in CogInLineLiteralsX64Compiler and Extra6Reg in CogOutOfLineLiteralsX64Compiler" - ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst2) R: R8] ifFalse: [regOrConst2 ~= R8 ifTrue: [cogit MoveR: regOrConst2 R: R8]]. numArgs = 3 ifTrue: [^self]. (cogit isTrampolineArgConstant: regOrConst3) + ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst3) R: R9] "a.k.a. SendNumArgsReg" - ifTrue: [cogit MoveCq: (cogit trampolineArgValue: regOrConst3) R: R9] ifFalse: [regOrConst3 ~= R9 ifTrue: [cogit MoveR: regOrConst3 R: R9]]]. self assert: numArgs <= 4! Item was changed: ----- Method: CogX64Compiler>>nameForRegister: (in category 'printing') ----- nameForRegister: reg "<Integer>" <doNotGenerate> + | default | + default := super nameForRegister: reg. + ^(default last = $? + and: [reg between: 0 and: 15]) + ifTrue: [#(RAX RCX RDX RBX RSP RBP RSI RDI R8 R9 R10 R11 R12 R13 R14 R15) at: reg + 1] + ifFalse: [default]! - (reg between: 0 and: 15) ifTrue: - [^#(RAX RCX RDX RBX RSP RBP RSI RDI R8 R9 R10 R11 R12 R13 R14 R15) at: reg + 1]. - ^super nameForRegister: reg! Item was changed: CogClass subclass: #Cogit + instanceVariableNames: 'coInterpreter objectMemory objectRepresentation processor threadManager methodZone methodZoneBase codeBase minValidCallAddress lastNInstructions simulatedAddresses simulatedTrampolines simulatedVariableGetters simulatedVariableSetters printRegisters printInstructions compilationTrace clickConfirm breakPC breakBlock singleStep guardPageSize traceFlags traceStores breakMethod methodObj enumeratingCogMethod methodHeader initialPC endPC methodOrBlockNumArgs inBlock needsFrame hasYoungReferent primitiveIndex backEnd literalsManager postCompileHook methodLabel stackCheckLabel blockEntryLabel blockEntryNoContextSwitch blockNoContextSwitchOffset stackOverflowCall sendMiss missOffset entryPointMask checkedEntryAlignment uncheckedEntryAlignment cmEntryOffset entry cmNoCheckEntryOffset noCheckEntry fullBlockEntry cbEntryOffset fullBlockNoContextSwitchEntry cbNoSwitchEntryOffset picMNUAbort picInterpretAbort endCPICCase0 endCPICCase1 firstCPICCaseOffset cPICCaseSize cPICEndSize closedPICSize openPICSize fixups abstractOpcodes generatorTable byte0 byte1 byte2 byte3 bytecodePC bytecodeSetOffset opcodeIndex numAbstractOpcodes blockStarts blockCount labelCounter cStackAlignment expectedSPAlignment expectedFPAlignment codeModified maxLitIndex ceMethodAbortTrampoline cePICAbortTrampoline ceCheckForInterruptTrampoline ceCPICMissTrampoline ceReturnToInterpreterTrampoline ceBaseFrameReturnTrampoline ceSendMustBeBooleanAddTrueTrampoline ceSendMustBeBooleanAddFalseTrampoline ceCannotResumeTrampoline ceEnterCogCodePopReceiverReg ceCallCogCodePopReceiverReg ceCallCogCodePopReceiverAndClassRegs cePrimReturnEnterCogCode cePrimReturnEnterCogCodeProfiling ceNonLocalReturnTrampoline ceFetchContextInstVarTrampoline ceStoreContextInstVarTrampoline ceEnclosingObjectTrampoline ceFlushICache ceCheckFeaturesFunction ceTraceLinkedSendTrampoline ceTraceBlockActivationTrampoline ceTraceStoreTrampoline ceGetFP ceGetSP ceCaptureCStackPointers ordinarySendTrampolines superSendTrampolines directedSuperSendTrampolines dynamicSuperSendTrampolines outerSendTrampolines selfSendTrampolines firstSend lastSend realCEEnterCogCodePopReceiverReg realCECallCogCodePopReceiverReg realCECallCogCodePopReceiverAndClassRegs trampolineTableIndex trampolineAddresses objectReferencesInRuntime runtimeObjectRefIndex cFramePointerInUse debugPrimCallStackOffset ceTryLockVMOwner ceUnlockVMOwner extA extB tempOop numIRCs indexOfIRC theIRCs implicitReceiverSendTrampolines cogMethodSurrogateClass cogBlockMethodSurrogateClass nsSendCacheSurrogateClass CStackPointer CFramePointer cPICPrototype cPICEndOfCodeOffset cPICEndOfCodeLabel maxCPICCases debugBytecodePointers debugOpcodeIndices disassemblingMethod' - instanceVariableNames: 'coInterpreter objectMemory objectRepresentation processor threadManager methodZone methodZoneBase codeBase minValidCallAddress lastNInstructions simulatedAddresses simulatedTrampolines simulatedVariableGetters simulatedVariableSetters printRegisters printInstructions compilationTrace clickConfirm breakPC breakBlock singleStep guardPageSize traceFlags traceStores breakMethod methodObj enumeratingCogMethod methodHeader initialPC endPC methodOrBlockNumArgs inBlock needsFrame hasYoungReferent primitiveIndex backEnd literalsManager callerSavedRegMask postCompileHook methodLabel stackCheckLabel blockEntryLabel blockEntryNoContextSwitch blockNoContextSwitchOffset stackOverflowCall sendMiss missOffset entryPointMask checkedEntryAlignment uncheckedEntryAlignment cmEntryOffset entry cmNoCheckEntryOffset noCheckEntry fullBlockEntry cbEntryOffset fullBlockNoContextSwitchEntry cbNoSwitchEntryOffset picMNUAbort picInterpretAbort endCPICCase0 endCPICCase1 firstCPICCaseOffset cPICCaseSize cPICEndSize closedPICSize openPICSize fixups abstractOpcodes generatorTable byte0 byte1 byte2 byte3 bytecodePC bytecodeSetOffset opcodeIndex numAbstractOpcodes blockStarts blockCount labelCounter cStackAlignment expectedSPAlignment expectedFPAlignment codeModified maxLitIndex ceMethodAbortTrampoline cePICAbortTrampoline ceCheckForInterruptTrampoline ceCPICMissTrampoline ceReturnToInterpreterTrampoline ceBaseFrameReturnTrampoline ceSendMustBeBooleanAddTrueTrampoline ceSendMustBeBooleanAddFalseTrampoline ceCannotResumeTrampoline ceEnterCogCodePopReceiverReg ceCallCogCodePopReceiverReg ceCallCogCodePopReceiverAndClassRegs cePrimReturnEnterCogCode cePrimReturnEnterCogCodeProfiling ceNonLocalReturnTrampoline ceFetchContextInstVarTrampoline ceStoreContextInstVarTrampoline ceEnclosingObjectTrampoline ceFlushICache ceCheckFeaturesFunction ceTraceLinkedSendTrampoline ceTraceBlockActivationTrampoline ceTraceStoreTrampoline ceGetFP ceGetSP ceCaptureCStackPointers ordinarySendTrampolines superSendTrampolines directedSuperSendTrampolines dynamicSuperSendTrampolines outerSendTrampolines selfSendTrampolines firstSend lastSend realCEEnterCogCodePopReceiverReg realCECallCogCodePopReceiverReg realCECallCogCodePopReceiverAndClassRegs trampolineTableIndex trampolineAddresses objectReferencesInRuntime runtimeObjectRefIndex cFramePointerInUse debugPrimCallStackOffset ceTryLockVMOwner ceUnlockVMOwner extA extB tempOop numIRCs indexOfIRC theIRCs implicitReceiverSendTrampolines cogMethodSurrogateClass cogBlockMethodSurrogateClass nsSendCacheSurrogateClass CStackPointer CFramePointer cPICPrototype cPICEndOfCodeOffset cPICEndOfCodeLabel maxCPICCases debugBytecodePointers debugOpcodeIndices disassemblingMethod' classVariableNames: 'AltBlockCreationBytecodeSize AltFirstSpecialSelector AltNSSendIsPCAnnotated AltNumSpecialSelectors AnnotationConstantNames AnnotationShift AnnotationsWithBytecodePCs BlockCreationBytecodeSize Debug DisplacementMask DisplacementX2N EagerInstructionDecoration FirstAnnotation FirstSpecialSelector HasBytecodePC IsAbsPCReference IsAnnotationExtension IsDirectedSuperSend IsDisplacementX2N IsNSDynamicSuperSend IsNSImplicitReceiverSend IsNSSelfSend IsNSSendCall IsObjectReference IsRelativeCall IsSendCall IsSuperSend MapEnd MaxCompiledPrimitiveIndex MaxStackAllocSize MaxX2NDisplacement NSCClassTagIndex NSCEnclosingObjectIndex NSCNumArgsIndex NSCSelectorIndex NSCTargetIndex NSSendIsPCAnnotated NeedsFixupFlag NumObjRefsInRuntime NumOopsPerNSC NumSpecialSelectors NumTrampolines ProcessorClass' poolDictionaries: 'CogAbstractRegisters CogCompilationConstants CogMethodConstants CogRTLOpcodes VMBasicConstants VMBytecodeConstants VMObjectIndices VMStackFrameOffsets' category: 'VMMaker-JIT'! Cogit class instanceVariableNames: 'generatorTable primitiveTable'! !Cogit commentStamp: 'eem 4/6/2015 15:56' prior: 0! I am the code generator for the Cog VM. My job is to produce machine code versions of methods for faster execution and to manage inline caches for faster send performance. I can be tested in the current image using my class-side in-image compilation facilities. e.g. try StackToRegisterMappingCogit genAndDis: (Integer >> #benchFib) I have concrete subclasses that implement different levels of optimization: SimpleStackBasedCogit is the simplest code generator. StackToRegisterMappingCogit is the current production code generator It defers pushing operands to the stack until necessary and implements a register-based calling convention for low-arity sends. StackToRegisterMappingCogit is an experimental code generator with support for counting conditional branches, intended to support adaptive optimization. coInterpreter <CoInterpreterSimulator> the VM's interpreter with which I cooperate methodZoneManager <CogMethodZoneManager> the manager of the machine code zone objectRepresentation <CogObjectRepresentation> the object used to generate object accesses processor <BochsIA32Alien|?> the simulator that executes the IA32/x86 machine code I generate when simulating execution in Smalltalk simulatedTrampolines <Dictionary of Integer -> MessageSend> the dictionary mapping trap jump addresses to run-time routines used to warp from simulated machine code in to the Smalltalk run-time. simulatedVariableGetters <Dictionary of Integer -> MessageSend> the dictionary mapping trap read addresses to variables in run-time objects used to allow simulated machine code to read variables in the Smalltalk run-time. simulatedVariableSetters <Dictionary of Integer -> MessageSend> the dictionary mapping trap write addresses to variables in run-time objects used to allow simulated machine code to write variables in the Smalltalk run-time. printRegisters printInstructions clickConfirm <Boolean> flags controlling debug printing and code simulation breakPC <Integer> machine code pc breakpoint cFramePointer cStackPointer <Integer> the variables representing the C stack & frame pointers, which must change on FFI callback and return selectorOop <sqInt> the oop of the methodObj being compiled methodObj <sqInt> the bytecode method being compiled initialPC endPC <Integer> the start and end pcs of the methodObj being compiled methodOrBlockNumArgs <Integer> argument count of current method or block being compiled needsFrame <Boolean> whether methodObj or block needs a frame to execute primitiveIndex <Integer> primitive index of current method being compiled methodLabel <CogAbstractOpcode> label for the method header blockEntryLabel <CogAbstractOpcode> label for the start of the block dispatch code stackOverflowCall <CogAbstractOpcode> label for the call of ceStackOverflow in the method prolog sendMissCall <CogAbstractOpcode> label for the call of ceSICMiss in the method prolog entryOffset <Integer> offset of method entry code from start (header) of method entry <CogAbstractOpcode> label for the first instruction of the method entry code noCheckEntryOffset <Integer> offset of the start of a method proper (after the method entry code) from start (header) of method noCheckEntry <CogAbstractOpcode> label for the first instruction of start of a method proper fixups <Array of <AbstractOpcode Label | nil>> the labels for forward jumps that will be fixed up when reaching the relevant bytecode. fixup shas one element per byte in methodObj's bytecode abstractOpcodes <Array of <AbstractOpcode>> the code generated when compiling methodObj byte0 byte1 byte2 byte3 <Integer> individual bytes of current bytecode being compiled in methodObj bytecodePointer <Integer> bytecode pc (same as Smalltalk) of the current bytecode being compiled opcodeIndex <Integer> the index of the next free entry in abstractOpcodes (this code is translated into C where OrderedCollection et al do not exist) numAbstractOpcodes <Integer> the number of elements in abstractOpcocdes blockStarts <Array of <BlockStart>> the starts of blocks in the current method blockCount the index into blockStarts as they are being noted, and hence eventually the total number of blocks in the current method labelCounter <Integer> a nicety for numbering labels not needed in the production system but probably not expensive enough to worry about ceStackOverflowTrampoline <Integer> ceSend0ArgsTrampoline <Integer> ceSend1ArgsTrampoline <Integer> ceSend2ArgsTrampoline <Integer> ceSendNArgsTrampoline <Integer> ceSendSuper0ArgsTrampoline <Integer> ceSendSuper1ArgsTrampoline <Integer> ceSendSuper2ArgsTrampoline <Integer> ceSendSuperNArgsTrampoline <Integer> ceSICMissTrampoline <Integer> ceCPICMissTrampoline <Integer> ceStoreCheckTrampoline <Integer> ceReturnToInterpreterTrampoline <Integer> ceBaseFrameReturnTrampoline <Integer> ceSendMustBeBooleanTrampoline <Integer> ceClosureCopyTrampoline <Integer> the various trampolines (system-call-like jumps from machine code to the run-time). See Cogit>>generateTrampolines for the mapping from trampoline to run-time routine and then read the run-time routine for a funcitonal description. ceEnterCogCodePopReceiverReg <Integer> the enilopmart (jump from run-time to machine-code) methodZoneBase <Integer> ! Cogit class instanceVariableNames: 'generatorTable primitiveTable'! Item was added: + ----- Method: Cogit>>CallFullRT:registersToBeSavedMask: (in category 'compile abstract instructions') ----- + CallFullRT: callTarget registersToBeSavedMask: registersToBeSaved + <returnTypeC: #'AbstractInstruction *'> + | callerSavedRegsToBeSaved lastInst reg registersToBePushed | + <var: 'lastInst' type: #'AbstractInstruction *'> + callerSavedRegsToBeSaved := CallerSavedRegisterMask bitAnd: registersToBeSaved. + + backEnd canPushPopMultipleRegisters + ifTrue: [backEnd genPushRegisterMask: callerSavedRegsToBeSaved] + ifFalse: + [registersToBePushed := callerSavedRegsToBeSaved. + reg := 0. + [registersToBePushed ~= 0] whileTrue: + [(registersToBePushed anyMask: 1) ifTrue: + [self PushR: reg]. + reg := reg + 1. + registersToBePushed := registersToBePushed >>> 1]]. + + lastInst := self CallFullRT: callTarget. + + backEnd canPushPopMultipleRegisters + ifTrue: [^backEnd genPopRegisterMask: callerSavedRegsToBeSaved] + ifFalse: + [[reg >= 0] whileTrue: + [(callerSavedRegsToBeSaved anyMask: 1 << reg) ifTrue: + [lastInst := self PopR: reg]. + reg := reg - 1]. + + ^lastInst]! Item was added: + ----- Method: Cogit>>CallRT:registersToBeSavedMask: (in category 'compile abstract instructions') ----- + CallRT: callTarget registersToBeSavedMask: registersToBeSaved + <returnTypeC: #'AbstractInstruction *'> + | callerSavedRegsToBeSaved lastInst reg registersToBePushed | + <var: 'lastInst' type: #'AbstractInstruction *'> + callerSavedRegsToBeSaved := CallerSavedRegisterMask bitAnd: registersToBeSaved. + + backEnd canPushPopMultipleRegisters + ifTrue: [backEnd genPushRegisterMask: callerSavedRegsToBeSaved] + ifFalse: + [registersToBePushed := callerSavedRegsToBeSaved. + reg := 0. + [registersToBePushed ~= 0] whileTrue: + [(registersToBePushed anyMask: 1) ifTrue: + [self PushR: reg]. + reg := reg + 1. + registersToBePushed := registersToBePushed >>> 1]]. + + lastInst := self CallRT: callTarget. + + backEnd canPushPopMultipleRegisters + ifTrue: [^backEnd genPopRegisterMask: callerSavedRegsToBeSaved] + ifFalse: + [[reg >= 0] whileTrue: + [(callerSavedRegsToBeSaved anyMask: 1 << reg) ifTrue: + [lastInst := self PopR: reg]. + reg := reg - 1]. + + ^lastInst]! Item was removed: - ----- Method: Cogit>>callerSavedRegMask (in category 'accessing') ----- - callerSavedRegMask - <cmacro: '() callerSavedRegMask'> - ^callerSavedRegMask! Item was changed: ----- Method: Cogit>>handleABICallOrJumpSimulationTrap:evaluable: (in category 'simulation only') ----- handleABICallOrJumpSimulationTrap: aProcessorSimulationTrap evaluable: evaluable <doNotGenerate> self assert: aProcessorSimulationTrap type = #call. processor simulateLeafCallOf: aProcessorSimulationTrap address nextpc: aProcessorSimulationTrap nextpc memory: coInterpreter memory. self recordInstruction: {'(simulated call of '. aProcessorSimulationTrap address. '/'. evaluable selector. ')'}. + ((printRegisters or: [printInstructions]) and: [clickConfirm]) ifTrue: + [(self confirm: 'skip run-time call?') ifFalse: + [clickConfirm := false. self halt]]. evaluable valueWithArguments: (processor postCallArgumentsNumArgs: evaluable numArgs in: coInterpreter memory). self recordInstruction: {'(simulated return to '. processor retpcIn: coInterpreter memory. ')'}. processor smashABICallerSavedRegistersWithValuesFrom: 16r80000000 by: objectMemory wordSize; simulateLeafReturnIn: coInterpreter memory! Item was changed: ----- Method: Cogit>>initializeBackend (in category 'initialization') ----- initializeBackend methodLabel machineCodeSize: 0. methodLabel opcode: Label. methodLabel operands at: 0 put: 0. methodLabel operands at: 1 put: 0. "label offset" - callerSavedRegMask := backEnd callerSavedRegisterMask. backEnd hasVarBaseRegister ifTrue: + [self assert: ((self registerMaskFor: VarBaseReg) noMask: CallerSavedRegisterMask)]. - [self assert: ((self registerMaskFor: VarBaseReg) noMask: callerSavedRegMask)]. literalsManager allocateLiterals: 4; resetLiterals! Item was changed: ----- Method: Cogit>>printCogMethodFor: (in category 'printing') ----- printCogMethodFor: address <api> <var: #address type: #'void *'> | cogMethod | <var: #cogMethod type: #'CogMethod *'> cogMethod := methodZone methodFor: address. cogMethod = 0 + ifTrue: [(self codeEntryFor: address) + ifNil: [coInterpreter print: 'not a method'; cr] + ifNotNil: [coInterpreter print: 'trampoline '; print: (self codeEntryNameFor: address); cr]] - ifTrue: [coInterpreter print: 'not a method'; cr] ifFalse: [coInterpreter printCogMethod: cogMethod]! Item was changed: ----- Method: Cogit>>printRegisterMapOn: (in category 'disassembly') ----- printRegisterMapOn: aStream <doNotGenerate> | map n | map := backEnd generalPurposeRegisterMap. n := 0. + (map keys asSortedCollection: [:a :b| (map at: a) < (map at: b)]) - map keys sort do: [:regName| | abstractName | + abstractName := backEnd nameForRegister: (map at: regName). - abstractName := CogAbstractRegisters nameForRegister: (map at: regName). aStream nextPutAll: abstractName; nextPutAll: ' => '; nextPutAll: regName] separatedBy: [(n := n + 1) \\ 4 = 0 ifTrue: [aStream cr] ifFalse: [aStream tab]]. aStream cr; flush! Item was changed: ----- Method: SimpleStackBasedCogit>>genTraceStoreTrampoline (in category 'initialization') ----- genTraceStoreTrampoline ceTraceStoreTrampoline := self genTrampolineFor: #ceTraceStoreOf:into: called: 'ceTraceStoreTrampoline' arg: ClassReg arg: ReceiverResultReg + regsToSave: CallerSavedRegisterMask! - regsToSave: callerSavedRegMask! Item was changed: ----- Method: SimpleStackBasedCogit>>generateTracingTrampolines (in category 'initialization') ----- generateTracingTrampolines "Generate trampolines for tracing. In the simulator we can save a lot of time and avoid noise instructions in the lastNInstructions log by short-cutting these trampolines, but we need them in the real vm." ceTraceLinkedSendTrampoline := self genTrampolineFor: #ceTraceLinkedSend: called: 'ceTraceLinkedSendTrampoline' arg: ReceiverResultReg + regsToSave: CallerSavedRegisterMask. - regsToSave: callerSavedRegMask. ceTraceBlockActivationTrampoline := self genTrampolineFor: #ceTraceBlockActivation called: 'ceTraceBlockActivationTrampoline' + regsToSave: CallerSavedRegisterMask.. - regsToSave: callerSavedRegMask.. ceTraceStoreTrampoline := self genTrampolineFor: #ceTraceStoreOf:into: called: 'ceTraceStoreTrampoline' arg: ClassReg arg: ReceiverResultReg + regsToSave: CallerSavedRegisterMask.. - regsToSave: callerSavedRegMask.. self cCode: [] inSmalltalk: [ceTraceLinkedSendTrampoline := self simulatedTrampolineFor: #ceShortCutTraceLinkedSend:. ceTraceBlockActivationTrampoline := self simulatedTrampolineFor: #ceShortCutTraceBlockActivation:. ceTraceStoreTrampoline := self simulatedTrampolineFor: #ceShortCutTraceStore:]! Item was changed: ----- Method: SimpleStackBasedCogit>>isCallerSavedReg: (in category 'register management') ----- isCallerSavedReg: reg <inline: true> + ^self register: reg isInMask: CallerSavedRegisterMask! - ^self register: reg isInMask: callerSavedRegMask! Item was changed: ----- Method: StackToRegisterMappingCogit>>generateTracingTrampolines (in category 'initialization') ----- generateTracingTrampolines "Generate trampolines for tracing. In the simulator we can save a lot of time and avoid noise instructions in the lastNInstructions log by short-cutting these trampolines, but we need them in the real vm." ceTraceLinkedSendTrampoline := self genTrampolineFor: #ceTraceLinkedSend: called: 'ceTraceLinkedSendTrampoline' arg: ReceiverResultReg + regsToSave: CallerSavedRegisterMask.. - regsToSave: callerSavedRegMask.. ceTraceBlockActivationTrampoline := self genTrampolineFor: #ceTraceBlockActivation called: 'ceTraceBlockActivationTrampoline' + regsToSave: CallerSavedRegisterMask.. - regsToSave: callerSavedRegMask.. ceTraceStoreTrampoline := self genTrampolineFor: #ceTraceStoreOf:into: called: 'ceTraceStoreTrampoline' arg: TempReg arg: ReceiverResultReg + regsToSave: CallerSavedRegisterMask.. - regsToSave: callerSavedRegMask.. self cCode: [] inSmalltalk: [ceTraceLinkedSendTrampoline := self simulatedTrampolineFor: #ceShortCutTraceLinkedSend:. ceTraceBlockActivationTrampoline := self simulatedTrampolineFor: #ceShortCutTraceBlockActivation:. ceTraceStoreTrampoline := self simulatedTrampolineFor: #ceShortCutTraceStore:]! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssAllocateCallReg: (in category 'simulation stack') ----- ssAllocateCallReg: requiredReg "Allocate a register needed in a run-time call (i.e. flush uses of the register to the real stack). Since the run-time can smash any and all caller-saved registers also flush all caller-saved registers." + self ssAllocateRequiredRegMask: (CallerSavedRegisterMask - self ssAllocateRequiredRegMask: (callerSavedRegMask bitOr: (self registerMaskFor: requiredReg)) upThrough: simStackPtr! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssAllocateCallReg:and: (in category 'simulation stack') ----- ssAllocateCallReg: requiredReg1 and: requiredReg2 "Allocate registers needed in a run-time call (i.e. flush uses of the registers to the real stack). Since the run-time can smash any and all caller-saved registers also flush all caller-saved registers." + self ssAllocateRequiredRegMask: (CallerSavedRegisterMask - self ssAllocateRequiredRegMask: (callerSavedRegMask bitOr: ((self registerMaskFor: requiredReg1) bitOr: (self registerMaskFor: requiredReg2))) upThrough: simStackPtr! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssAllocateCallReg:and:and: (in category 'simulation stack') ----- ssAllocateCallReg: requiredReg1 and: requiredReg2 and: requiredReg3 "Allocate registers needed in a run-time call (i.e. flush uses of the registers to the real stack). Since the run-time can smash any and all caller-saved registers also flush all caller-saved registers." + self ssAllocateRequiredRegMask: (CallerSavedRegisterMask - self ssAllocateRequiredRegMask: (callerSavedRegMask bitOr: ((self registerMaskFor: requiredReg1) bitOr: ((self registerMaskFor: requiredReg2) bitOr: (self registerMaskFor: requiredReg3)))) upThrough: simStackPtr! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssAllocateCallReg:and:and:and: (in category 'simulation stack') ----- ssAllocateCallReg: requiredReg1 and: requiredReg2 and: requiredReg3 and: requiredReg4 "Allocate registers needed in a run-time call (i.e. flush uses of the registers to the real stack). Since the run-time can smash any and all caller-saved registers also flush all caller-saved registers." + self ssAllocateRequiredRegMask: (CallerSavedRegisterMask - self ssAllocateRequiredRegMask: (callerSavedRegMask bitOr: ((self registerMaskFor: requiredReg1) bitOr: ((self registerMaskFor: requiredReg2) bitOr: ((self registerMaskFor: requiredReg3) bitOr: (self registerMaskFor: requiredReg4))))) upThrough: simStackPtr!

1 0

interpreter method cache forwarding pointer checks
by Ben Coman 01 Jun '16

01 Jun '16

Just curious if the probing of the intepreter method cache for forwarding pointers had been sorted out, per SpurMemoryManager class comment... > The inline cache failure code is then responsible for following the forwarding pointer chain (these are Iliffe vectors :) ) and resolving to the actual target. > (In the interpreter there needs to be a similar check when probing the method cache). It has yet to be determined exactly how this is done (e.g. change the receiver register and/or stack contents and retry the send, perhaps scanning the current activation). cheers -ben

2 1

FoxSavedFP an friends
by Ben Coman 01 Jun '16

01 Jun '16

Stepping through with the simulator, I see a scattering of variables FoxSavedFP, FoxCallerSavedIP, etc. The "Fox" must mean something but I can't work it out? cheers -ben

2 1

VM Maker: Cog-eem.326.mcz
by commits＠source.squeak.org 01 Jun '16

01 Jun '16

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.326.mcz ==================== Summary ==================== Name: Cog-eem.326 Author: eem Time: 1 June 2016, 10:00:55.448579 am UUID: 6590c3f6-5226-4bfe-8ab1-5ba2b3871f7e Ancestors: Cog-tpr.325 Be more accurate in smashing caller-saved registers on ARMv6. =============== Diff against Cog-tpr.325 =============== Item was changed: ----- Method: GdbARMAlien>>smashABICallerSavedRegistersWithValuesFrom:by: (in category 'accessing-abstract') ----- smashABICallerSavedRegistersWithValuesFrom: base by: step "limited list of registers to clear out when simulating an ABI call. Smash neither R0 nor R1 since many abi calls return 2 results or a 64-bit dual-reg value. LR has to be left alone becasue a leaf call doesn't push it." + #(r2: r3: r9: r12:) withIndexDo: - #(r2: r3:) withIndexDo: [:accessor :index| self perform: accessor with: index - 1 * step + base]! Item was changed: ----- Method: GdbARMAlien>>smashCallerSavedRegistersWithValuesFrom:by: (in category 'accessing-abstract') ----- smashCallerSavedRegistersWithValuesFrom: base by: step + #(r0: r1: r2: r3: r9: r12: lr:) withIndexDo: - #(r0: r1: r2: r3: lr:) withIndexDo: [:accessor :index| self perform: accessor with: index - 1 * step + base]!

1 0

Re: [Vm-dev] Ephemerons and VM crash
by Guille Polito 01 Jun '16

01 Jun '16

Hi again! I snip most of the old thread to keep the relevant. -------- Original Message -------- > 1 - The mourn table is being collected because it is not marked upon > creation > > =============== > > I decided to move the assignment of marking out into markObjects: Ok, it looks good for me, I did not know what would be a good place to put them without breaking something :) > > > 2 - Accesses to unscannedEphemerons are unaligned > =============== > > Looks good. I've changed all the ephemeron methods to use > bytesPerOop, cuz the ephemeron queue contains oops, but your fix is > just as good. cool! I thought so that would be the best. > > > > 3 - While debugging I also had a DNU #intAt: in #primitiveIntegerAt > ========================== > > Question: besides reviewing, how should I commit these fixes? one > issue per commit? all at once? > > > Typically all at once. What I try and do is commit a large set of > related changes in a single commit, so I wouldn't mix the fixes to > ephemerons with, say, fixes to time. But equally I'd commit any > changes I made to help debugging in the same commit. And all rules > are made to be broken ;-). ok! > > Hey, _thank you_! This is really great and ephemerons won't be > usable without testing like this. I'm in your debt. Ha, there is no debt (or at least it would be in the opposite direction). Now I'm working on another crash that I can easily reproduce using this script: Smalltalk supportsQueueingFinalization: true. e := (1 to: 200000) collect: [ :i | Ephemeron key: (ObjectFinalizer receiver: 'test', 'asd' selector: #logCr) value: Object new ]. Smalltalk garbageCollect. While debugging that in the simulator, we saw with clement that during #fireEphemeronsInRememberedSet, #fireEphemeronsOnEphemeronList we are always firing, tenuring and scavenging ephemerons regardless they are marked or not. fireEphemeronsInRememberedSet [SNIP] coInterpreter fireEphemeron: ephemeron. manager storePointerUnchecked: 0 ofObject: ephemeron withValue: (self copyAndForward: (manager keyOfEphemeron: ephemeron)). (self scavengeReferentsOf: ephemeron) [SNIP] So I put an assertion to check that the key of the ephemeron is marked when scavenging and it is not always the case... self assert: (manager isMarked: (manager keyOfEphemeron: ephemeron)). Is the code wrong? or I'm missing something? Guille > > > Guille > > -------- Original Message -------- >> I see, I probably I need to leave the simulator run for a longer >> time... Because running the image using the assertion VM took >> some time to crash, it may be the same case. >> >> -------- Original Message -------- >>> Some advance on my side, >>> >>> - Yes, apparently the image was already broken. I started a new >>> one and I can open it with the simulator. It seems that as soon >>> as I activate Ephemerons and I have alive ephemerons the heap >>> corrupts (and since saving the image fires a gc...). >>> >>> - Then, to catch the moment where the image breaks, I prepared >>> my image for debug with the following script: >>> >>> Smalltalk snapshotPrimitive. >>> f := ObjectFinalizer receiver: 'Hello' selector: #logCr. >>> d := EphemeronDictionary new. >>> d at: f put: f. >>> f := nil. >>> Smalltalk supportsQueueingFinalization: true. >>> 1 to: 2 do: [ :i | Smalltalk garbageCollect]. >>> >>> Then I opened it with the simulator (latest version: >>> VMMaker.oscog-tfel.1864) and I had several assertion failures in >>> >>> keyOfEphemeron: objOop >>> "Answer the object the ephemeron guards. This is its first >>> element." >>> self assert: ((self isNonImmediate: objOop) and: [self >>> isEphemeron: objOop]). >>> ^self fetchPointer: 0 ofObject: objOop >>> >>> followedKeyOfEphemeron: objOop >>> "Answer the object the ephemeron guards. This is its first >>> element." >>> self assert: ((self isNonImmediate: objOop) and: [self >>> isEphemeron: objOop]). >>> ^self followOopField: 0 ofObject: objOop >>> >>> So, I noticed the following: >>> >>> - Ephemerons in the unscanned list are marked, fired, and the >>> format of ephemerons is changed to a non-ephemeron format >>> - But they are not removed from the unscanned list >>> - then the mark #markAllUnscannedEphemerons fails tons of >>> assertions because it expects ephemeron objects and the >>> (not-anymore-)ephemeron is still there in the unscanned list >>> >>> self markInactiveEphemerons ifFalse: >>> [self fireAllUnscannedEphemerons]. >>> self markAllUnscannedEphemerons >>> >>> The strange thing is that if I ignore the assertions by >>> proceeding, the thing continues normally and it the image does >>> not break... >>> >>> So I then compiled the VM, with the latest version, and in trace >>> mode to compare. I attach the log of the stdout. But here there >>> is a résumé >>> >>> * First I see the same assertions I saw in the simulator >>> >>> (isNonImmediate(objOop)) && (isEphemeron(objOop)) 41155 >>> >>> (isNonImmediate(objOop)) && (isEphemeron(objOop)) 55477 >>> >>> * Then there are tons of repetitions of the same assertion: >>> >>> !(((GIV(mournQueue) != GIV(nilObj)) && >>> (isonObjStack(anEphemeronOrWeakArray, GIV(mournQueue))))) 60030 >>> >>> Which I understand it means that we are adding to the mourn >>> queue all the time the same object. Which is strange because it >>> is a WeakArray with a single slot which turns out to be nil (at >>> least at the moment I inspected it). >>> >>> * Then something breaks (!!) Looks like we are trying to mark a >>> forwarder. And then I have a follow up of assertions which are >>> probably caused by the same thing. >>> >>> !(isForwarded(field)) 49489 >>> >>> (classIndexOf(objToScan)) > (isForwardedObjectClassIndexPun()) 49537 >>> >>> (classIndex <= (tagMask())) || (classIndex >= >>> (arrayClassIndexPun())) 49403 >>> >>> objCouldBeClassObj(classObj) 49415 >>> >>> addressCouldBeOop(objOop) 59997 >>> >>> addressCouldBeObj(topOfObjStack((0 == >>> (fetchPointerofObject(ObjStackTopx, objStack)) ? >>> fetchPointerofObject(ObjStackNextx, objStack) : objStack))) 60002 >>> >>> addressCouldBeOop(objOop) 59997 >>> >>> * Finally there are some more >>> >>> !(isForwarded(field)) 49489 >>> >>> until a segmentation fault arrives while executing a fullGC >>> >>> ../results/pharo[0x80ceaa4] >>> ../results/pharo[0x80cfde4] >>> ../results/pharo(fullGC+0x9b)[0x80c95ea] >>> ../results/pharo[0x80e2d49] >>> ../results/pharo[0x80e5f4a] >>> ../results/pharo[0x80ebca3] >>> ../results/pharo(ceStackOverflow+0xd7)[0x809356a] >>> [0x91002c6] >>> ../results/pharo(interpret+0x128)[0x8082b38] >>> ../results/pharo(main+0x23a)[0x810a7db] >>> /lib/i386-linux-gnu/i686/cmov/libc.so.6(__libc_start_main+0xf3)[0xf73b5a63] >>> [0x1000] >>> >>> I'll continue digging a bit more, >>> Guille >>> >>> -------- Original Message -------- >>>> Hi Guille, >>>> >>>> On Thu, May 19, 2016 at 12:53 AM, Guille Polito >>>> <guillermopolito(a)gmail.com <mailto:guillermopolito@gmail.com>> >>>> wrote: >>>> >>>> >>>> >>>> -------- Original Message -------- >>>>> Hi Guille, >>>>> >>>>> On Wed, May 18, 2016 at 12:46 AM, Guille Polito >>>>> <guillermopolito(a)gmail.com >>>>> <mailto:guillermopolito@gmail.com>> wrote: >>>>> >>>>> Hello, >>>>> >>>>> -------- Original Message -------- >>>>>> >>>>>> >>>>>> >>>>>> Hi Guille, Hi Pablo (and welcome), >>>>>> >>>>>> On Tue, May 17, 2016 at 8:37 AM, Guille Polito >>>>>> <guillermopolito(a)gmail.com >>>>>> <mailto:guillermopolito@gmail.com>> wrote: >>>>>> >>>>>> >>>>>> Hi Eliot, list >>>>>> >>>>>> I'm working here with Pablo (Tesone) on moving >>>>>> forward the Ephemeron implementation. >>>>>> >>>>> >>>>> >>>>> Where's "here"? Are you in Lille? >>>> Yup. Pablo is a new Phd student here :) >>>>> >>>>> >>>>>> We first installed Eliot's changeset, added a >>>>>> #mourn method and an EphemeronDictionary >>>>>> collection, and then started testing something >>>>>> like this: >>>>>> >>>>>> f := ObjectFinalizer receiver: 'Hello' selector: >>>>>> #logCr. >>>>>> d := EphemeronDictionary new. >>>>>> >>>>>> d at: f put: f. >>>>>> >>>>>> f := nil. >>>>>> Smalltalk garbageCollect. >>>>>> >>>>>> >>>>>> So this looks like something simulate able. Are you >>>>>> able to use the simulator? If not, why not? >>>>> >>>>> For some reason I have that bytesToShift when opening >>>>> the image is negative. >>>>> >>>>> >>>>> That is to be expected. In the real VM the heap is >>>>> located somewhere well above the bottom of the address >>>>> space, typically above the program code. In the simulator >>>>> the heap is located either at 0 (an interpreter or stack >>>>> VM) or immediately above the code zone (in a Cogit VM). >>>>> So when an image that has been saved on the real VM is >>>>> loaded into the simulator all oops have to be adjusted >>>>> down and hence bytesToShift is negative. >>>>> >>>>> >>>>> bytesToShift := objectMemory >>>>> memoryBaseForImageRead - oldBaseAddr. "adjust pointers >>>>> for zero base address" >>>>> >>>>> So I cannot continue loading because addresses become >>>>> negative and I have "Improper Store into indexable >>>>> object kind of errors". >>>>> >>>>> >>>>> Can you post a back trace? Where is this happening? >>>> I'm working in latest pharo (5.0), using the same source >>>> code that is used in the Pharo CI jobs to build the VM >>>> (pharo branded). I would expect this branch to be stable, >>>> maybe it could be a bit behind your branch of development, >>>> but I think Esteban merges regularly. >>>> >>>> >>>> Esteban is very busy trying to get UFFI working, and having >>>> just got Pharo 5 released and working on Pharo 6 to be >>>> released. I'd prefer it if you used the tip of VMMaker.oscog. >>>> Further, that's the package that Clément is using and he's your >>>> expert source of local help. >>>> >>>> >>>> I'm executing this, >>>> >>>> vm := StackInterpreterSimulator newWithOptions: >>>> #(#ObjectMemory #Spur32BitMemoryManager ). >>>> vm desiredNumStackPages: 8. "Makes simulation faster by >>>> creating fewer stack pages." >>>> (vm openOn: '/home/guille/Pharo/temp/ephemerons/broken.image') >>>> openAsMorph; run. >>>> >>>> And here is the trace. The error happens while swizzling. >>>> >>>> LittleEndianBitmap(Object)>>error: >>>> LittleEndianBitmap(Object)>>errorImproperStore >>>> LittleEndianBitmap(Object)>>at:put: >>>> Spur32BitMMLESimulator>>longAt:put: >>>> Spur32BitMMLESimulator(SpurMemoryManager)>>swizzleFieldsOfObject: >>>> Spur32BitMMLESimulator(SpurMemoryManager)>>adjustAllOopsBy: >>>> Spur32BitMMLESimulator(SpurMemoryManager)>>initializeObjectMemory: >>>> StackInterpreterSimulatorLSB(StackInterpreter)>>initializeInterpreter: >>>> [ self initializeInterpreter: bytesToShift ] in >>>> StackInterpreterSimulatorLSB(StackInterpreterSimulator)>>openOn:extraMemory: >>>> in Block: [ self initializeInterpreter: bytesToShift ] >>>> >>>> >>>> So the image is presumably already broken? Looks to me like >>>> it was corrupted when saved. Can you reproduce the problem >>>> that led to this image being broken from a working image? >>>> >>>>> What version of VMMaker.oscog are you using? >>>> Monticello reports VMMaker.oscog-eem.1855. >>>> However, I'm not sure I have the right number, because >>>> source code is now in git. >>>> >>>> >>>> It would be so great if you could use Monticello, not git, and >>>> hence be able to contribute back. >>>> >>>>> Are you running in Pharo or Squeak? If you're in Lille >>>>> you could perhaps visit Clément's office and get him to >>>>> take a look. Clément, would that be ok? >>>> I'll maybe see it with clement, but today I have to work on >>>> some other project... >>>>> >>>>>> When debugging the VM there are two main levels of >>>>>> support, one is the simulator where there is maximum >>>>>> support for debugging: >>>>>> - asserts on all the time >>>>>> - arbitrary breakpoints >>>>>> - attempting every GC in a copy of the heap before >>>>>> doing the real GC so that bugs in the GC can be >>>>>> investigated without needing to construct a >>>>>> reproducible case after a crash >>>>>> - the Smalltalk environment to inspect and browse >>>>>> >>>>>> The next level is the assert and debug VMs. If you >>>>>> look in the build directories on the Cog svn branch >>>>>> you'll see that all of them build three VMs, a >>>>>> production VM with maximum optimisation and asserts >>>>>> excluded, an assert VM with -O1 and asserts enabled, >>>>>> and a debug VM with -O0 and asserts enabled. So if >>>>>> you either don't see the bug in the simulator, or the >>>>>> simulator is too slow for the case being examined, or >>>>>> if the bug doesn't show up in the simulator (the >>>>>> worst of all worlds), build both assert and debug VMs >>>>>> and run with the assert VM first. >>>>>> >>>>> Well so far we were using a VM compiled for debug with >>>>> a graphical C debugger. It was not so bad. However, I >>>>> cannot say I'm missing a better debugger. >>>>> >>>>> >>>>> "Compiled for debug" is vague. Do you mean it is compiled >>>>> with -g -O0, or in addition is compiled with -g -O0 >>>>> -DDEBUGVM=0 -DNDEBUG=1? >>>> That would exactly be: >>>> >>>> { '-g3'. >>>> '-O0'. >>>> '-msse2'. >>>> '-D_GNU_SOURCE'. >>>> '-DITIMER_HEARTBEAT=1'. >>>> '-DNO_VM_PROFILE=1'. >>>> '-DDEBUGVM=1'. >>>> '-DNDEBUG' } >>>> >>>> And Esteban told me to compile it with '-UNDEBUG' to get >>>> more information, but I did not try this yet. >>>> >>>> >>>> Yes. NDEBUG is what turns off asserts. You don't have a >>>> proper assert or debug VM unless you do not use -NDEBUG. >>>> >>>> Thanks! >>>> >>>>>> Note that there is a heap leak checker which can be >>>>>> enabled both in the simulator and the assert and >>>>>> debug VMs. See the checkForLeaks method and the >>>>>> -leakcheck argument. >>>>> >>>>> ok! >>>>>> >>>>>> Without the simulator or the assert and debug VMs you >>>>>> are flying blind. It is /really/ productive to use >>>>>> the simulator for debugging, provided the bug is >>>>>> reproducible within a short amount of time, as for >>>>>> example your case is above. >>>>> >>>>> Ok, gotcha! By this afternoon I'll have some news >>>>> probably. >>>>> >>>>> Thanks a lot! >>>>> >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> However, as soon as we garbage collect twice, we >>>>>> have a VM crash. We started debugging the VM to >>>>>> see if we could have some more clues. >>>>>> >>>>>> The first thing we noticed is that the first time >>>>>> the GC runs, the mournQueue is nil. This is of >>>>>> course expected because the new finalization >>>>>> mechanism was not active and then there was no >>>>>> need to create the mournQueue. We saw that the >>>>>> mournQueue is actually created in a lazy fashion >>>>>> when putting queuing a mourned object (I refer >>>>>> myself to #queueMourner: and >>>>>> #ensureRoomOnObjStackAt:). So the second time the >>>>>> GC passes, the mournQueue is there. So far ok, >>>>>> but still crashing. >>>>>> >>>>>> The crash happens in the call to >>>>>> >>>>>> markAndTraceObjStackandContents(GIV(mournQueue), 1); >>>>>> >>>>>> after the >>>>>> >>>>>> if (!markAndTraceContents) { >>>>>> return; >>>>>> } >>>>>> >>>>>> But when understanding why, it starts being less >>>>>> clear to us :). We used the printObjStack() >>>>>> function and we saw that: >>>>>> >>>>>> call printObjStack(markStack) >>>>>> call printObjStack(weaklingStack) >>>>>> >>>>>> and we saw in the console some output that makes >>>>>> sense. However, printing the mournQueue in the >>>>>> same manner produces some strange output >>>>>> >>>>>> call printObjStack(mournQueue) >>>>>> >>>>>> head 0xb06e980 cx 18 (18) fmt 10 (10) sz 4092 >>>>>> (4092) myx: 4098 (4098) unmkd >>>>>> topx: 14 next: 0x0 free: 0x0 >>>>>> >>>>>> We noticed that free and next are 0x0 while the >>>>>> others are not... >>>>>> >>>>>> Finally we saw there is isValidObjStack(), that >>>>>> gave us the following results: >>>>>> >>>>>> call isValidObjStack(markStack) => 1 >>>>>> >>>>>> call isValidObjStack(weaklingStack) => 0 >>>>>> p objStackInvalidBecause = "marking but page is >>>>>> unmarked" >>>>>> >>>>>> call isValidObjStack(mournQueue) => 0 >>>>>> p objStackInvalidBecause = "marking but page is >>>>>> unmarked" >>>>>> >>>>>> >>>>>> So we assume that the stack creation is wrong? We >>>>>> are a bit lost in here. >>>>>> >>>>>> Guille and Pablo >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> -- >>>>>> _,,,^..^,,,_ >>>>>> best, Eliot >>>>> >>>>> >>>>> >>>>> >>>>> -- >>>>> _,,,^..^,,,_ >>>>> best, Eliot >>>> >>>> >>>> >>>> >>>> -- >>>> _,,,^..^,,,_ >>>> best, Eliot >>> >> > > > > > -- > _,,,^..^,,,_ > best, Eliot

4 7

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

Vm-dev June 2016