tim Rowledge uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-tpr.162.mcz
==================== Summary ====================
Name: Cog-tpr.162 Author: tpr Time: 26 June 2014, 9:13:41.852 am UUID: f435dde7-4288-4d40-ae5e-977a989adce9 Ancestors: Cog-tpr.161
RE-commit 160 because of http error. add tracing of any ADDs to the SP
=============== Diff against Cog-eem.160 ===============
Item was added: + ----- Method: GdbARMAlien>>instructionIsAddSP: (in category 'testing') ----- + instructionIsAddSP: instr + "is this aadd sp, sp, #? - instruction?" + ^instr >> 28 < 16rF "test for allowed condcode - 0xF is extension" and: [(instr bitAnd: (16rFFFFF00)) = (16r28DD000)]!
Item was added: + ----- Method: GdbARMAlien>>instructionIsAlignSP: (in category 'testing') ----- + instructionIsAlignSP: instr + "is this a bics sp, sp, #7 - instruction?" + ^instr >> 28 < 16rF "test for allowed condcode - 0xF is extension" and: [(instr bitAnd: (16rFFFFFFF)) = (16r3DDD007)]!
Item was changed: ----- Method: GdbARMAlien>>writePopPushDetailsIn:in:for: (in category 'printing') ----- + writePopPushDetailsIn: memory in: transcript for: aCogit + "if the next instruction is a pop or push, or a ldr/str that touches the + SP, write the details ontranscript" - writePopPushDetailsIn: memory in: transcript for: aCogit - "if the next instruction is a pop or push, or a ldr/str that touches the SP, write the details ontranscript" | instr | + [instr := memory unsignedLongAt: self pc + 1 bigEndian: false] + on: Error + do: [:ex | ^ self]. + (self instructionIsPop: instr) + ifTrue: [^transcript tab; nextPutAll: 'POP ' , (memory unsignedLongAt: self sp + 1 bigEndian: false) hex , ' from ' , self sp hex; cr]. + (self instructionIsPush: instr) + ifTrue: [^transcript tab; nextPutAll: 'PUSH ' , (self register: (instr bitAnd: 61440) + >> 12) hex , ' to ' , (self sp - 4) hex; cr]. + (self instructionIsLDRSP: instr) + ifTrue: [| val | + val := self r10 > memory size + ifTrue: [aCogit simulatedVariableAt: self r10] + ifFalse: [memory unsignedLongAt: self r10 + 1 bigEndian: false]. + ^transcript tab; nextPutAll: 'LOAD SP ' , val hex , ' from ' , self r10 hex; cr]. + (self instructionIsSTRSP: instr) + ifTrue: [^transcript tab; nextPutAll: 'STORE SP ' , self sp hex , ' to ' , self r10 hex; cr]. + (self instructionIsAlignSP: instr) + ifTrue: [^transcript tab; nextPutAll: 'ALIGN SP ' , self sp hex; cr]. + (self instructionIsAddSP: instr) ifTrue:[^transcript tab; nextPutAll: 'ADD ', (instr bitAnd: 16rFF) asString,' to SP = ' , self sp hex; cr]! - - [ instr := memory unsignedLongAt: self pc + 1 bigEndian: false] on: Error do:[:ex| ^self]. - (self instructionIsPop: instr) ifTrue:[transcript tab; nextPutAll: 'pop ', (memory unsignedLongAt: self sp + 1 bigEndian: false) hex , ' from ', (self sp hex); cr]. - (self instructionIsPush: instr) ifTrue:[transcript tab; nextPutAll: 'push ', (self register: ((instr bitAnd: 16rF000) >>12)) hex , ' to ', (self sp -4) hex; cr]. - - (self instructionIsLDRSP: instr) ifTrue:[| val| - val := self r10 > memory size - ifTrue:[aCogit simulatedVariableAt: self r10] - ifFalse:[memory unsignedLongAt: self r10 + 1 bigEndian: false]. - transcript tab; nextPutAll: 'load SP', val hex , ' from ', (self r10) hex; cr]. - - (self instructionIsSTRSP: instr) ifTrue:[transcript tab; nextPutAll: 'store SP', (self sp) hex , ' to ', (self r10) hex; cr].!
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