Vm-dev October 2015

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VM Maker: VMMaker.oscog-eem.1498.mcz
by commits＠source.squeak.org 22 Oct '15

22 Oct '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1498.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1498 Author: eem Time: 21 October 2015, 3:50:58.285 pm UUID: 48806953-dab0-4898-a699-fb076d884b77 Ancestors: VMMaker.oscog-eem.1497 x64 Cogit: Add barely tested support for supporting the System V and MSVC ABIs for x64 (they used to be the same :-( Looks like Microsoft have ARMified their x64 ABI).. Fix bugs in x64's is32BitSignedImmediate:, setting of CStack/FramePointer & disassembly at pc.. Comments and comment typos. Needs Cog-eem.287 =============== Diff against VMMaker.oscog-eem.1497 =============== Item was changed: ----- Method: CogVMSimulator>>utilitiesMenu: (in category 'UI') ----- utilitiesMenu: aMenuMorph aMenuMorph add: 'toggle transcript' action: #toggleTranscript; add: 'clone VM' action: #cloneSimulationWindow; addLine; add: 'print ext head frame' action: #printExternalHeadFrame; add: 'print int head frame' action: #printHeadFrame; add: 'print mc/cog frame' action: [self printFrame: cogit processor fp WithSP: cogit processor sp]; add: 'short print ext frame & callers' action: [self shortPrintFrameAndCallers: framePointer]; add: 'short print int frame & callers' action: [self shortPrintFrameAndCallers: localFP]; add: 'short print mc/cog frame & callers' action: [self shortPrintFrameAndCallers: cogit processor fp]; add: 'long print ext frame & callers' action: [self printFrameAndCallers: framePointer SP: stackPointer]; add: 'long print int frame & callers' action: [self printFrameAndCallers: localFP SP: localSP]; add: 'long print mc/cog frame & callers' action: [self printFrameAndCallers: cogit processor fp SP: cogit processor sp]; add: 'print frame...' action: [(self promptHex: 'print frame') ifNotNil: [:fp| self printFrame: fp]]; add: 'print call stack' action: #printCallStack; add: 'print stack call stack' action: #printStackCallStack; add: 'print stack call stack of...' action: [(self promptHex: 'frame') ifNotNil: [:fp| self printStackCallStackOf: fp]]; add: 'print call stack of...' action: [(self promptHex: 'context or process oop') ifNotNil: [:obj| self printCallStackOf: obj]]; add: 'print call stack of frame...' action: [(self promptHex: 'frame') ifNotNil: [:fp| self printCallStackFP: fp]]; add: 'print all stacks' action: #printAllStacks; add: 'write back local ptrs' action: [stackPointer := localSP. framePointer := localFP. instructionPointer := localIP. self writeBackHeadFramePointers]; add: 'write back mc ptrs' action: [stackPointer := cogit processor sp. framePointer := cogit processor fp. instructionPointer := cogit processor eip. self writeBackHeadFramePointers]; addLine; add: 'print rump C stack' action: [objectMemory printMemoryFrom: cogit processor sp to: cogit getCStackPointer]; add: 'print registers' action: [cogit processor printRegistersOn: transcript]; add: 'print register map' action: [cogit printRegisterMapOn: transcript]; add: 'disassemble method/trampoline...' action: [(self promptHex: 'pc') ifNotNil: [:pc| cogit disassembleCodeAt: pc]]; add: 'disassemble method/trampoline at pc' action: + [cogit disassembleCodeAt: (((cogit codeEntryFor: cogit processor pc) isNil + and: [(cogit methodZone methodFor: cogit processor pc) = 0]) - [cogit disassembleCodeAt: ((cogit methodZone methodFor: cogit processor pc) = 0 ifTrue: [instructionPointer] ifFalse: [cogit processor pc])]; add: 'disassemble ext head frame method' action: [cogit disassembleMethod: (self frameMethod: framePointer)]; add: 'print oop...' action: [(self promptHex: 'print oop') ifNotNil: [:oop| self printOop: oop]]; add: 'long print oop...' action: [(self promptHex: 'print oop') ifNotNil: [:oop| self longPrintOop: oop]]; add: 'print context...' action: [(self promptHex: 'print context') ifNotNil: [:oop| self printContext: oop]]; addLine; add: 'inspect object memory' target: objectMemory action: #inspect; add: 'run leak checker' action: [Cursor execute showWhile: [self runLeakChecker]]; add: 'inspect cointerpreter' action: #inspect; add: 'inspect cogit' target: cogit action: #inspect; add: 'inspect method zone' target: cogit methodZone action: #inspect. self isThreadedVM ifTrue: [aMenuMorph add: 'inspect thread manager' target: self threadManager action: #inspect]. aMenuMorph addLine; add: 'print cog methods' target: cogMethodZone action: #printCogMethods; add: 'print cog methods with prim...' action: [(self promptNum: 'prim index') ifNotNil: [:pix| cogMethodZone printCogMethodsWithPrimitive: pix]]; add: 'print cog methods with selector...' action: [|s| s := UIManager default request: 'selector'. s notEmpty ifTrue: [s = 'nil' ifTrue: [s := nil]. cogMethodZone methodsDo: [:m| (s ifNil: [m selector = objectMemory nilObject] ifNotNil: [(objectMemory numBytesOf: m selector) = s size and: [(self str: s n: (m selector + objectMemory baseHeaderSize) cmp: (objectMemory numBytesOf: m selector)) = 0]]) ifTrue: [cogit printCogMethod: m]]]]; add: 'print cog method for...' action: [(self promptHex: 'pc') ifNotNil: [:pc| cogit printCogMethodFor: pc]]; add: 'print cog method header for...' action: [(self promptHex: 'pc') ifNotNil: [:pc| cogit printCogMethodHeaderFor: pc]]; add: 'print trampoline table' target: cogit action: #printTrampolineTable; add: 'print prim trace log' action: #dumpPrimTraceLog; add: 'report recent instructions' target: cogit action: #reportLastNInstructions; add: 'set break pc (', (cogit breakPC isInteger ifTrue: [cogit breakPC hex] ifFalse: [cogit breakPC printString]), ')...' action: [(self promptHex: 'break pc') ifNotNil: [:bpc| cogit breakPC: bpc]]; add: (cogit singleStep ifTrue: ['no single step'] ifFalse: ['single step']) action: [cogit singleStep: cogit singleStep not]; add: (cogit printRegisters ifTrue: ['no print registers each instruction'] ifFalse: ['print registers each instruction']) action: [cogit printRegisters: cogit printRegisters not]; add: (cogit printInstructions ifTrue: ['no print instructions each instruction'] ifFalse: ['print instructions each instruction']) action: [cogit printInstructions: cogit printInstructions not]; addLine; add: 'click step' action: [cogit setClickStepBreakBlock]; add: 'set break count...' action: [|s| s := UIManager default request: 'break count (dec)'. s notEmpty ifTrue: [breakCount := Integer readFrom: s readStream]]; add: 'set break selector...' action: [|s| s := UIManager default request: 'break selector'. s notEmpty ifTrue: [self setBreakSelector: s]]; add: 'set break block...' action: [|s| s := UIManager default request: 'break block' initialAnswer: '[:theCogit| false]'. s notEmpty ifTrue: [self setBreakBlockFromString: s]]; add: 'set cogit break method...' action: [(self promptHex: 'cogit breakMethod') ifNotNil: [:bm| cogit setBreakMethod: bm]]; add: (printBytecodeAtEachStep ifTrue: ['no print bytecode each bytecode'] ifFalse: ['print bytecode each bytecode']) action: [self ensureDebugAtEachStepBlock. printBytecodeAtEachStep := printBytecodeAtEachStep not]; add: (printFrameAtEachStep ifTrue: ['no print frame each bytecode'] ifFalse: ['print frame each bytecode']) action: [self ensureDebugAtEachStepBlock. printFrameAtEachStep := printFrameAtEachStep not]. ^aMenuMorph! Item was changed: CogAbstractInstruction subclass: #CogX64Compiler instanceVariableNames: '' + classVariableNames: 'ABI CDQ CMPXCHGAwR CMPXCHGMwrR CPUID IDIVR IMULRR LFENCE LOCK MFENCE ModReg ModRegInd ModRegIndDisp32 ModRegIndSIB ModRegRegDisp32 ModRegRegDisp8 R10 R11 R12 R13 R14 R15 R8 R9 RAX RBP RBX RCX RDI RDX RSI RSP SFENCE SIB1 SIB2 SIB4 SIB8 XCHGAwR XCHGMwrR XCHGRR XMM0H XMM0L XMM1H XMM1L XMM2H XMM2L XMM3H XMM3L XMM4H XMM4L XMM5H XMM5L XMM6H XMM6L XMM7H XMM7L' - classVariableNames: 'CDQ CMPXCHGAwR CMPXCHGMwrR CPUID IDIVR IMULRR LFENCE LOCK MFENCE ModReg ModRegInd ModRegIndDisp32 ModRegIndSIB ModRegRegDisp32 ModRegRegDisp8 R10 R11 R12 R13 R14 R15 R8 R9 RAX RBP RBX RCX RDI RDX RSI RSP SFENCE SIB1 SIB2 SIB4 SIB8 XCHGAwR XCHGMwrR XCHGRR XMM0H XMM0L XMM1H XMM1L XMM2H XMM2L XMM3H XMM3L XMM4H XMM4L XMM5H XMM5L XMM6H XMM6L XMM7H XMM7L' poolDictionaries: '' category: 'VMMaker-JIT'! !CogX64Compiler commentStamp: 'eem 9/14/2015 17:12' prior: 0! I generate x64 (x86-64) instructions from CogAbstractInstructions. For reference see 1. IA-32 Intel® Architecture Software Developer's Manual Volume 2A: Instruction Set Reference, A-M 2. IA-32 Intel® Architecture Software Developer's Manual Volume 2A: Instruction Set Reference, N-Z http://www.intel.com/products/processor/manuals/ or AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions AMD64 Architecture Programmer's Manual Volume 4: 128-bit Media Instructions AMD64 Architecture Programmer's Manual Volume 5: 64-bit Media and x87 Floating Point Instructions http://developer.amd.com/resources/documentation-articles/developer-guides-… (® is supposed to be the Unicode "registered sign").! Item was added: + ----- Method: CogX64Compiler class>>ABI (in category 'accessing') ----- + ABI + "Answer the name of the supported ABI, #SysV or #MSVC" + ^ABI! Item was changed: ----- Method: CogX64Compiler class>>initialize (in category 'class initialization') ----- initialize "Initialize various x64 instruction-related constants. [1] IA-32 Intel® Architecture Software Developer's Manual Volume 2A: Instruction Set Reference, A-M" "CogX64Compiler initialize" | specificOpcodes refs | self ~~ CogX64Compiler ifTrue: [^self]. + ABI ifNil: + [ABI := #SysV]. "Default ABI; other choice is #MSVC" + RAX := 0. RCX := 1. "Were they completely mad or simply sadistic?" RDX := 2. RBX := 3. RSP := 4. RBP := 5. RSI := 6. RDI := 7. R8 := 8. R9 := 9. R10 := 10. R11 := 11. R12 := 12. R13 := 13. R14 := 14. R15 := 15. XMM0L := 0. XMM1L := 2. XMM2L := 4. XMM3L := 6. XMM4L := 8. XMM5L := 10. XMM6L := 12. XMM7L := 14. XMM0H := 1. XMM1H := 3. XMM2H := 5. XMM3H := 7. XMM4H := 9. XMM5H := 11. XMM6H := 13. XMM7H := 15. "Mod R/M Mod fields. See [1] Sec 2.4, 2.5 & 2.6 & Table 2-2" ModRegInd := 0. ModRegIndSIB := 4. ModRegIndDisp32 := 5. ModRegRegDisp8 := 1. ModRegRegDisp32 := 2. ModReg := 3. "SIB Scaled Index modes. See [1] Sec 2.4, 2.5 & 2.6 & Table 2-3" SIB1 := 0. SIB2 := 1. SIB4 := 2. SIB8 := 3. "Specific instructions" LastRTLCode ifNil: [CogRTLOpcodes initialize]. specificOpcodes := #(CDQ IDIVR IMULRR CPUID LFENCE MFENCE SFENCE LOCK CMPXCHGAwR CMPXCHGMwrR XCHGAwR XCHGMwrR XCHGRR). refs := (thisContext method literals select: [:l| l isVariableBinding and: [classPool includesKey: l key]]) collect: [:ea| ea key]. (classPool keys reject: [:k| (specificOpcodes includes: k) or: [refs includes: k]]) do: [:k| Undeclared declare: k from: classPool]. specificOpcodes withIndexDo: [:classVarName :value| self classPool declare: classVarName from: Undeclared; at: classVarName put: value + LastRTLCode - 1]! Item was changed: ----- Method: CogX64Compiler>>genMarshallNArgs:arg:arg:arg:arg: (in category 'abi') ----- genMarshallNArgs: numArgs arg: regOrConst0 arg: regOrConst1 arg: regOrConst2 arg: regOrConst3 "Generate the code to pass up to four arguments in a C run-time call. Hack: each argument is either a negative number, that of an abstract register, or a non-negative number, that of a constant parameter. Run-time calls have no more than four arguments, so chosen so that on ARM, where in its C ABI the first four integer arguments are passed in registers, all arguments can be passed in registers. We + defer to the back end to generate this code not so much that the back end knows whether it uses - defer to the back end to generate this code not so much that teh back end knows whether it uses the stack or registers to pass arguments (it does, but...). In fact we defer for an extremely evil reason. Doing so allows the x64 (where up to 6 args are passed) to assign the register arguments in an order + that allows some of the argument registers to be used for specific abstract registers, specifically - that allows some of the argument registers to be used for specificabstract registers, specifically ReceiverResultReg and ClassReg. This is evil, evil, evil, but also its really nice to keep using the old register assignments the principal author has grown accustomed to. How can this possibly work? Look at Cogit class>>runtime for a list of the run-time calls and their arguments, including which arguments are passed in which registers. Look at CogX64Compiler's subclass implementations of concreteRegister:. There are no calls in which ReceiverResultReg (RDX) and/or ClassReg (RCX) are passed along with Arg0Reg and Arg1Reg, and none in which the use of either ReceiverResultReg or ClassReg conflict for args 3 & 4. So if args are assigned in order, the registers do not get overwritten. Yes, this is evil, but it's so nice to continue to use RCX & RDX." <inline: true> numArgs = 0 ifTrue: [^self]. regOrConst0 >= 0 ifTrue: [cogit MoveCq: regOrConst0 R: RDI] ifFalse: [(self concreteRegister: regOrConst0) ~= RDI ifTrue: [cogit MoveR: regOrConst0 R: RDI]]. numArgs = 1 ifTrue: [^self]. regOrConst1 >= 0 ifTrue: [cogit MoveCq: regOrConst1 R: RSI] ifFalse: [(self concreteRegister: regOrConst1) ~= RSI ifTrue: [cogit MoveR: regOrConst1 R: RSI]]. numArgs = 2 ifTrue: [^self]. + self cppIf: ABI == #SysV ifTrue: + [regOrConst2 >= 0 + ifTrue: [cogit MoveCq: regOrConst2 R: RDX] + ifFalse: + [(self concreteRegister: regOrConst2) ~= RDX ifTrue: + [cogit MoveR: regOrConst2 R: RDX]]. + numArgs = 3 ifTrue: [^self]. + regOrConst3 >= 0 + ifTrue: [cogit MoveCq: regOrConst3 R: RCX] + ifFalse: + [(self concreteRegister: regOrConst3) ~= RCX ifTrue: + [cogit MoveR: regOrConst3 R: RCX]]]. + self cppIf: ABI == #MSVC ifTrue: + [regOrConst2 >= 0 + ifTrue: [cogit MoveCq: regOrConst2 R: R8] + ifFalse: + [(self concreteRegister: regOrConst2) ~= R8 ifTrue: + [cogit MoveR: regOrConst2 R: R8]]. + numArgs = 3 ifTrue: [^self]. + regOrConst3 >= 0 + ifTrue: [cogit MoveCq: regOrConst3 R: R9] + ifFalse: + [(self concreteRegister: regOrConst3) ~= R9 ifTrue: + [cogit MoveR: regOrConst3 R: R9]]]. + self assert: numArgs <= 4! - regOrConst2 >= 0 - ifTrue: [cogit MoveCq: regOrConst2 R: RDX] - ifFalse: - [(self concreteRegister: regOrConst2) ~= RDX ifTrue: - [cogit MoveR: regOrConst2 R: RDX]]. - numArgs = 3 ifTrue: [^self]. - regOrConst3 >= 0 - ifTrue: [cogit MoveCq: regOrConst3 R: RCX] - ifFalse: - [(self concreteRegister: regOrConst3) ~= RCX ifTrue: - [cogit MoveR: regOrConst3 R: RCX]]! Item was changed: ----- Method: CogX64Compiler>>is32BitSignedImmediate: (in category 'testing') ----- is32BitSignedImmediate: a64BitUnsignedOperand + ^self cCode: [(self cCoerceSimple: a64BitUnsignedOperand to: #int) = (self cCoerceSimple: a64BitUnsignedOperand to: #long)] + inSmalltalk: [((a64BitUnsignedOperand >> 32) signedIntFromLong between: -1 and: 0) + and: [(a64BitUnsignedOperand >> 31) signedIntFromLong between: -1 and: 0]]! - ^(a64BitUnsignedOperand >> 31) signedIntFromLong between: -1 and: 0! Item was changed: ----- Method: CogX64Compiler>>mod:RM:RO: (in category 'encoding') ----- mod: mod RM: regMode RO: regOpcode + "See ModR/M byte & opcode syntax + In addition to the notation shown above in 'Mnemonic Syntax' on page 43, + the following notation indicates the size and type of operands in the syntax of an instruction opcode: + /digit Indicates that the ModRM byte specifies only one register or memory (r/m) operand. + The digit is specified by the ModRM reg field and is used as an instruction-opcode extension. + Valid digit values range from 0 to 7. + /r Indicates that the ModRM byte specifies both a register operand and a reg/mem (register or memory) operand." ^mod << 6 + ((regOpcode bitAnd: 7) << 3) + (regMode bitAnd: 7)! Item was changed: ----- Method: CogX64CompilerTests>>varBaseAddress (in category 'accessing') ----- varBaseAddress + "Answer a value that should be sufficiently high that var base relative addressing is never generated." - "Answer a value that should be sufficiently high that var bare relative addressing is never generated." ^1 << 60! Item was changed: ----- Method: Cogit>>handleReadSimulationTrap: (in category 'simulation only') ----- handleReadSimulationTrap: aProcessorSimulationTrap + "Try to read the value of a variable given its fake address in simulatedVariableGetters. + simulatedVariableGetters maps to an evaluable that yields the variable's actual value. + To support the x64, also gracefully accept an address which is in simulatedTrampolines, + in which case no mapping is necessary." <doNotGenerate> + | address variableValue accessor | + address := aProcessorSimulationTrap address. + variableValue := (simulatedVariableGetters + at: address + ifAbsent: + [(simulatedTrampolines includesKey: address) + ifTrue: [address] + ifFalse: [simulatedVariableGetters errorKeyNotFound]]) value asInteger. - | variableValue accessor | - variableValue := (simulatedVariableGetters at: aProcessorSimulationTrap address) value asInteger. accessor := aProcessorSimulationTrap registerAccessor. processor perform: accessor + with: (variableValue == address + ifTrue: [address] + ifFalse: [processor convertIntegerToInternal: variableValue]). - with: variableValue signedIntToLong. accessor ~~ #pc: ifTrue: [processor pc: aProcessorSimulationTrap nextpc]! Item was changed: ----- Method: Cogit>>setCFramePointer: (in category 'accessing') ----- setCFramePointer: aFramePointer <api> <cmacro: '(theFP) (CFramePointer = (void *)(theFP))'> "and in the simulator we use..." ^(backEnd wantsNearAddressFor: #CFramePointer) + ifTrue: [CFramePointer := aFramePointer] - ifTrue: [CFramePointer] ifFalse: [objectMemory longAt: coInterpreter inMemoryCFramePointerAddress put: aFramePointer]! Item was changed: ----- Method: Cogit>>setCStackPointer: (in category 'accessing') ----- setCStackPointer: aStackPointer <api> <cmacro: '(theSP) (CStackPointer = (void *)(theSP))'> "and in the simulator we use..." ^(backEnd wantsNearAddressFor: #CStackPointer) + ifTrue: [CStackPointer := aStackPointer] - ifTrue: [CStackPointer] ifFalse: [objectMemory longAt: coInterpreter inMemoryCStackPointerAddress put: aStackPointer]!

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VM Maker: Cog-eem.287.mcz
by commits＠source.squeak.org 22 Oct '15

22 Oct '15

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.287.mcz ==================== Summary ==================== Name: Cog-eem.287 Author: eem Time: 21 October 2015, 3:46:40.857 pm UUID: f06b8b38-4ad3-4112-8aa2-6cccf6a75afe Ancestors: Cog-eem.286 Flesh out a good portion of the executuion error failure handling for x64. Pass the REX byte to the failure handlers. Leave unexamined error handlers using self shouldBeImplemented to catch my eye. Fix the order of ebx, ecx & edx in the IA32 alien's getters and setters. Refactor the methods answering the default debugger integer printing base. =============== Diff against Cog-eem.286 =============== Item was removed: - ----- Method: BochsIA32Alien class>>defaultIntegerBaseInDebugger (in category 'debugger') ----- - defaultIntegerBaseInDebugger - ^16! Item was changed: ----- Method: BochsIA32Alien>>registerStateGetters (in category 'accessing-abstract') ----- registerStateGetters + ^#( eax ecx edx ebx esp ebp esi edi eip eflags - ^#( eax ebx ecx edx esp ebp esi edi eip eflags xmm0low xmm1low xmm2low xmm3low xmm4low xmm5low xmm6low xmm7low )! Item was changed: ----- Method: BochsIA32Alien>>registerStateSetters (in category 'accessing-abstract') ----- registerStateSetters + ^#( eax: ecx: edx: ebx: esp: ebp: esi: edi: eip: eflags: - ^#( eax: ebx: ecx: edx: esp: ebp: esi: edi: eip: eflags: xmm0low: xmm1low: xmm2low: xmm3low: xmm4low: xmm5low: xmm6low: xmm7low: )! Item was changed: ----- Method: BochsX64Alien class>>initialize (in category 'class initialization') ----- initialize "BochsX64Alien initialize" | it | it := self basicNew. PostBuildStackDelta := 0. + OpcodeExceptionMap := Array new: 256 withAll: #handleExecutionPrimitiveFailureAt:in:rex:. - OpcodeExceptionMap := Array new: 256 withAll: #handleExecutionPrimitiveFailureAt:in:. OpcodeExceptionMap + at: 1 + it callOpcode put: #handleCallFailureAt:in:rex:; + at: 1 + it jmpOpcode put: #handleJmpFailureAt:in:rex:; + at: 1 + it retOpcode put: #handleRetFailureAt:in:rex:; + at: 1 + it movALObOpcode put: #handleMovALObFailureAt:in:rex:; + at: 1 + it movObALOpcode put: #handleMovObALFailureAt:in:rex:; + at: 1 + it movGvEvOpcode put: #handleMovGvEvFailureAt:in:rex:; + at: 1 + it movEvGvOpcode put: #handleMovEvGvFailureAt:in:rex:; + at: 1 + it movGbEbOpcode put: #handleMovGbEbFailureAt:in:rex:; + at: 1 + it movEbGbOpcode put: #handleMovEbGbFailureAt:in:rex:; + at: 1 + 16rFF put: #handleGroup5FailureAt:in:rex:. "Table A6 One-Byte and Two-Byte Opcode ModRM Extensions" + ExtendedOpcodeExceptionMap := Array new: 256 withAll: #handleExecutionPrimitiveFailureAt:in:rex:. - at: 1 + it callOpcode put: #handleCallFailureAt:in:; - at: 1 + it jmpOpcode put: #handleJmpFailureAt:in:; - at: 1 + it retOpcode put: #handleRetFailureAt:in:; - at: 1 + it movALObOpcode put: #handleMovALObFailureAt:in:; - at: 1 + it movObALOpcode put: #handleMovObALFailureAt:in:; - at: 1 + it movGvEvOpcode put: #handleMovGvEvFailureAt:in:; - at: 1 + it movEvGvOpcode put: #handleMovEvGvFailureAt:in:; - at: 1 + it movGbEbOpcode put: #handleMovGbEbFailureAt:in:; - at: 1 + it movEbGbOpcode put: #handleMovEbGbFailureAt:in:. - ExtendedOpcodeExceptionMap := Array new: 256 withAll: #handleExecutionPrimitiveFailureAt:in:. ExtendedOpcodeExceptionMap + at: 1 + it movGvEbOpcode put: #handleMovGvEbFailureAt:in:rex:! - at: 1 + it movGvEbOpcode put: #handleMovGvEbFailureAt:in:! Item was added: + ----- Method: BochsX64Alien>>handleCallFailureAt:in:rex: (in category 'error handling') ----- + handleCallFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a call into a ProcessorSimulationTrap signal." + | relativeJump | + self assert: rexByteOrNil isNil. + relativeJump := memoryArray longAt: pc + 2 bigEndian: false. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 5 + address: (pc + 5 + relativeJump) signedIntToLong64 + type: #call) + signal! Item was removed: - ----- Method: BochsX64Alien>>handleExecutionPrimitiveFailureAt:in: (in category 'error handling') ----- - handleExecutionPrimitiveFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" - "Handle an execution primitive failure for an unhandled opcode." - ^self reportPrimitiveFailure! Item was added: + ----- Method: BochsX64Alien>>handleExecutionPrimitiveFailureAt:in:rex: (in category 'error handling') ----- + handleExecutionPrimitiveFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Handle an execution primitive failure for an unhandled opcode." + ^self reportPrimitiveFailure! Item was changed: ----- Method: BochsX64Alien>>handleExecutionPrimitiveFailureIn:minimumAddress: (in category 'error handling') ----- handleExecutionPrimitiveFailureIn: memoryArray "<Bitmap|ByteArray>" minimumAddress: minimumAddress "Handle an execution primitive failure. Convert out-of-range call and absolute memory read into register instructions into ProcessorSimulationTrap signals." "self printIntegerRegistersOn: Transcript" "self printRegistersOn: Transcript" + | pc opcode rexByte offset | - | pc opcode offset | ((pc := self rip) between: minimumAddress and: memoryArray byteSize - 1) ifTrue: [opcode := memoryArray byteAt: pc + (offset := 1). (opcode bitAnd: 16rF8) = self rexPrefix ifTrue: "skip rex prefix if present" + [rexByte := opcode. + opcode := memoryArray byteAt: pc + (offset := 2)]. - [opcode := memoryArray byteAt: pc + (offset := 2)]. opcode ~= 16r0f ifTrue: [^self perform: (OpcodeExceptionMap at: opcode + 1) with: pc + with: memoryArray + with: rexByte]. - with: memoryArray]. opcode := memoryArray byteAt: pc + offset + 1. ^self perform: (ExtendedOpcodeExceptionMap at: opcode + 1) with: pc + with: memoryArray + with: rexByte]. - with: memoryArray]. ^self reportPrimitiveFailure! Item was added: + ----- Method: BochsX64Alien>>handleGroup5FailureAt:in:rex: (in category 'as yet unclassified') ----- + handleGroup5FailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a group 5 instruction into the relevant ProcessorSimulationTrap signal." + | modrmByte getter | + self assert: rexByteOrNil isNil. + modrmByte := memoryArray byteAt: pc + 2. + (modrmByte >> 3 bitAnd: 7) + caseOf: { + [2 "Call Ev"] -> [getter := self registerStateGetters at: (modrmByte bitAnd: 7) + 1. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 2 + address: (self perform: getter) + type: #call) + signal] }! Item was added: + ----- Method: BochsX64Alien>>handleJmpFailureAt:in:rex: (in category 'error handling') ----- + handleJmpFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a jmp into a ProcessorSimulationTrap signal." + | relativeJump | + self assert: rexByteOrNil isNil. + relativeJump := memoryArray longAt: pc + 2 bigEndian: false. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 5 + address: (pc + 5 + relativeJump) signedIntToLong64 + type: #jump) + signal! Item was added: + ----- Method: BochsX64Alien>>handleMovALObFailureAt:in:rex: (in category 'error handling') ----- + handleMovALObFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a read into rax/eax into a ProcessorSimulationTrap signal." + rexByteOrNil ifNotNil: + [^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 10 + address: (memoryArray unsignedLong64At: pc + 3) + type: #read + accessor: #rax:) + signal]. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 5 + address: (memoryArray unsignedLongAt: pc + 2) + type: #read + accessor: #eax:) + signal! Item was added: + ----- Method: BochsX64Alien>>handleMovEbGbFailureAt:in:rex: (in category 'error handling') ----- + handleMovEbGbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a byte register write into a ProcessorSimulationTrap signal." + | modrmByte | + self shouldBeImplemented. + ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC0) = 16r80) "ModRegRegDisp32" + ifTrue: + [(ProcessorSimulationTrap + pc: pc + nextpc: pc + 6 + address: ((self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1)) + + (memoryArray unsignedLongAt: pc + 3 bigEndian: false) + bitAnd: 16rFFFFFFFF) + type: #write + accessor: (#(al cl dl bl ah ch dh bh) at: ((modrmByte >> 3 bitAnd: 7) + 1))) + signal] + ifFalse: + [self reportPrimitiveFailure]! Item was added: + ----- Method: BochsX64Alien>>handleMovEvGvFailureAt:in:rex: (in category 'error handling') ----- + handleMovEvGvFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a register write into a ProcessorSimulationTrap signal." + | modrmByte getter base offset | + self assert: rexByteOrNil notNil. + modrmByte := memoryArray byteAt: pc + 3. + getter := self registerStateGetters at: ((modrmByte >> 3 bitAnd: 7) + ((rexByteOrNil bitAnd: 4) << 1) + 1). + (modrmByte bitAnd: 16rC7) = 16r5 ifTrue: "ModRegInd & disp32" + [^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 7 + address: (memoryArray unsignedLongAt: pc + 4 bigEndian: false) + type: #write + accessor: getter) + signal]. + (modrmByte bitAnd: 16rC0) = 16r80 ifTrue: "ModRegRegDisp8" + [offset := memoryArray longAt: pc + 4 bigEndian: false. + base := self registerStateGetters at: ((modrmByte bitAnd: 7) + ((rexByteOrNil bitAnd: 1) << 3) + 1). + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 7 + address: (self perform: base) + offset + type: #write + accessor: getter) + signal]. + ^self reportPrimitiveFailure! Item was added: + ----- Method: BochsX64Alien>>handleMovGbEbFailureAt:in:rex: (in category 'error handling') ----- + handleMovGbEbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a byte register load into a ProcessorSimulationTrap signal." + | modrmByte | + self shouldBeImplemented. + ^(((modrmByte := memoryArray byteAt: pc + 2) bitAnd: 16rC0) = 16r80) "ModRegRegDisp32" + ifTrue: + [(ProcessorSimulationTrap + pc: pc + nextpc: pc + 6 + address: ((self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1)) + + (memoryArray unsignedLongAt: pc + 3 bigEndian: false) + bitAnd: 16rFFFFFFFF) + type: #read + accessor: (#(al: cl: dl: bl: ah: ch: dh: bh:) at: ((modrmByte >> 3 bitAnd: 7) + 1))) + signal] + ifFalse: + [self reportPrimitiveFailure]! Item was added: + ----- Method: BochsX64Alien>>handleMovGvEbFailureAt:in:rex: (in category 'error handling') ----- + handleMovGvEbFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a register load into a ProcessorSimulationTrap signal." + | modrmByte mode srcIsSP srcVal dst offset | + self shouldBeImplemented. + modrmByte := memoryArray byteAt: pc + 3. + mode := modrmByte >> 6 bitAnd: 3. + srcIsSP := (modrmByte bitAnd: 7) = 4. + srcVal := self perform: (#(eax ecx edx ebx esp ebp esi edi) at: (modrmByte bitAnd: 7) + 1). + dst := #(eax: ecx: edx: ebx: esp: ebp: esi: edi:) at: ((modrmByte >> 3 bitAnd: 7) + 1). + mode = 1 ifTrue: "ModRegRegDisp8" + [offset := memoryArray byteAt: pc + (srcIsSP ifTrue: [5] ifFalse: [4]). "1-relative" + offset > 127 ifTrue: [offset := offset - 256]. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + (srcIsSP ifTrue: [5] ifFalse: [4]) + address: ((srcVal + offset) bitAnd: 16rFFFFFFFF) + type: #read + accessor: dst) + signal]. + mode = 2 ifTrue: "ModRegRegDisp32" + [offset := memoryArray unsignedLongAt: pc + (srcIsSP ifTrue: [5] ifFalse: [4]). "1-relative" + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + (srcIsSP ifTrue: [8] ifFalse: [7]) + address: ((srcVal + offset) bitAnd: 16rFFFFFFFF) + type: #read + accessor: dst) + signal]. + ^self reportPrimitiveFailure! Item was added: + ----- Method: BochsX64Alien>>handleMovGvEvFailureAt:in:rex: (in category 'error handling') ----- + handleMovGvEvFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a register load into a ProcessorSimulationTrap signal." + | modrmByte getter setter offset | + self assert: rexByteOrNil notNil. + modrmByte := memoryArray byteAt: pc + 3. + setter := self registerStateSetters at: ((modrmByte >> 3 bitAnd: 7) + ((rexByteOrNil bitAnd: 4) << 1) + 1). + (modrmByte bitAnd: 16rC7) = 16r5 ifTrue: "ModRegInd & disp32" + [^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 7 + address: (memoryArray unsignedLongAt: pc + 4 bigEndian: false) + type: #read + accessor: setter) + signal]. + (modrmByte bitAnd: 16rC0) = 16r80 ifTrue: "ModRegRegDisp8" + [offset := memoryArray longAt: pc + 4 bigEndian: false. + getter := self registerStateGetters at: ((modrmByte bitAnd: 7) + ((rexByteOrNil bitAnd: 1) << 3) + 1). + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 7 + address: (self perform: getter) + offset + type: #read + accessor: setter) + signal]. + ^self reportPrimitiveFailure! Item was added: + ----- Method: BochsX64Alien>>handleMovObALFailureAt:in:rex: (in category 'error handling') ----- + handleMovObALFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a write of eax into a ProcessorSimulationTrap signal." + self shouldBeImplemented. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 5 + address: (memoryArray unsignedLongAt: pc + 2 bigEndian: false) + type: #write + accessor: #eax) + signal! Item was added: + ----- Method: BochsX64Alien>>handleRetFailureAt:in:rex: (in category 'error handling') ----- + handleRetFailureAt: pc "<Integer>" in: memoryArray "<Bitmap|ByteArray>" rex: rexByteOrNil "<Integer|nil>" + "Convert an execution primitive failure for a ret into a ProcessorSimulationTrap signal." + self shouldBeImplemented. + ^(ProcessorSimulationTrap + pc: pc + nextpc: pc + 1 + address: (memoryArray unsignedLongAt: self esp + 1) + type: #return + accessor: #eip:) + signal! Item was added: + ----- Method: BochsX64Alien>>postCallArgumentsNumArgs:in: (in category 'execution') ----- + postCallArgumentsNumArgs: numArgs "<Integer>" in: memory "<ByteArray|Bitmap>" + "Answer an argument vector of the requested size after a vanilla + ABI call. On X86 this simply means accessing register arguments. + For compatibility with Cog/Slang we answer unsigned values." + self assert: numArgs <= 4. "Microsoft & System V agree for the first 4 reg args oinly" + ^((CogX64Compiler ABI == #SysV + ifTrue: [#(rdi rsi rdx rcx r8 r9)] + ifFalse: [#(rdi rsi r8 r9)]) copyFrom: 1 to: numArgs) collect: + [:getter| + self perform: getter]! Item was added: + ----- Method: BochsX64Alien>>printRegisterStateExceptPC:on: (in category 'printing') ----- + printRegisterStateExceptPC: registerStateVector on: aStream + self printFields: + ((registerStateVector size < 34 + or: [(19 to: 34) allSatisfy: [:i| (registerStateVector at: i) isZero]]) + ifTrue: + [#( rax rbx rcx rdx cr + rsp rbp rsi rdi cr + r8 r9 r10 r11 cr + r12 r13 r14 r15 cr)] + ifFalse: + [#( rax rbx rcx rdx cr + rsp rbp rsi rdi cr + r8 r9 r10 r11 cr + r12 r13 r14 r15 cr + xmm0low xmm1low cr + xmm2low xmm3low cr + xmm4low xmm5low cr + xmm6low xmm7low cr )]) + inRegisterState: registerStateVector + on: aStream! Item was added: + ----- Method: BochsX64Alien>>registerStateGetters (in category 'accessing-abstract') ----- + registerStateGetters + ^#(rax rcx rdx rbx rsp rbp rsi rdi r8 r9 r10 r11 r12 r13 r14 r15 + rip rflags + xmm0low xmm1low xmm2low xmm3low + xmm4low xmm5low xmm6low xmm7low )! Item was added: + ----- Method: BochsX64Alien>>registerStatePCIndex (in category 'accessing-abstract') ----- + registerStatePCIndex + ^17! Item was changed: ----- Method: BochsX64Alien>>registerStateSetters (in category 'accessing-abstract') ----- registerStateSetters + ^#(rax: rcx: rdx: rbx: rsp: rbp: rsi: rdi: r8: r9: r10: r11: r12: r13: r14: r15: - ^#(rax: rbx: rcx: rdx: rsp: rbp: rsi: rdi: r8: r9: r10: r11: r12: r13: r14: r15: rip: rflags: xmm0low: xmm1low: xmm2low: xmm3low: xmm4low: xmm5low: xmm6low: xmm7low: )! Item was added: + ----- Method: BochsX64Alien>>simulateCallOf:nextpc:memory: (in category 'execution') ----- + simulateCallOf: address nextpc: nextpc memory: aMemory + "Simulate a frame-building call of address. Build a frame since + a) this is used for calls into the run-time which are unlikely to be leaf-calls, and + b) stack alignment needs to be realistic for assert checking for platforms such as Mac OS X" + self pushWord: nextpc in: aMemory. + self pushWord: self rbp in: aMemory. + self rbp: self rsp. + PostBuildStackDelta ~= 0 ifTrue: + [self rsp: self rsp - PostBuildStackDelta]. + self rip: address! Item was added: + ----- Method: CogProcessorAlien class>>defaultIntegerBaseInDebugger (in category 'debugger') ----- + defaultIntegerBaseInDebugger + ^16! Item was removed: - ----- Method: GdbARMAlien class>>defaultIntegerBaseInDebugger (in category 'debugger') ----- - defaultIntegerBaseInDebugger - ^16! Item was added: + ----- Method: ProcessorSimulationTrap class>>defaultIntegerBaseInDebugger (in category 'debugger') ----- + defaultIntegerBaseInDebugger + ^16!

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Compilation of MacOSX 32bit cog spur with Clang LLVM 7.0 / El capitan
by Nicolas Cellier 22 Oct '15

22 Oct '15

As promised, here is the report: 1a) using https://github.com/devernay/xcodelegacy I can compile the 32bit Macosx cog spur from vm cog branch revision 3475 with the legacy MacCarbon VM / gcc 4.2 / Xcode 7.0.1 on El Capitan 1b) the compiled vm pass most tests in Squeak 5.0 trunk only SqueakSSL segfault while executing a primitive, so I disabled this test... 2a) I can compile my own VMMaker branch with same configuration using the LLVM clang 7.0 compiler / legacy MacCarbon repository http://smalltalkhub.com/mc/nice/NiceVMExperiments/main (but i have also a few unpublished changes in the platform c sources) 2b) My own brand also pass most tests - same number of failures/errors (also segfault in SqueakSSL test) So YES, it is possible to compile a slightly modified VM with latest apple clang modulo a few VMMaker/platform source changes. 3a) Upgrading to svn 3478, I can also compile the 32bits cog spur cocoa flavours with ./miosvm -A For some reason (see below the LOGF report) only the CocoaDebug.app is produced by the script. 3b) the Cocoa also pass most tests - with almost same score (+2 failures , -1 failure) but it seems like IntegerTest>testReciprocalModulo failure was not reproducible... So YES, at least with gcc4.2, it is possible to compile the ios/cocoa flavour of latest cog. I can also try to compile the cocoa with my own VMMaker and clang LLVM 7.0, but if it's only CocoaDebug.app there's no point, we want -O2 or -O3, it's where clang might hurt... __________________________ The reference cog config: Image ----- /Users/nicolas/Smalltalk/Squeak/trunk/trunk46-spur.image Squeak4.5 latest update: #15290 Current Change Set: Unnamed1 Image format 6521 (32 bit) Virtual Machine --------------- /Users/nicolas/Smalltalk/Squeak/vm_cog_orig/build.macos32x86/squeak.cog.spur/Fast.app/Contents/MacOS/Squeak Croquet Closure Cog[Spur] VM [CoInterpreterPrimitives VMMaker.oscog-eem.1468] Squeak Cog Spur 5.0.3444 Mac OS X built on Oct 20 2015 17:25:02 UTC Compiler: 4.2.1 (Apple Inc. build 5666) (dot 3) platform sources revision VM: r3444 http://squeakvm.org/svn/squeak/branches/Cog Date: 2015-09-24 21:19:28 +0200 Plugins: r3472 http://squeakvm.org/svn/squeak/trunk/platforms/Cross/plugins CoInterpreter VMMaker.oscog-eem.1468 uuid: 2b6a8fd8-cddf-447d-bee4-11d53d2ef9bc Oct 20 2015 StackToRegisterMappingCogit VMMaker.oscog-eem.1468 uuid: 2b6a8fd8-cddf-447d-bee4-11d53d2ef9bc Oct 20 2015 _____________________ my own VM branch config: Virtual Machine --------------- /Users/nicolas/Smalltalk/Squeak/vm_cog/build.macos32x86/squeak.cog.spur/Fast.app/Contents/MacOS/Squeak Croquet Closure Cog[Spur] VM [CoInterpreterPrimitives VMMaker.oscog-nice.1494] Squeak Cog Spur 5.0.3444 Mac OS X built on Oct 21 2015 20:34:04 UTC Compiler: 4.2.1 Compatible Apple LLVM 7.0.0 (clang-700.0.72) platform sources revision VM: r3444 http://squeakvm.org/svn/squeak/branches/Cog Date: 2015-09-24 21:19:28 +0200 Plugins: r3472 http://squeakvm.org/svn/squeak/trunk/platforms/Cross/plugins CoInterpreter VMMaker.oscog-nice.1494 uuid: fe9853ed-0415-469f-b47b-a2760d270606 Oct 21 2015 StackToRegisterMappingCogit VMMaker.oscog-nice.1494 uuid: fe9853ed-0415-469f-b47b-a2760d270606 Oct 21 2015 __________________________ The CocoaVM config: Virtual Machine --------------- /Users/nicolas/Smalltalk/Squeak/vm_cog_orig/build.macos32x86/squeak.cog.spur/CocoaDebug.app/Contents/MacOS/Squeak Croquet Closure Cog[Spur] VM [CoInterpreterPrimitives VMMaker.oscog-eem.1468] 6 Mac Cocoa Cog 5.8b12 21-Sep-10 >1B0534FA-246C-47C5-AB29-7A76C81CCDCB< platform sources revision VM: r3444 http://squeakvm.org/svn/squeak/branches/Cog Date: 2015-09-24 21:19:28 +0200 Plugins: r3472 http://squeakvm.org/svn/squeak/trunk/platforms/Cross/plugins CoInterpreter VMMaker.oscog-eem.1468 uuid: 2b6a8fd8-cddf-447d-bee4-11d53d2ef9bc Oct 21 2015 StackToRegisterMappingCogit VMMaker.oscog-eem.1468 uuid: 2b6a8fd8-cddf-447d-bee4-11d53d2ef9bc Oct 21 2015 __________________________ Tests results are attached below in png. __________________________ The LOGF telling why CocoaFast.app was not built: cp: CocoaFast.app/Contents/Resources: No such file or directory cp: UnixOSProcessPlugin/build/Release/UnixOSProcessPlugin.bundle: unable to copy extended attributes to CocoaFast.app/Contents/Resources: No such file or directory cp: CocoaFast.app/Contents/Resources/Contents: No such file or directory cp: UnixOSProcessPlugin/build/Release/UnixOSProcessPlugin.bundle/Contents: unable to copy extended attributes to CocoaFast.app/Contents/Resources/Contents: No such file or directory cp: CocoaFast.app/Contents/Resources/Contents/Info.plist: No such file or directory cp: CocoaFast.app/Contents/Resources/Contents/MacOS: No such file or directory cp: UnixOSProcessPlugin/build/Release/UnixOSProcessPlugin.bundle/Contents/MacOS: unable to copy extended attributes to CocoaFast.app/Contents/Resources/Contents/MacOS: No such file or directory cp: CocoaFast.app/Contents/Resources/Contents/MacOS/UnixOSProcessPlugin: No such file or directory __________________________ The crash dump for Squeak SSL ran with assert vm: Segmentation fault Wed Oct 21 22:41:40 2015 /Users/nicolas/Smalltalk/Squeak/vm_cog/build.macos32x86/squeak.cog.spur/Assert.app/Contents/MacOS/Squeak Squeak VM version: 5.0 5.0.3444 Mac OS X built on Oct 21 2015 20:33:43 UTC Compiler: 4.2.1 Compatible Apple LLVM 7.0.0 (clang-700.0.72) [Assert Spur VM] Built from: CoInterpreter VMMaker.oscog-nice.1494 uuid: fe9853ed-0415-469f-b47b-a2760d270606 Oct 21 2015 With: StackToRegisterMappingCogit VMMaker.oscog-nice.1494 uuid: fe9853ed-0415-469f-b47b-a2760d270606 Oct 21 2015 Revision: VM: r3444 http://squeakvm.org/svn/squeak/branches/Cog Date: 2015-09-24 21:19:28 +0200 Plugins: r3472 http://squeakvm.org/svn/squeak/trunk/platforms/Cross/plugins C stack backtrace & registers: eax 0x00000000 ebx 0x0000c02c ecx 0x0000002b edx 0x97d207fe edi 0x0000c02c esi 0x0000c02c ebp 0xbff5d078 esp 0xbff5d060 eip 0x97d2387d (0 libsystem_coretls.dylib 0x97d2387d SelectNewCiphersuite + 143) 1 Squeak 0x000492d6 reportStackState + 166 2 Squeak 0x00049970 sigsegv + 144 3 libsystem_platform.dylib 0x9316b79b _sigtramp + 43 4 ??? 0xffffffff 0x0 + 4294967295 5 libsystem_coretls.dylib 0x97d28b0e SSLAdvanceHandshake + 502 6 libsystem_coretls.dylib 0x97d2964d SSLProcessHandshakeRecordInner + 237 7 libsystem_coretls.dylib 0x97d29f06 SSLProcessHandshakeRecord + 1018 8 libsystem_coretls.dylib 0x97d2e41a tls_handshake_process + 135 9 Security 0x9093278b SSLHandshakeProceed + 174 10 Security 0x909326ca SSLHandshake + 155 11 SqueakSSL 0x01e1fedc sqAcceptSSL + 620 12 SqueakSSL 0x01e20a70 primitiveAccept + 464 13 Squeak 0x000b2c72 primitiveExternalCall + 770 14 Squeak 0x000a1555 interpret + 25365 15 Squeak 0x000a70e5 enterSmalltalkExecutiveImplementation + 245 16 Squeak 0x0009b3dc interpret + 412 17 Squeak 0x0003ec3c EventLoopEventHandler + 28 18 HIToolbox 0x954eb68b _Z22_InvokeEventHandlerUPPP25OpaqueEventHandlerCallRefP14OpaqueEventRefPvPFlS0_S2_S3_E + 36 19 HIToolbox 0x954939a0 _ZL23DispatchEventToHandlersP14EventTargetRecP14OpaqueEventRefP14HandlerCallRec + 1832 20 HIToolbox 0x95492bb4 _ZL30SendEventToEventTargetInternalP14OpaqueEventRefP20OpaqueEventTargetRefP14HandlerCallRec + 402 21 HIToolbox 0x95492a1a SendEventToEventTargetWithOptions + 40 22 HIToolbox 0x954cc212 _ZL29ToolboxEventDispatcherHandlerP25OpaqueEventHandlerCallRefP14OpaqueEventRefPv + 1994 23 HIToolbox 0x95493def _ZL23DispatchEventToHandlersP14EventTargetRecP14OpaqueEventRefP14HandlerCallRec + 2935 24 HIToolbox 0x95492bb4 _ZL30SendEventToEventTargetInternalP14OpaqueEventRefP20OpaqueEventTargetRefP14HandlerCallRec + 402 25 HIToolbox 0x954a5f6d SendEventToEventTarget + 34 26 HIToolbox 0x9564309e ToolboxEventDispatcher + 82 27 HIToolbox 0x95642f5f RunApplicationEventLoop + 240 28 Squeak 0x0003ebfa RunApplicationEventLoopWithSqueak + 186 29 Squeak 0x0004989b main + 1067 30 Squeak 0x00002035 start + 53 Smalltalk stack dump: 0xbff9d3d8 I SqueakSSL>accept:from:to:into: 0x61a4748: a(n) SqueakSSL 0xbff9d418 I SqueakSSL>accept 0x61a4748: a(n) SqueakSSL 0xbff9d430 M [] in SqueakSSLTest>testConnectAccept 0x79d2e38: a(n) SqueakSSLTest 0xbff9d44c M BlockClosure>on:do: 0x61a7718: a(n) BlockClosure 0xbff9d470 M [] in SqueakSSLTest>testConnectAccept 0x79d2e38: a(n) SqueakSSLTest 0xbff9d490 I [] in BlockClosure>newProcess 0x61a7538: a(n) BlockClosure

2 3

Alien on Spur and "el capitan"?
by Esteban Lorenzano 21 Oct '15

21 Oct '15

Hi, Does anyone tested Alien on Spur and "El capitan"? specifically callbacks? For me, a completely broken :( 1) this structure (in maybeInlinePositive32BitIntegerFor: and others): (integerValue >= 0 and: [objectMemory isIntegerValue: integerValue]) ifTrue: [^objectMemory integerObjectOf: integerValue]. Does not works if “integer value” is an unsigned long, because compiler assumes it will always be true, then remove the if, then answers a wrong value. 2) assertCStackWellAligned always fail. No idea why because if does not says anything, just jmp back to the regular flow. 3) finally, ceCaptureCStackPointers also fails… this can be because (2) or because other reasons (it also jmps back so no clue) (method generateCaptureCStackPointers: clarifies is a hack, so I suppose it stopped to work). I guess solution of (1) is easy: argument number just has to be a sqLong instead an unsigned long. But for 2 and 3 I have no idea where to start. Does anyone has an idea? Esteban

7 37

Re: [Patch] FilePlugin for Windows can now delete read-only files
by Max Leske 21 Oct '15

21 Oct '15

> > Hi Max, done, finally. Forgive the delay. No worries :) Thanks.

1 0

VM Maker: VMMaker.oscog-eem.1497.mcz
by commits＠source.squeak.org 21 Oct '15

21 Oct '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1497.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1497 Author: eem Time: 20 October 2015, 4:07:03.853 pm UUID: 0719f4d7-3dd5-4f5c-bc36-07461475c215 Ancestors: VMMaker.oscog-eem.1496 Make sure signed comparisons are used in the relevamt isIntegerValue: implementations. =============== Diff against VMMaker.oscog-eem.1496 =============== Item was changed: ----- Method: ObjectMemory>>isIntegerValue: (in category 'interpreter access') ----- isIntegerValue: intValue "Answer if the given value can be represented as a Smalltalk integer value. In C, use a shift and XOR to set the sign bit if and only if the top two bits of the given value are the same, then test the sign bit. Note that the top two bits are equal for exactly those integers in the range that can be represented in 31-bits or 63-bits." <api> ^self + cCode: [(intValue bitXor: (intValue << 1)) asInteger >= 0] - cCode: [(intValue bitXor: (intValue << 1)) >= 0] inSmalltalk: [intValue >= 16r-40000000 and: [intValue <= 16r3FFFFFFF]]! Item was changed: ----- Method: Spur32BitMemoryManager>>isIntegerValue: (in category 'interpreter access') ----- isIntegerValue: intValue "Answer if the given value can be represented as a Smalltalk integer value. In C, use a shift and XOR to set the sign bit if and only if the top two bits of the given value are the same, then test the sign bit. Note that the top two bits are equal for exactly those integers in the range that can be represented in 31-bits or 63-bits." <api> ^self + cCode: [(intValue bitXor: (intValue << 1)) asInteger >= 0] - cCode: [(intValue bitXor: (intValue << 1)) >= 0] inSmalltalk: [intValue >= 16r-40000000 and: [intValue <= 16r3FFFFFFF]]!

1 0

VM Maker: VMMaker.oscog-eem.1496.mcz
by commits＠source.squeak.org 21 Oct '15

21 Oct '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1496.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1496 Author: eem Time: 20 October 2015, 4:02:56.214 pm UUID: f6c0ecb8-51de-4da5-aa23-5f96baa84178 Ancestors: VMMaker.oscog-rmacnak.1495 One last waafer-thin tweak to bounds checking in the Alien plugins Monsieur Creosote? Use a form immune to integer overflow. Document the design decision. =============== Diff against VMMaker.oscog-rmacnak.1495 =============== Item was changed: ----- Method: IA32ABIPlugin>>index:length:inRange: (in category 'private-support') ----- index: byteIndex length: length inRange: rcvr + "Answer if the indices byteIndex to byteIndex + length - 1 are valid zero-relative indices into the rcvr. + Beware!! There be dragons here. The form below (byteIndex <= (dataSize abs - length)) is used + because byteIndex + length could overflow, whereas (dataSize abs - length) can't. We *don't* use the + obvious optimization + ^dataSize = 0 or: [byteIndex asUnsignedInteger <= (dataSize abs - length)] + because with C's Usual Arithmetic Conversions + 5. Otherwise, both operands are converted to the unsigned integer type corresponding to the type of the operand with signed integer type. + means that the comparison will be unsigned, and if length > dataSize abs then dataSize abs - length is large and positive." - "Answer if the indices byteIndex to byteIndex + length - 1 are valid zero-relative indices into the rcvr." | dataSize | <inline: true> dataSize := self sizeField: rcvr. + ^dataSize = 0 or: [byteIndex >= 0 and: [byteIndex <= (dataSize abs - length)]]! - ^dataSize = 0 or: [byteIndex >= 0 and: [(byteIndex + length) <= dataSize abs]]! Item was changed: ----- Method: NewsqueakIA32ABIPlugin>>index:length:inRange: (in category 'private-support') ----- index: byteIndex length: length inRange: rcvr + "Answer if the indices byteIndex to byteIndex + length - 1 are valid zero-relative indices into the rcvr. + Beware!! There be dragons here. The form below (byteIndex <= (dataSize abs - length)) is used + because byteIndex + length could overflow, whereas (dataSize abs - length) can't. We *don't* use the + obvious optimization + ^dataSize = 0 or: [byteIndex asUnsignedInteger <= (dataSize abs - length)] + because with C's Usual Arithmetic Conversions + 5. Otherwise, both operands are converted to the unsigned integer type corresponding to the type of the operand with signed integer type. + means that the comparison will be unsigned, and if length > dataSize abs then dataSize abs - length is large and positive." - "Answer if the indices byteIndex to byteIndex + length - 1 are valid zero-relative indices into the rcvr." | dataSize | <inline: true> dataSize := self sizeField: rcvr. + ^dataSize = 0 or: [byteIndex >= 0 and: [byteIndex <= (dataSize abs - length)]]! - ^dataSize = 0 or: [byteIndex >= 0 and: [(byteIndex + length) <= dataSize abs]]!

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Re: [Patch] FilePlugin for Windows can now delete read-only files
by Max Leske 21 Oct '15

21 Oct '15

Thanks Marcel. I’ve updated the issue on bugs.squeak.org with your patch. Now it only needs to be integrated… Cheers, Max > > Hi Max, > > thank you! I just verified it for the CogVM #3477 with Windows 10, Cygwin > (32-bit), and GCC 4.9.2. It works. Find attached the patch file. > > Note that there was also another bug. > > sqWin32FilePrims.patch > <http://forum.world.st/file/n4856703/sqWin32FilePrims.patch <http://forum.world.st/file/n4856703/sqWin32FilePrims.patch>> > > Best, > Marcel

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[commit][3478] Apply http://forum.world.st/ Patch-FilePlugin-for-Windows-can-now-delete-read-only-files-td4855947. html#a4856703
by commits＠squeakvm.org 21 Oct '15

21 Oct '15

Revision: 3478 Author: eliot Date: 2015-10-20 15:39:11 -0700 (Tue, 20 Oct 2015) Log Message: ----------- Apply http://forum.world.st/Patch-FilePlugin-for-Windows-can-now-delete-read-only… Modified Paths: -------------- trunk/platforms/win32/plugins/FilePlugin/sqWin32FilePrims.c Modified: trunk/platforms/win32/plugins/FilePlugin/sqWin32FilePrims.c =================================================================== --- trunk/platforms/win32/plugins/FilePlugin/sqWin32FilePrims.c 2015-10-20 00:51:42 UTC (rev 3477) +++ trunk/platforms/win32/plugins/FilePlugin/sqWin32FilePrims.c 2015-10-20 22:39:11 UTC (rev 3478) @@ -17,6 +17,10 @@ * UPDATES: * 1) Support for long path names added by using UNC prefix in that case * (Marcel Taeumel, Hasso Plattner Institute, Postdam, Germany) +* 2) Try to remove the read-only attribute from a file before calling +* DeleteFile. DeleteFile cannot delete read-only files (see comment +* in sqFileDeleteNameSize). +* (Max Leske) * *****************************************************************************/ #include <windows.h> @@ -118,6 +122,20 @@ if(hasCaseSensitiveDuplicate(win32Path)) FAIL(); + + /* DeleteFile will not delete a file with the read-only attribute set + (e.g. -r--r--r--, see https://msdn.microsoft.com/en-us/library/windows/desktop/aa363915(v=vs.85).…). + To ensure that this works the same way as on *nix platforms we need to + remove the read-only attribute (which might fail if the current user + doesn't own the file). + Also note that DeleteFile cannot *effectively* delete a file as long as + there are other processes that hold open handles to that file. The function + will still report success since the file is *marked* for deletion (no new + handles can be opened. See the URL mentioned above for reference). + This will lead to problems during a recursive delete operation since now + the parent directory wont be empty. */ + SetFileAttributesW(win32Path, FILE_ATTRIBUTE_NORMAL); + if(!DeleteFileW(win32Path)) FAIL(); @@ -302,7 +320,7 @@ * sqFileFlush uses FlushFileBuffers which is equivalent to fsync on windows * as long as WriteFile is used directly and no other buffering is done. */ - return sqFileFlush(SQFile *f); + return sqFileFlush(f); } sqInt sqFileTruncate(SQFile *f, squeakFileOffsetType offset) {

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VM background reading "porting squeak"
by Ben Coman 20 Oct '15

20 Oct '15

Just sharing that I found the following chapter from Mark Guzdial's "Squeak: Open Personal Computing and Multimedia" an interesting background read on the VM. Cross posting since some others not on [vm-dev] might similarly find it interesting. http://sdmeta.gforge.inria.fr/FreeBooks/CollectiveNBlueBook/porting-subfina… cheers -ben

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Vm-dev October 2015