Vm-dev February 2017

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VM Maker: VMMaker.oscogSPC-eem.2126.mcz
by commits＠source.squeak.org 26 Feb '17

26 Feb '17

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscogSPC-eem.2126.mcz ==================== Summary ==================== Name: VMMaker.oscogSPC-eem.2126 Author: eem Time: 9 February 2017, 10:01:28.598009 am UUID: 25551143-fc0d-478f-a483-6df83405e90a Ancestors: VMMaker.oscogSPC-eem.2125 Cogit: Refactor fixupAt: & initializeFixupAt: to take bytecode PCs not indexes. Add fixupAtIndex: as the method that takes an index. =============== Diff against VMMaker.oscogSPC-eem.2125 =============== Item was changed: CogClass subclass: #Cogit instanceVariableNames: 'coInterpreter objectMemory objectRepresentation processor threadManager methodZone methodZoneBase codeBase minValidCallAddress lastNInstructions simulatedAddresses simulatedTrampolines simulatedVariableGetters simulatedVariableSetters printRegisters printInstructions compilationTrace clickConfirm breakPC breakBlock singleStep guardPageSize traceFlags traceStores breakMethod methodObj enumeratingCogMethod methodHeader initialPC endPC methodOrBlockNumArgs inBlock needsFrame hasYoungReferent primitiveIndex backEnd literalsManager postCompileHook methodLabel stackCheckLabel blockEntryLabel blockEntryNoContextSwitch blockNoContextSwitchOffset stackOverflowCall sendMiss missOffset entryPointMask checkedEntryAlignment uncheckedEntryAlignment cmEntryOffset entry cmNoCheckEntryOffset noCheckEntry fullBlockEntry cbEntryOffset fullBlockNoContextSwitchEntry cbNoSwitchEntryOffset picMNUAbort picInterpretAbort endCPICCase0 endCPICCase1 firstCPICCaseOffset cPICCaseSize cP ICEndSize closedPICSize openPICSize fixups abstractOpcodes generatorTable byte0 byte1 byte2 byte3 bytecodePC bytecodeSetOffset opcodeIndex numAbstractOpcodes blockStarts blockCount labelCounter cStackAlignment expectedSPAlignment expectedFPAlignment codeModified maxLitIndex ceMethodAbortTrampoline cePICAbortTrampoline ceCheckForInterruptTrampoline ceCPICMissTrampoline ceReturnToInterpreterTrampoline ceBaseFrameReturnTrampoline ceSendMustBeBooleanAddTrueTrampoline ceSendMustBeBooleanAddFalseTrampoline ceCannotResumeTrampoline ceEnterCogCodePopReceiverReg ceCallCogCodePopReceiverReg ceCallCogCodePopReceiverAndClassRegs cePrimReturnEnterCogCode cePrimReturnEnterCogCodeProfiling ceNonLocalReturnTrampoline ceFetchContextInstVarTrampoline ceStoreContextInstVarTrampoline ceEnclosingObjectTrampoline ceFlushICache ceCheckFeaturesFunction ceTraceLinkedSendTrampoline ceTraceBlockActivationTrampoline ceTraceStoreTrampoline ceGetFP ceGetSP ceCaptureCStackPointers ordinarySendTrampolines superSen dTrampolines directedSuperSendTrampolines dynamicSuperSendTrampolines outerSendTrampolines selfSendTrampolines firstSend lastSend realCEEnterCogCodePopReceiverReg realCECallCogCodePopReceiverReg realCECallCogCodePopReceiverAndClassRegs trampolineTableIndex trampolineAddresses objectReferencesInRuntime runtimeObjectRefIndex cFramePointerInUse debugPrimCallStackOffset ceTryLockVMOwner ceUnlockVMOwner extA extB numExtB tempOop numIRCs indexOfIRC theIRCs implicitReceiverSendTrampolines cogMethodSurrogateClass cogBlockMethodSurrogateClass nsSendCacheSurrogateClass CStackPointer CFramePointer cPICPrototype cPICEndOfCodeOffset cPICEndOfCodeLabel maxCPICCases debugBytecodePointers debugOpcodeIndices disassemblingMethod ceMallocTrampoline ceFreeTrampoline ceFFICalloutTrampoline' classVariableNames: 'AltBlockCreationBytecodeSize AltFirstSpecialSelector AltNSSendIsPCAnnotated AltNumSpecialSelectors AnnotationConstantNames AnnotationShift AnnotationsWithBytecodePCs BlockCreationBytecodeSize Debug DisplacementMask DisplacementX2N EagerInstructionDecoration FirstAnnotation FirstSpecialSelector HasBytecodePC IsAbsPCReference IsAnnotationExtension IsDirectedSuperSend IsDisplacementX2N IsNSDynamicSuperSend IsNSImplicitReceiverSend IsNSSelfSend IsNSSendCall IsObjectReference IsRelativeCall IsSendCall IsSuperSend MapEnd MaxCPICCases MaxCompiledPrimitiveIndex MaxStackAllocSize MaxX2NDisplacement NSCClassTagIndex NSCEnclosingObjectIndex NSCNumArgsIndex NSCSelectorIndex NSCTargetIndex NSSendIsPCAnnotated NeedsFixupFlag NumObjRefsInRuntime NumOopsPerNSC NumSpecialSelectors NumTrampolines ProcessorClass RRRName' poolDictionaries: 'CogAbstractRegisters CogCompilationConstants CogMethodConstants CogRTLOpcodes VMBasicConstants VMBytecodeConstants VMObjectIndices VMStackFrameOffsets' category: 'VMMaker-JIT'! Cogit class instanceVariableNames: 'generatorTable primitiveTable'! + !Cogit commentStamp: 'eem 2/9/2017 10:01' prior: 0! - !Cogit commentStamp: 'eem 4/6/2015 15:56' prior: 0! I am the code generator for the Cog VM. My job is to produce machine code versions of methods for faster execution and to manage inline caches for faster send performance. I can be tested in the current image using my class-side in-image compilation facilities. e.g. try StackToRegisterMappingCogit genAndDis: (Integer >> #benchFib) I have concrete subclasses that implement different levels of optimization: SimpleStackBasedCogit is the simplest code generator. StackToRegisterMappingCogit is the current production code generator It defers pushing operands to the stack until necessary and implements a register-based calling convention for low-arity sends. StackToRegisterMappingCogit is an experimental code generator with support for counting conditional branches, intended to support adaptive optimization. coInterpreter <CoInterpreterSimulator> the VM's interpreter with which I cooperate methodZoneManager <CogMethodZoneManager> the manager of the machine code zone objectRepresentation <CogObjectRepresentation> the object used to generate object accesses processor <BochsIA32Alien|?> the simulator that executes the IA32/x86 machine code I generate when simulating execution in Smalltalk simulatedTrampolines <Dictionary of Integer -> MessageSend> the dictionary mapping trap jump addresses to run-time routines used to warp from simulated machine code in to the Smalltalk run-time. simulatedVariableGetters <Dictionary of Integer -> MessageSend> the dictionary mapping trap read addresses to variables in run-time objects used to allow simulated machine code to read variables in the Smalltalk run-time. simulatedVariableSetters <Dictionary of Integer -> MessageSend> the dictionary mapping trap write addresses to variables in run-time objects used to allow simulated machine code to write variables in the Smalltalk run-time. printRegisters printInstructions clickConfirm <Boolean> flags controlling debug printing and code simulation breakPC <Integer> machine code pc breakpoint cFramePointer cStackPointer <Integer> the variables representing the C stack & frame pointers, which must change on FFI callback and return selectorOop <sqInt> the oop of the methodObj being compiled methodObj <sqInt> the bytecode method being compiled initialPC endPC <Integer> the start and end pcs of the methodObj being compiled methodOrBlockNumArgs <Integer> argument count of current method or block being compiled needsFrame <Boolean> whether methodObj or block needs a frame to execute primitiveIndex <Integer> primitive index of current method being compiled methodLabel <CogAbstractOpcode> label for the method header blockEntryLabel <CogAbstractOpcode> label for the start of the block dispatch code stackOverflowCall <CogAbstractOpcode> label for the call of ceStackOverflow in the method prolog sendMissCall <CogAbstractOpcode> label for the call of ceSICMiss in the method prolog entryOffset <Integer> offset of method entry code from start (header) of method entry <CogAbstractOpcode> label for the first instruction of the method entry code noCheckEntryOffset <Integer> offset of the start of a method proper (after the method entry code) from start (header) of method noCheckEntry <CogAbstractOpcode> label for the first instruction of start of a method proper fixups <Array of <AbstractOpcode Label | nil>> + the labels for forward jumps that will be fixed up when reaching the relevant bytecode. fixups has one element per byte in methodObj's bytecode; initialPC maps to fixups[0]. - the labels for forward jumps that will be fixed up when reaching the relevant bytecode. fixup shas one element per byte in methodObj's bytecode abstractOpcodes <Array of <AbstractOpcode>> the code generated when compiling methodObj byte0 byte1 byte2 byte3 <Integer> individual bytes of current bytecode being compiled in methodObj bytecodePointer <Integer> bytecode pc (same as Smalltalk) of the current bytecode being compiled opcodeIndex <Integer> the index of the next free entry in abstractOpcodes (this code is translated into C where OrderedCollection et al do not exist) numAbstractOpcodes <Integer> the number of elements in abstractOpcocdes blockStarts <Array of <BlockStart>> the starts of blocks in the current method blockCount the index into blockStarts as they are being noted, and hence eventually the total number of blocks in the current method labelCounter <Integer> a nicety for numbering labels not needed in the production system but probably not expensive enough to worry about ceStackOverflowTrampoline <Integer> ceSend0ArgsTrampoline <Integer> ceSend1ArgsTrampoline <Integer> ceSend2ArgsTrampoline <Integer> ceSendNArgsTrampoline <Integer> ceSendSuper0ArgsTrampoline <Integer> ceSendSuper1ArgsTrampoline <Integer> ceSendSuper2ArgsTrampoline <Integer> ceSendSuperNArgsTrampoline <Integer> ceSICMissTrampoline <Integer> ceCPICMissTrampoline <Integer> ceStoreCheckTrampoline <Integer> ceReturnToInterpreterTrampoline <Integer> ceBaseFrameReturnTrampoline <Integer> ceSendMustBeBooleanTrampoline <Integer> ceClosureCopyTrampoline <Integer> the various trampolines (system-call-like jumps from machine code to the run-time). See Cogit>>generateTrampolines for the mapping from trampoline to run-time routine and then read the run-time routine for a funcitonal description. ceEnterCogCodePopReceiverReg <Integer> the enilopmart (jump from run-time to machine-code) methodZoneBase <Integer> ! Cogit class instanceVariableNames: 'generatorTable primitiveTable'! Item was changed: ----- Method: Cogit>>compileAbstractInstructionsFrom:through: (in category 'compile abstract instructions') ----- compileAbstractInstructionsFrom: start through: end "Loop over bytecodes, dispatching to the generator for each bytecode, handling fixups in due course." | nextOpcodeIndex descriptor fixup result nExts | <var: #descriptor type: #'BytecodeDescriptor *'> <var: #fixup type: #'BytecodeFixup *'> bytecodePC := start. nExts := result := 0. descriptor := nil. [self maybeHaltIfDebugPC. descriptor := self loadBytesAndGetDescriptor. nextOpcodeIndex := opcodeIndex. result := self perform: descriptor generator. self assertExtsAreConsumed: descriptor. + fixup := self fixupAt: bytecodePC. - fixup := self fixupAt: bytecodePC - initialPC. self patchFixupTargetIfNeeded: fixup nextOpcodeIndex: nextOpcodeIndex. self maybeDumpLiterals: descriptor. bytecodePC := self nextBytecodePCFor: descriptor exts: nExts. result = 0 and: [bytecodePC <= end]] whileTrue: [nExts := descriptor isExtension ifTrue: [nExts + 1] ifFalse: [0]]. self checkEnoughOpcodes. ^result! Item was changed: ----- Method: Cogit>>ensureFixupAt: (in category 'compile abstract instructions') ----- ensureFixupAt: targetPC "Make sure there's a flagged fixup at the target pc in fixups. Initially a fixup's target is just a flag. Later on it is replaced with a proper instruction." <returnTypeC: #'BytecodeFixup *'> | fixup | <var: #fixup type: #'BytecodeFixup *'> + fixup := self fixupAt: targetPC. - fixup := self fixupAt: targetPC - initialPC. fixup notAFixup ifTrue: [fixup becomeFixup]. fixup recordBcpc: bytecodePC. ^fixup! Item was changed: ----- Method: Cogit>>fixupAt: (in category 'compile abstract instructions') ----- + fixupAt: fixupPC + <inline: true> + ^self fixupAtIndex: fixupPC - initialPC! - fixupAt: index - <cmacro: '(index) (&fixups[index])'> - <returnTypeC: #'BytecodeFixup *'> - ^self addressOf: (fixups at: index)! Item was added: + ----- Method: Cogit>>fixupAtIndex: (in category 'compile abstract instructions') ----- + fixupAtIndex: index + "The fixups Array maps to bytecode pcs such that initialPC maps to index 0. + fixupAt: does the conversion." + <cmacro: '(index) (&fixups[index])'> + <returnTypeC: #'BytecodeFixup *'> + ^self addressOf: (fixups at: index)! Item was changed: ----- Method: Cogit>>generateInstructionsAt: (in category 'generate machine code') ----- generateInstructionsAt: eventualAbsoluteAddress "Size pc-dependent instructions and assign eventual addresses to all instructions. Answer the size of the code. Compute forward branches based on virtual address (abstract code starts at 0), assuming that any branches branched over are long. Compute backward branches based on actual address. Reuse the fixups array to record the pc-dependent instructions that need to have their code generation postponed until after the others." | absoluteAddress pcDependentIndex abstractInstruction fixup | <var: #abstractInstruction type: #'AbstractInstruction *'> <var: #fixup type: #'BytecodeFixup *'> absoluteAddress := eventualAbsoluteAddress. pcDependentIndex := 0. 0 to: opcodeIndex - 1 do: [:i| self maybeBreakGeneratingAt: absoluteAddress. abstractInstruction := self abstractInstructionAt: i. abstractInstruction isPCDependent ifTrue: [abstractInstruction sizePCDependentInstructionAt: absoluteAddress. + fixup := self fixupAtIndex: pcDependentIndex. - fixup := self fixupAt: pcDependentIndex. pcDependentIndex := pcDependentIndex + 1. fixup instructionIndex: i. absoluteAddress := absoluteAddress + abstractInstruction machineCodeSize] ifFalse: [absoluteAddress := abstractInstruction concretizeAt: absoluteAddress]]. 0 to: pcDependentIndex - 1 do: [:j| + fixup := self fixupAtIndex: j. - fixup := self fixupAt: j. abstractInstruction := self abstractInstructionAt: fixup instructionIndex. self maybeBreakGeneratingAt: abstractInstruction address. abstractInstruction concretizeAt: abstractInstruction address]. ^absoluteAddress - eventualAbsoluteAddress! Item was changed: ----- Method: Cogit>>initializeFixupAt: (in category 'compile abstract instructions') ----- + initializeFixupAt: targetPC + "Make sure there's a flagged fixup at the targetPC in fixups. - initializeFixupAt: targetIndex - "Make sure there's a flagged fixup at the targetIndex (pc relative to first pc) in fixups. Initially a fixup's target is just a flag. Later on it is replaced with a proper instruction." <returnTypeC: #'BytecodeFixup *'> + (self fixupAt: targetPC) becomeFixup! - (self fixupAt: targetIndex) becomeFixup! Item was changed: ----- Method: Cogit>>scanMethod (in category 'compile abstract instructions') ----- scanMethod "Scan the method (and all embedded blocks) to determine - what the last bytecode is; extra bytes at the end of a method are used to encode things like source pointers or temp names - if the method needs a frame or not - what are the targets of any backward branches. - how many blocks it creates - if it contans an unknown bytecode Answer the block count or on error a negative error code" | latestContinuation nExts descriptor pc numBlocks distance targetPC framelessStackDelta | <var: #descriptor type: #'BytecodeDescriptor *'> needsFrame := false. NewspeakVM ifTrue: [numIRCs := 0]. (primitiveIndex > 0 and: [coInterpreter isQuickPrimitiveIndex: primitiveIndex]) ifTrue: [^0]. pc := latestContinuation := initialPC. numBlocks := framelessStackDelta := nExts := extA := numExtB := extB := 0. [pc <= endPC] whileTrue: [byte0 := (objectMemory fetchByte: pc ofObject: methodObj) + bytecodeSetOffset. descriptor := self generatorAt: byte0. descriptor isExtension ifTrue: [descriptor opcode = Nop ifTrue: "unknown bytecode tag; see Cogit class>>#generatorTableFrom:" [^EncounteredUnknownBytecode]. self loadSubsequentBytesForDescriptor: descriptor at: pc. self perform: descriptor generator]. (descriptor isReturn and: [pc >= latestContinuation]) ifTrue: [endPC := pc]. needsFrame ifFalse: [(descriptor needsFrameFunction isNil or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) ifTrue: [needsFrame := true] ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta]]. descriptor isBranch ifTrue: [distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. targetPC := pc + descriptor numBytes + distance. (self isBackwardBranch: descriptor at: pc exts: nExts in: methodObj) + ifTrue: [self initializeFixupAt: targetPC] - ifTrue: [self initializeFixupAt: targetPC - initialPC] ifFalse: [latestContinuation := latestContinuation max: targetPC]]. descriptor isBlockCreation ifTrue: [numBlocks := numBlocks + 1. distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. targetPC := pc + descriptor numBytes + distance. latestContinuation := latestContinuation max: targetPC]. NewspeakVM ifTrue: [descriptor hasIRC ifTrue: [numIRCs := numIRCs + 1]]. pc := pc + descriptor numBytes. descriptor isExtension ifTrue: [nExts := nExts + 1] ifFalse: [nExts := extA := numExtB := extB := 0]]. ^numBlocks! Item was changed: ----- Method: RegisterAllocatingCogit>>ensureFixupAt: (in category 'bytecode generator support') ----- ensureFixupAt: targetPC "Make sure there's a flagged fixup at the target pc in fixups. Initially a fixup's target is just a flag. Later on it is replaced with a proper instruction. Override to enerate stack merging code if required." | fixup | <var: #fixup type: #'BytecodeFixup *'> + fixup := self fixupAt: targetPC. - fixup := self fixupAt: targetPC - initialPC. fixup needsFixup ifTrue: [fixup mergeSimStack ifNil: [self setMergeSimStackOf: fixup] ifNotNil: [self mergeCurrentSimStackWith: fixup]] ifFalse: [self assert: fixup mergeSimStack isNil. self moveVolatileSimStackEntriesToRegisters. self setMergeSimStackOf: fixup]. ^super ensureFixupAt: targetPC! Item was changed: ----- Method: RegisterAllocatingCogit>>genForwardersInlinedIdenticalOrNotIf: (in category 'bytecode generators') ----- genForwardersInlinedIdenticalOrNotIf: orNot | nextPC branchDescriptor unforwardRcvr argReg targetBytecodePC unforwardArg rcvrReg postBranchPC label fixup | <var: #branchDescriptor type: #'BytecodeDescriptor *'> <var: #label type: #'AbstractInstruction *'> self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. "If an operand is an annotable constant, it may be forwarded, so we need to store it into a register so the forwarder check can jump back to the comparison after unforwarding the constant. However, if one of the operand is an unnanotable constant, does not allocate a register for it (machine code will use operations on constants) and does not generate forwarder checks." unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not. unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not. self allocateEqualsEqualsRegistersArgNeedsReg: unforwardArg rcvrNeedsReg: unforwardRcvr into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ]. "If not followed by a branch, resolve to true or false." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: [^ self genIdenticalNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg orNotIf: orNot]. label := self Label. self genCmpArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. "For now just deny we're in the situation we have yet to implement ;-) + self printSimStack; printSimStack: (self fixupAt: postBranchPC) mergeSimStack" - self printSimStack; printSimStack: (self fixupAt: postBranchPC - initialPC) mergeSimStack" self deny: (self mergeRequiredForJumpTo: targetBytecodePC). self deny: (self mergeRequiredForJumpTo: postBranchPC). "Further since there is a following conditional jump bytecode, define non-merge fixups and leave the cond bytecode to set the mergeness." + (self fixupAt: nextPC) notAFixup - (self fixupAt: nextPC - initialPC) notAFixup ifTrue: "The next instruction is dead. we can skip it." [deadCode := true. self ensureFixupAt: targetBytecodePC. self ensureFixupAt: postBranchPC] ifFalse: [self deny: deadCode]. "push dummy value below" self assert: (unforwardArg or: [unforwardRcvr]). orNot == branchDescriptor isBranchTrue "orNot is true for ~~" ifFalse: "branchDescriptor is branchFalse" [ fixup := (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger ] ifTrue: [ fixup := (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger ]. deadCode ifFalse: [self ssPushConstant: objectMemory trueObject]. "dummy value" "The forwarders checks need to jump back to the comparison (label) if a forwarder is found, else jump forward either to the next forwarder check or to the postBranch or branch target (fixup)." unforwardArg ifTrue: [ unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ] ifFalse: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg ifForwarder: label ifNotForwarder: fixup ] ]. unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg ifForwarder: label ifNotForwarder: fixup ]. "Not reached, execution flow have jumped to fixup" ^0! Item was changed: ----- Method: RegisterAllocatingCogit>>genJumpBackTo: (in category 'bytecode generator support') ----- genJumpBackTo: targetBytecodePC | nothingToFlush label | <var: #label type: #'AbstractInstruction *'> "If there's nothing to flush then the stack state at this point is the same as that after the check for interrups and we can avoid generating the register reload code twice." (nothingToFlush := simStackPtr < 0 or: [self ssTop spilled]) ifTrue: [label := self Label]. + self reconcileRegisterStateForBackwardJoin: (self fixupAt: targetBytecodePC). - self reconcileRegisterStateForBackwardJoin: (self fixupAt: targetBytecodePC - initialPC). self MoveAw: coInterpreter stackLimitAddress R: TempReg. self CmpR: TempReg R: SPReg. "N.B. FLAGS := SPReg - TempReg" + self JumpAboveOrEqual: (self fixupAt: targetBytecodePC). - self JumpAboveOrEqual: (self fixupAt: targetBytecodePC - initialPC). self ssFlushTo: simStackPtr. self CallRT: ceCheckForInterruptTrampoline. self annotateBytecode: self Label. nothingToFlush ifTrue: [self Jump: label] ifFalse: + [self reconcileRegisterStateForBackwardJoin: (self fixupAt: targetBytecodePC). + self Jump: (self fixupAt: targetBytecodePC)]. - [self reconcileRegisterStateForBackwardJoin: (self fixupAt: targetBytecodePC - initialPC). - self Jump: (self fixupAt: targetBytecodePC - initialPC)]. deadCode := true. "can't fall through" ^0! Item was changed: ----- Method: RegisterAllocatingCogit>>genVanillaInlinedIdenticalOrNotIf: (in category 'bytecode generators') ----- genVanillaInlinedIdenticalOrNotIf: orNot | nextPC postBranchPC targetBytecodePC branchDescriptor rcvrReg argReg argIsConstant rcvrIsConstant | <var: #branchDescriptor type: #'BytecodeDescriptor *'> self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. argIsConstant := self ssTop type = SSConstant. "They can't be both constants to use correct machine opcodes. However annotable constants can't be resolved statically, hence we need to careful." rcvrIsConstant := argIsConstant not and: [(self ssValue: 1) type = SSConstant]. self allocateEqualsEqualsRegistersArgNeedsReg: argIsConstant not rcvrNeedsReg: rcvrIsConstant not into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ]. "If not followed by a branch, resolve to true or false." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: [^ self genIdenticalNoBranchArgIsConstant: argIsConstant rcvrIsConstant: rcvrIsConstant argReg: argReg rcvrReg: rcvrReg orNotIf: orNot]. self genCmpArgIsConstant: argIsConstant rcvrIsConstant: rcvrIsConstant argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. "For now just deny we're in the situation we have yet to implement ;-)" self deny: (self mergeRequiredForJumpTo: targetBytecodePC). self deny: (self mergeRequiredForJumpTo: postBranchPC). "Further since there is a following conditional jump bytecode, define non-merge fixups and leave the cond bytecode to set the mergeness." + (self fixupAt: nextPC) notAFixup - (self fixupAt: nextPC - initialPC) notAFixup ifTrue: "The next instruction is dead. we can skip it." [deadCode := true. self ensureFixupAt: targetBytecodePC. self ensureFixupAt: postBranchPC] ifFalse: [self deny: deadCode]. "push dummy value below" self genConditionalBranch: (orNot == branchDescriptor isBranchTrue ifTrue: [JumpNonZero] ifFalse: [JumpZero]) operand: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. "If the branch is dead, then we can just fall through postBranchPC (only a nop in-between), else we need to jump over the code of the branch" deadCode ifFalse: [self Jump: (self ensureNonMergeFixupAt: postBranchPC). self ssPushConstant: objectMemory trueObject]. "dummy value" ^0! Item was changed: ----- Method: RegisterAllocatingCogit>>mergeRequiredForJumpTo: (in category 'bytecode generator support') ----- mergeRequiredForJumpTo: targetPC "While this is a multi-pass compiler, no intermediate control-flow graph is built from bytecode and there is a monotonically increasing one-to-one relationship between bytecode pcs and machine code pcs that map to one another. Therefore, when jumping forward, any required code to merge the state of the current simStack with that at the target must be generated before the jump (because at the target the simStack state will be whatever falls through). If only one forward jump to the target exists then that jump can simply install its simStack as the required simStack at the target and the merge code wil be generated just before the target as control falls through. But if there are two or more forward jumps to the target, a situation that occurs given that the StackToRegisterMappingCogit follows jump chains, then jumps other than the first must generate merge code before jumping. This poses a problem for conditional branches. The merge code must only be generated along the path that takes the jump Therefore this must *not* be generated: ... merge code ... jump cond Ltarget which incorrectly executes the merge code along both the taken and untaken paths. Instead this must be generated so that the merge code is only executed if the branch is taken. jump not cond Lcontinue ... merge code ... jump Ltarget Lcontinue: Note that no merge code is required for code such as self at: (expr ifTrue: [1] ifFalse: [2]) 17 <70> self 18 <71> pushConstant: true 19 <99> jumpFalse: 22 20 <76> pushConstant: 1 21 <90> jumpTo: 23 22 <77> pushConstant: 2 23 <C0> send: at: provided that 1 and 2 are assigned to the same target register." self flag: 'be lazy for now; this needs more work to ignore compatible sim stacks'. + ^(self fixupAt: targetPC) hasMergeSimStack! - ^(self fixupAt: targetPC - initialPC) hasMergeSimStack! Item was changed: ----- Method: SimpleStackBasedCogit>>genJumpBackTo: (in category 'bytecode generator support') ----- genJumpBackTo: targetBytecodePC self MoveAw: coInterpreter stackLimitAddress R: TempReg. self CmpR: TempReg R: SPReg. "N.B. FLAGS := SPReg - TempReg" + self JumpAboveOrEqual: (self fixupAt: targetBytecodePC). - self JumpAboveOrEqual: (self fixupAt: targetBytecodePC - initialPC). self CallRT: ceCheckForInterruptTrampoline. self annotateBytecode: self Label. + self Jump: (self fixupAt: targetBytecodePC). - self Jump: (self fixupAt: targetBytecodePC - initialPC). ^0! Item was changed: ----- Method: SistaCogit>>genBinaryInlineComparison:opFalse:destReg: (in category 'inline primitive generators') ----- genBinaryInlineComparison: opTrue opFalse: opFalse destReg: destReg "Inlined comparison. opTrue = jump for true and opFalse = jump for false" <var: #branchDescriptor type: #'BytecodeDescriptor *'> | nextPC branchDescriptor targetBytecodePC postBranchPC | self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifTrue: "This is the path where the inlined comparison is followed immediately by a branch" + [ (self fixupAt: nextPC) notAFixup - [ (self fixupAt: nextPC - initialPC) notAFixup ifTrue: "The next instruction is dead. we can skip it." [deadCode := true. self ensureFixupAt: targetBytecodePC. self ensureFixupAt: postBranchPC ] ifFalse: [self ssPushConstant: objectMemory trueObject]. "dummy value" self genConditionalBranch: (branchDescriptor isBranchTrue ifTrue: [opTrue] ifFalse: [opFalse]) operand: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. "We can only elide the jump if the pc after nextPC is the same as postBranchPC. Branch following means it may not be." self nextDescriptorExtensionsAndNextPCInto: [:iguana1 :iguana2 :iguana3 :followingPC| nextPC := followingPC]. (deadCode and: [nextPC = postBranchPC]) ifFalse: [ self Jump: (self ensureNonMergeFixupAt: postBranchPC) ] ] ifFalse: "This is the path where the inlined comparison is *not* followed immediately by a branch" [| condJump jump | condJump := self genConditionalBranch: opTrue operand: 0. self genMoveFalseR: destReg. jump := self Jump: 0. condJump jmpTarget: (self genMoveTrueR: destReg). jump jmpTarget: self Label]. ^ 0! Item was changed: ----- Method: SistaCogit>>genForwardersInlinedIdenticalOrNotIf: (in category 'bytecode generators') ----- genForwardersInlinedIdenticalOrNotIf: orNot "Override to count inlined branches if followed by a conditional branch. We borrow the following conditional branch's counter and when about to inline the comparison we decrement the counter (without writing it back) and if it trips simply abort the inlining, falling back to the normal send which will then continue to the conditional branch which will trip and enter the abort." | nextPC postBranchPC targetBytecodePC branchDescriptor counterReg fixup jumpEqual jumpNotEqual counterAddress countTripped unforwardArg unforwardRcvr argReg rcvrReg regMask | <var: #fixup type: #'BytecodeFixup *'> <var: #countTripped type: #'AbstractInstruction *'> <var: #label type: #'AbstractInstruction *'> <var: #branchDescriptor type: #'BytecodeDescriptor *'> <var: #jumpEqual type: #'AbstractInstruction *'> <var: #jumpNotEqual type: #'AbstractInstruction *'> ((coInterpreter isOptimizedMethod: methodObj) or: [needsFrame not]) ifTrue: [^super genForwardersInlinedIdenticalOrNotIf: orNot]. regMask := 0. self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not. unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not. "If an operand is an annotable constant, it may be forwarded, so we need to store it into a register so the forwarder check can jump back to the comparison after unforwarding the constant. However, if one of the operand is an unnanotable constant, does not allocate a register for it (machine code will use operations on constants)." rcvrReg:= argReg := NoReg. self allocateEqualsEqualsRegistersArgNeedsReg: unforwardArg rcvrNeedsReg: unforwardRcvr into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ]. argReg ~= NoReg ifTrue: [ regMask := self registerMaskFor: argReg ]. rcvrReg ~= NoReg ifTrue: [ regMask := regMask bitOr: (self registerMaskFor: rcvrReg) ]. "Only interested in inlining if followed by a conditional branch." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: [^ self genIdenticalNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg orNotIf: orNot]. "If branching the stack must be flushed for the merge" self ssFlushTo: simStackPtr - 2. unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg ]. unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg ]. counterReg := self allocateRegNotConflictingWith: regMask. self genExecutionCountLogicInto: [ :cAddress :countTripBranch | counterAddress := cAddress. countTripped := countTripBranch ] counterReg: counterReg. self assert: (unforwardArg or: [ unforwardRcvr ]). self genCmpArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. orNot == branchDescriptor isBranchTrue "orNot is true for ~~" ifFalse: [ fixup := (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger ] ifTrue: [ fixup := (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger ]. self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress. self Jump: fixup. countTripped jmpTarget: self Label. "inlined version of #== ignoring the branchDescriptor if the counter trips to have normal state for the optimizer" self ssPop: -2. self genCmpArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. "This code necessarily directly falls through the jumpIf: code which pops the top of the stack into TempReg. We therefore directly assign the result to TempReg to save one move instruction" jumpEqual := orNot ifFalse: [self JumpZero: 0] ifTrue: [self JumpNonZero: 0]. self genMoveFalseR: TempReg. jumpNotEqual := self Jump: 0. jumpEqual jmpTarget: (self genMoveTrueR: TempReg). jumpNotEqual jmpTarget: self Label. self ssPushRegister: TempReg. + (self fixupAt: nextPC) notAFixup ifTrue: [ branchReachedOnlyForCounterTrip := true ]. - (self fixupAt: nextPC - initialPC) notAFixup ifTrue: [ branchReachedOnlyForCounterTrip := true ]. ^ 0! Item was changed: ----- Method: SistaCogitClone>>genBinaryInlineComparison:opFalse:destReg: (in category 'inline primitive generators') ----- genBinaryInlineComparison: opTrue opFalse: opFalse destReg: destReg "Inlined comparison. opTrue = jump for true and opFalse = jump for false" <var: #branchDescriptor type: #'BytecodeDescriptor *'> | nextPC branchDescriptor targetBytecodePC postBranchPC | self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifTrue: "This is the path where the inlined comparison is followed immediately by a branch" + [ (self fixupAt: nextPC) notAFixup - [ (self fixupAt: nextPC - initialPC) notAFixup ifTrue: "The next instruction is dead. we can skip it." [deadCode := true. self ensureFixupAt: targetBytecodePC. self ensureFixupAt: postBranchPC ] ifFalse: [self ssPushConstant: objectMemory trueObject]. "dummy value" self genConditionalBranch: (branchDescriptor isBranchTrue ifTrue: [opTrue] ifFalse: [opFalse]) operand: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. deadCode ifFalse: [ self Jump: (self ensureNonMergeFixupAt: postBranchPC) ] ] ifFalse: "This is the path where the inlined comparison is *not* followed immediately by a branch" [| condJump jump | condJump := self genConditionalBranch: opTrue operand: 0. self genMoveFalseR: destReg. jump := self Jump: 0. condJump jmpTarget: (self genMoveTrueR: destReg). jump jmpTarget: self Label]. ^ 0! Item was changed: ----- Method: SistaRegisterAllocatingCogit>>genForwardersInlinedIdenticalOrNotIf: (in category 'bytecode generators') ----- genForwardersInlinedIdenticalOrNotIf: orNot "Override to count inlined branches if followed by a conditional branch. We borrow the following conditional branch's counter and when about to inline the comparison we decrement the counter (without writing it back) and if it trips simply abort the inlining, falling back to the normal send which will then continue to the conditional branch which will trip and enter the abort." | nextPC postBranchPC targetBytecodePC branchDescriptor counterReg fixup jumpEqual jumpNotEqual counterAddress countTripped unforwardArg unforwardRcvr argReg rcvrReg regMask | <var: #fixup type: #'BytecodeFixup *'> <var: #countTripped type: #'AbstractInstruction *'> <var: #label type: #'AbstractInstruction *'> <var: #branchDescriptor type: #'BytecodeDescriptor *'> <var: #jumpEqual type: #'AbstractInstruction *'> <var: #jumpNotEqual type: #'AbstractInstruction *'> ((coInterpreter isOptimizedMethod: methodObj) or: [needsFrame not]) ifTrue: [^super genForwardersInlinedIdenticalOrNotIf: orNot]. regMask := 0. self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not. unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not. "If an operand is an annotable constant, it may be forwarded, so we need to store it into a register so the forwarder check can jump back to the comparison after unforwarding the constant. However, if one of the operand is an unnanotable constant, does not allocate a register for it (machine code will use operations on constants)." rcvrReg:= argReg := NoReg. self allocateEqualsEqualsRegistersArgNeedsReg: unforwardArg rcvrNeedsReg: unforwardRcvr into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ]. argReg ~= NoReg ifTrue: [ regMask := self registerMaskFor: argReg ]. rcvrReg ~= NoReg ifTrue: [ regMask := regMask bitOr: (self registerMaskFor: rcvrReg) ]. "Only interested in inlining if followed by a conditional branch." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: [^ self genIdenticalNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg orNotIf: orNot]. unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg ]. unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg ]. counterReg := self allocateRegNotConflictingWith: regMask. self genExecutionCountLogicInto: [ :cAddress :countTripBranch | counterAddress := cAddress. countTripped := countTripBranch ] counterReg: counterReg. self assert: (unforwardArg or: [ unforwardRcvr ]). self genCmpArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. orNot == branchDescriptor isBranchTrue "orNot is true for ~~" ifFalse: [ fixup := (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger ] ifTrue: [ fixup := (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger ]. self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress. self Jump: fixup. countTripped jmpTarget: self Label. "inlined version of #== ignoring the branchDescriptor if the counter trips to have normal state for the optimizer" self ssPop: -2. self genCmpArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. "This code necessarily directly falls through the jumpIf: code which pops the top of the stack into TempReg. We therefore directly assign the result to TempReg to save one move instruction" jumpEqual := orNot ifFalse: [self JumpZero: 0] ifTrue: [self JumpNonZero: 0]. self genMoveFalseR: TempReg. jumpNotEqual := self Jump: 0. jumpEqual jmpTarget: (self genMoveTrueR: TempReg). jumpNotEqual jmpTarget: self Label. self ssPushRegister: TempReg. + (self fixupAt: nextPC) notAFixup ifTrue: [ branchReachedOnlyForCounterTrip := true ]. - (self fixupAt: nextPC - initialPC) notAFixup ifTrue: [ branchReachedOnlyForCounterTrip := true ]. ^ 0! Item was changed: ----- Method: StackToRegisterMappingCogit>>compileAbstractInstructionsFrom:through: (in category 'compile abstract instructions') ----- compileAbstractInstructionsFrom: start through: end "Loop over bytecodes, dispatching to the generator for each bytecode, handling fixups in due course." | nextOpcodeIndex descriptor nExts fixup result | <var: #descriptor type: #'BytecodeDescriptor *'> <var: #fixup type: #'BytecodeFixup *'> self traceSimStack. bytecodePC := start. nExts := result := 0. descriptor := nil. deadCode := false. [self maybeHaltIfDebugPC. + fixup := self fixupAt: bytecodePC. - fixup := self fixupAt: bytecodePC - initialPC. self mergeWithFixupIfRequired: fixup. self assertCorrectSimStackPtr. descriptor := self loadBytesAndGetDescriptor. nextOpcodeIndex := opcodeIndex. result := deadCode ifTrue: [self mapDeadDescriptorIfNeeded: descriptor] ifFalse: [self perform: descriptor generator]. self assertExtsAreConsumed: descriptor. self traceDescriptor: descriptor; traceSimStack. self patchFixupTargetIfNeeded: fixup nextOpcodeIndex: nextOpcodeIndex. self maybeDumpLiterals: descriptor. bytecodePC := self nextBytecodePCFor: descriptor exts: nExts. result = 0 and: [bytecodePC <= end]] whileTrue: [nExts := descriptor isExtension ifTrue: [nExts + 1] ifFalse: [0]]. self checkEnoughOpcodes. ^result! Item was changed: ----- Method: StackToRegisterMappingCogit>>ensureFixupAt: (in category 'compile abstract instructions') ----- ensureFixupAt: targetPC "Make sure there's a flagged fixup at the target pc in fixups. Initially a fixup's target is just a flag. Later on it is replaced with a proper instruction." <returnTypeC: #'BytecodeFixup *'> | fixup | <var: #fixup type: #'BytecodeFixup *'> + fixup := self fixupAt: targetPC. - fixup := self fixupAt: targetPC - initialPC. self traceFixup: fixup. self cCode: '' inSmalltalk: [self assert: simStackPtr = (self debugStackPointerFor: targetPC). (fixup isMergeFixupOrIsFixedUp and: [fixup isBackwardBranchFixup not]) ifTrue: "ignore backward branch targets" [self assert: fixup simStackPtr = simStackPtr]]. fixup isNonMergeFixupOrNotAFixup ifTrue: "convert a non-merge into a merge" [fixup becomeMergeFixup. fixup simStackPtr: simStackPtr. LowcodeVM ifTrue: [ fixup simNativeStackPtr: simNativeStackPtr. fixup simNativeStackSize: simNativeStackSize]] ifFalse: [fixup isBackwardBranchFixup ifTrue: "this is the target of a backward branch and so doesn't have a simStackPtr assigned yet." [fixup simStackPtr: simStackPtr. LowcodeVM ifTrue: [fixup simNativeStackPtr: simNativeStackPtr. fixup simNativeStackSize: simNativeStackSize]] ifFalse: [self assert: fixup simStackPtr = simStackPtr. LowcodeVM ifTrue: [self assert: fixup simNativeStackPtr = simNativeStackPtr. self assert: fixup simNativeStackSize = simNativeStackSize]]]. fixup recordBcpc: bytecodePC. ^fixup! Item was changed: ----- Method: StackToRegisterMappingCogit>>ensureNonMergeFixupAt: (in category 'compile abstract instructions') ----- ensureNonMergeFixupAt: targetPC "Make sure there's a flagged fixup at the target pc in fixups. Initially a fixup's target is just a flag. Later on it is replaced with a proper instruction." <returnTypeC: #'BytecodeFixup *'> | fixup | <var: #fixup type: #'BytecodeFixup *'> + fixup := self fixupAt: targetPC. - fixup := self fixupAt: targetPC - initialPC. fixup notAFixup ifTrue: [fixup becomeNonMergeFixup]. self cCode: '' inSmalltalk: [fixup isMergeFixupOrIsFixedUp ifTrue: [self assert: (fixup isBackwardBranchFixup or: [fixup simStackPtr = (self debugStackPointerFor: targetPC)])]]. fixup recordBcpc: bytecodePC. ^fixup! Item was changed: ----- Method: StackToRegisterMappingCogit>>eventualTargetOf: (in category 'peephole optimizations') ----- eventualTargetOf: targetBytecodePC "Attempt to follow a branch to a pc. Handle branches to unconditional jumps and branches to push: aBoolean; conditional branch pairs. If the branch cannot be followed answer targetBytecodePC." | currentTarget nextPC nExts descriptor span cond | <var: #descriptor type: #'BytecodeDescriptor *'> nextPC := currentTarget := targetBytecodePC. [ nExts := 0. [descriptor := self generatorAt: bytecodeSetOffset + (objectMemory fetchByte: nextPC ofObject: methodObj). descriptor isReturn ifTrue: [^currentTarget]. "avoid stepping off the end of methods" descriptor isExtension] whileTrue: [nExts := nExts + 1. nextPC := nextPC + descriptor numBytes]. descriptor isUnconditionalBranch ifTrue: [span := self spanFor: descriptor at: nextPC exts: nExts in: methodObj. span < 0 ifTrue: "Do *not* follow backward branches; these are interrupt points and should not be elided." [^currentTarget]. nextPC := nextPC + descriptor numBytes + span] ifFalse: [descriptor generator == #genPushConstantTrueBytecode ifTrue: [ cond := true ] + ifFalse: [ descriptor generator == #genPushConstantFalseBytecode ifTrue: [ cond := false ] + ifFalse: [ ^currentTarget ] ]. - ifFalse: [ descriptor generator == #genPushConstantFalseBytecode ifTrue: [ cond := false ] ifFalse: [ ^currentTarget ] ]. "Don't step into loops across a pushTrue; jump:if: boundary, so as not to confuse stack depth fixup." + (self fixupAt: nextPC) isBackwardBranchFixup ifTrue: - (fixups at: nextPC - initialPC) isBackwardBranchFixup ifTrue: [^currentTarget]. nextPC := self eventualTargetOf: nextPC + descriptor numBytes. nExts := 0. [descriptor := self generatorAt: bytecodeSetOffset + (objectMemory fetchByte: nextPC ofObject: methodObj). descriptor isReturn ifTrue: [^currentTarget]. "avoid stepping off the end of methods" descriptor isExtension] whileTrue: [nExts := nExts + 1. nextPC := nextPC + descriptor numBytes]. descriptor isBranch ifFalse: [^currentTarget]. descriptor isUnconditionalBranch ifTrue: [^currentTarget]. nextPC := cond == descriptor isBranchTrue ifTrue: [nextPC + descriptor numBytes + (self spanFor: descriptor at: nextPC exts: nExts in: methodObj)] ifFalse: [nextPC + descriptor numBytes]]. currentTarget := nextPC] repeat! Item was removed: - ----- Method: StackToRegisterMappingCogit>>fixupAt: (in category 'compile abstract instructions') ----- - fixupAt: index - <cmacro: '(index) (&fixups[index])'> - <returnTypeC: #'BytecodeFixup *'> - ((debugFixupBreaks includes: index) - and: [breakMethod isNil or: [methodObj = breakMethod]]) ifTrue: - [self halt]. - ^self addressOf: (fixups at: index)! Item was added: + ----- Method: StackToRegisterMappingCogit>>fixupAtIndex: (in category 'compile abstract instructions') ----- + fixupAtIndex: index + "The fixups Array maps to bytecode pcs such that initialPC maps to index 0. + fixupAt: does the conversion. Override to add breakpointing for fixups of bytecode PCs." + <cmacro: '(index) (&fixups[index])'> + <returnTypeC: #'BytecodeFixup *'> + ((debugFixupBreaks includes: index + initialPC) + and: [breakMethod isNil or: [methodObj = breakMethod]]) ifTrue: + [self halt]. + ^self addressOf: (fixups at: index)! Item was changed: ----- Method: StackToRegisterMappingCogit>>genForwardersInlinedIdenticalOrNotIf: (in category 'bytecode generators') ----- genForwardersInlinedIdenticalOrNotIf: orNot | nextPC branchDescriptor unforwardRcvr argReg targetBytecodePC unforwardArg rcvrReg postBranchPC label fixup | <var: #branchDescriptor type: #'BytecodeDescriptor *'> <var: #label type: #'AbstractInstruction *'> self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. "If an operand is an annotable constant, it may be forwarded, so we need to store it into a register so the forwarder check can jump back to the comparison after unforwarding the constant. However, if one of the operand is an unnanotable constant, does not allocate a register for it (machine code will use operations on constants) and does not generate forwarder checks." unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not. unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not. self allocateEqualsEqualsRegistersArgNeedsReg: unforwardArg rcvrNeedsReg: unforwardRcvr into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ]. "If not followed by a branch, resolve to true or false." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: [^ self genIdenticalNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg orNotIf: orNot]. "If branching the stack must be flushed for the merge" self ssFlushTo: simStackPtr - 2. label := self Label. self genCmpArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. "Further since there is a following conditional jump bytecode, define non-merge fixups and leave the cond bytecode to set the mergeness." + (self fixupAt: nextPC) notAFixup - (self fixupAt: nextPC - initialPC) notAFixup ifTrue: "The next instruction is dead. we can skip it." [deadCode := true. self ensureFixupAt: targetBytecodePC. self ensureFixupAt: postBranchPC] ifFalse: [self deny: deadCode]. "push dummy value below" self assert: (unforwardArg or: [unforwardRcvr]). orNot == branchDescriptor isBranchTrue "orNot is true for ~~" ifFalse: [ fixup := (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger ] ifTrue: [ fixup := (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. self JumpZero: (self ensureNonMergeFixupAt: postBranchPC) asUnsignedInteger ]. deadCode ifFalse: [self ssPushConstant: objectMemory trueObject]. "dummy value" "The forwarders checks need to jump back to the comparison (label) if a forwarder is found, else jump forward either to the next forwarder check or to the postBranch or branch target (fixup)." unforwardArg ifTrue: [ unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ] ifFalse: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg ifForwarder: label ifNotForwarder: fixup ] ]. unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg ifForwarder: label ifNotForwarder: fixup ]. "Not reached, execution flow have jumped to fixup" ^0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genVanillaInlinedIdenticalOrNotIf: (in category 'bytecode generators') ----- genVanillaInlinedIdenticalOrNotIf: orNot | nextPC postBranchPC targetBytecodePC branchDescriptor rcvrReg argReg argIsConstant rcvrIsConstant | <var: #branchDescriptor type: #'BytecodeDescriptor *'> self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. argIsConstant := self ssTop type = SSConstant. "They can't be both constants to use correct machine opcodes. However annotable constants can't be resolved statically, hence we need to careful." rcvrIsConstant := argIsConstant not and: [(self ssValue: 1) type = SSConstant]. self allocateEqualsEqualsRegistersArgNeedsReg: argIsConstant not rcvrNeedsReg: rcvrIsConstant not into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ]. "If not followed by a branch, resolve to true or false." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: [^ self genIdenticalNoBranchArgIsConstant: argIsConstant rcvrIsConstant: rcvrIsConstant argReg: argReg rcvrReg: rcvrReg orNotIf: orNot]. "If branching the stack must be flushed for the merge" self ssFlushTo: simStackPtr - 2. self genCmpArgIsConstant: argIsConstant rcvrIsConstant: rcvrIsConstant argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. "Further since there is a following conditional jump bytecode, define non-merge fixups and leave the cond bytecode to set the mergeness." + (self fixupAt: nextPC) notAFixup - (self fixupAt: nextPC - initialPC) notAFixup ifTrue: "The next instruction is dead. we can skip it." [deadCode := true. self ensureFixupAt: targetBytecodePC. self ensureFixupAt: postBranchPC] ifFalse: [self deny: deadCode]. "push dummy value below" self genConditionalBranch: (orNot == branchDescriptor isBranchTrue ifTrue: [JumpNonZero] ifFalse: [JumpZero]) operand: (self ensureNonMergeFixupAt: targetBytecodePC) asUnsignedInteger. "If the branch is dead, then we can just fall through postBranchPC (only a nop in-between), else we need to jump over the code of the branch" deadCode ifFalse: [self Jump: (self ensureNonMergeFixupAt: postBranchPC). self ssPushConstant: objectMemory trueObject]. "dummy value" ^0! Item was changed: ----- Method: StackToRegisterMappingCogit>>generateInstructionsAt: (in category 'generate machine code') ----- generateInstructionsAt: eventualAbsoluteAddress "Size pc-dependent instructions and assign eventual addresses to all instructions. Answer the size of the code. Compute forward branches based on virtual address (abstract code starts at 0), assuming that any branches branched over are long. Compute backward branches based on actual address. Reuse the fixups array to record the pc-dependent instructions that need to have their code generation postponed until after the others. Override to andd handling for null branches (branches to the immediately following instruction) occasioned by StackToRegisterMapping's following of jumps." | absoluteAddress pcDependentIndex abstractInstruction fixup | <var: #abstractInstruction type: #'AbstractInstruction *'> <var: #fixup type: #'BytecodeFixup *'> absoluteAddress := eventualAbsoluteAddress. pcDependentIndex := 0. 0 to: opcodeIndex - 1 do: [:i| self maybeBreakGeneratingAt: absoluteAddress. abstractInstruction := self abstractInstructionAt: i. abstractInstruction isPCDependent ifTrue: [abstractInstruction sizePCDependentInstructionAt: absoluteAddress. (abstractInstruction isJump and: [i + 1 < opcodeIndex and: [abstractInstruction getJmpTarget == (self abstractInstructionAt: i + 1)]]) ifTrue: [abstractInstruction opcode: Nop; concretizeAt: absoluteAddress] ifFalse: + [fixup := self fixupAtIndex: pcDependentIndex. - [fixup := self fixupAt: pcDependentIndex. pcDependentIndex := pcDependentIndex + 1. fixup instructionIndex: i]. absoluteAddress := absoluteAddress + abstractInstruction machineCodeSize] ifFalse: [absoluteAddress := abstractInstruction concretizeAt: absoluteAddress]]. 0 to: pcDependentIndex - 1 do: [:j| + fixup := self fixupAtIndex: j. - fixup := self fixupAt: j. abstractInstruction := self abstractInstructionAt: fixup instructionIndex. self maybeBreakGeneratingAt: abstractInstruction address. abstractInstruction concretizeAt: abstractInstruction address]. ^absoluteAddress - eventualAbsoluteAddress! Item was changed: ----- Method: StackToRegisterMappingCogit>>initializeFixupAt: (in category 'compile abstract instructions') ----- + initializeFixupAt: targetPC + "Make sure there's a flagged fixup at the targetPC in fixups. - initializeFixupAt: targetIndex - "Make sure there's a flagged fixup at the targetIndex (pc relative to first pc) in fixups. These are the targets of backward branches. A backward branch fixup's simStackPtr + needs to be set when generating the code for the bytecode at the targetPC. - needs to be set when generating the code for the bytecode at the targetIndex. Initially a fixup's target is just a flag. Later on it is replaced with a proper instruction." <returnTypeC: #'BytecodeFixup *'> | fixup | <var: #fixup type: #'BytecodeFixup *'> + fixup := self fixupAt: targetPC. - fixup := self fixupAt: targetIndex. fixup becomeMergeFixup; setIsBackwardBranchFixup. ^fixup! Item was changed: ----- Method: StackToRegisterMappingCogit>>reinitializeFixupsFrom:through: (in category 'compile abstract instructions') ----- reinitializeFixupsFrom: start through: end "When a block must be recompiled due to overestimating the numInitialNils fixups must be restored, which means rescannning since backward branches need their targets initialized." | descriptor nExts pc distance targetPC | <var: #descriptor type: #'BytecodeDescriptor *'> pc := start. nExts := 0. [pc <= end] whileTrue: + [(self fixupAt: pc) reinitialize. - [(self fixupAt: pc - initialPC) reinitialize. byte0 := (objectMemory fetchByte: pc ofObject: methodObj) + bytecodeSetOffset. descriptor := self generatorAt: byte0. (descriptor isBranch and: [self isBackwardBranch: descriptor at: pc exts: nExts in: methodObj]) ifTrue: [distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. targetPC := pc + descriptor numBytes + distance. + self initializeFixupAt: targetPC]. - self initializeFixupAt: targetPC - initialPC]. descriptor isBlockCreation ifTrue: [distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. pc := pc + descriptor numBytes + distance] ifFalse: [pc := pc + descriptor numBytes]. nExts := descriptor isExtension ifTrue: [nExts + 1] ifFalse: [0]]! Item was changed: ----- Method: StackToRegisterMappingCogit>>scanMethod (in category 'compile abstract instructions') ----- scanMethod "Scan the method (and all embedded blocks) to determine - what the last bytecode is; extra bytes at the end of a method are used to encode things like source pointers or temp names - if the method needs a frame or not - what are the targets of any backward branches. - how many blocks it creates Answer the block count or on error a negative error code" | latestContinuation nExts descriptor pc numBlocks distance targetPC framelessStackDelta seenInstVarStore | <var: #descriptor type: #'BytecodeDescriptor *'> needsFrame := useTwoPaths := seenInstVarStore := false. LowcodeVM ifTrue: [ hasNativeFrame := false ]. self maybeInitNumFixups. self maybeInitNumCounters. prevBCDescriptor := nil. NewspeakVM ifTrue: [numIRCs := 0]. (primitiveIndex > 0 and: [coInterpreter isQuickPrimitiveIndex: primitiveIndex]) ifTrue: [^0]. pc := latestContinuation := initialPC. numBlocks := framelessStackDelta := nExts := extA := numExtB := extB := 0. [pc <= endPC] whileTrue: [byte0 := (objectMemory fetchByte: pc ofObject: methodObj) + bytecodeSetOffset. descriptor := self generatorAt: byte0. descriptor isExtension ifTrue: [descriptor opcode = Nop ifTrue: "unknown bytecode tag; see Cogit class>>#generatorTableFrom:" [^EncounteredUnknownBytecode]. self loadSubsequentBytesForDescriptor: descriptor at: pc. self perform: descriptor generator]. (descriptor isReturn and: [pc >= latestContinuation]) ifTrue: [endPC := pc]. needsFrame ifFalse: [(descriptor needsFrameFunction isNil or: [self perform: descriptor needsFrameFunction with: framelessStackDelta]) ifTrue: ["With immutability we win simply by avoiding a frame build if the receiver is young and not immutable." self cppIf: IMMUTABILITY ifTrue: [descriptor is1ByteInstVarStore ifTrue: [useTwoPaths := true] ifFalse: [needsFrame := true. useTwoPaths := false]] ifFalse: [needsFrame := true. useTwoPaths := false]] ifFalse: [framelessStackDelta := framelessStackDelta + descriptor stackDelta. "Without immutability we win if there are two or more stores and the receiver is new." self cppIf: IMMUTABILITY ifTrue: [] ifFalse: [descriptor is1ByteInstVarStore ifTrue: [seenInstVarStore ifTrue: [useTwoPaths := true] ifFalse: [seenInstVarStore := true]]]]]. descriptor isBranch ifTrue: [distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. targetPC := pc + descriptor numBytes + distance. self maybeCountFixup: descriptor. (self isBackwardBranch: descriptor at: pc exts: nExts in: methodObj) + ifTrue: [self initializeFixupAt: targetPC] - ifTrue: [self initializeFixupAt: targetPC - initialPC] ifFalse: [latestContinuation := latestContinuation max: targetPC. self maybeCountCounter]]. descriptor isBlockCreation ifTrue: [numBlocks := numBlocks + 1. distance := self spanFor: descriptor at: pc exts: nExts in: methodObj. targetPC := pc + descriptor numBytes + distance. latestContinuation := latestContinuation max: targetPC. self maybeCountFixup: descriptor]. NewspeakVM ifTrue: [descriptor hasIRC ifTrue: [numIRCs := numIRCs + 1]]. pc := pc + descriptor numBytes. nExts := descriptor isExtension ifTrue: [nExts + 1] ifFalse: [extA := numExtB := extB := 0]. prevBCDescriptor := descriptor]. ^numBlocks!

3 2

[OpenSmalltalk/opensmalltalk-vm] 195d84: makes squeak.cog.spur compile on OpenBSD 6.0
by GitHub 26 Feb '17

26 Feb '17

Branch: refs/heads/Cog Home: https://github.com/OpenSmalltalk/opensmalltalk-vm Commit: 195d848e927ea2fc5434f94d9b724c73849c62b3 https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/195d848e927ea2fc54… Author: Gerardo Santana <geardo.santana(a)gmail.com> Date: 2016-10-09 (Sun, 09 Oct 2016) Changed paths: M build.linux64x64/squeak.cog.spur/build/mvm M platforms/Cross/plugins/SqueakFFIPrims/sqFFIPlugin.c M platforms/unix/vm/sqUnixMain.c M platforms/unix/vm/sqUnixVMProfile.c M src/plugins/UnixOSProcessPlugin/UnixOSProcessPlugin.c M src/plugins/VMProfileLinuxSupportPlugin/VMProfileLinuxSupportPlugin.c Log Message: ----------- makes squeak.cog.spur compile on OpenBSD 6.0 Commit: e427da4d72804b99b58fb58c5db320111d6cccc7 https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/e427da4d72804b99b5… Author: Gerardo Santana <geardo.santana(a)gmail.com> Date: 2016-10-09 (Sun, 09 Oct 2016) Changed paths: M platforms/unix/config/bin.squeak.sh.in M platforms/unix/config/squeak.sh.in Log Message: ----------- adds OpenBSD support to Squeak's shell script wrapper Commit: ab77774ff8eedd7a7de9814ef1961f20bf1fbeab https://github.com/OpenSmalltalk/opensmalltalk-vm/commit/ab77774ff8eedd7a7d… Author: Fabio Niephaus <code(a)fniephaus.com> Date: 2016-10-15 (Sat, 15 Oct 2016) Changed paths: M build.linux64x64/squeak.cog.spur/build/mvm M platforms/Cross/plugins/SqueakFFIPrims/sqFFIPlugin.c M platforms/unix/config/bin.squeak.sh.in M platforms/unix/config/squeak.sh.in M platforms/unix/vm/sqUnixMain.c M platforms/unix/vm/sqUnixVMProfile.c M src/plugins/UnixOSProcessPlugin/UnixOSProcessPlugin.c M src/plugins/VMProfileLinuxSupportPlugin/VMProfileLinuxSupportPlugin.c Log Message: ----------- Merge pull request #78 from santana/openbsd2 OpenBSD support Compare: https://github.com/OpenSmalltalk/opensmalltalk-vm/compare/3c2c39d92cb8...ab…

5 5

VM Maker: VMMaker.oscog-eem.2139.mcz
by commits＠source.squeak.org 25 Feb '17

25 Feb '17

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.2139.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.2139 Author: eem Time: 24 February 2017, 5:00:19.473207 pm UUID: a905d032-fb67-4132-a5bf-5d59e668f2e5 Ancestors: VMMaker.oscog-eem.2138 Oops, and include Lowcode in generateAllConfigurationsUnderVersionControl. =============== Diff against VMMaker.oscog-eem.2138 =============== Item was changed: ----- Method: CogObjectRepresentation>>genJumpNotSmallIntegersIn:and:scratch: (in category 'compile abstract instructions') ----- genJumpNotSmallIntegersIn: aRegister and: bRegister scratch: scratchRegister "Generate a compare and branch to test if aRegister and bRegister contains other than SmallIntegers, i.e. don't branch if both aRegister and bRegister contain SmallIntegers. Answer the jump. Destroy scratchRegister if required." <returnTypeC: #'AbstractInstruction *'> + <inline: true> + cogit + MoveR: aRegister R: scratchRegister; + AndR: bRegister R: scratchRegister. + ^self genJumpNotSmallIntegerInScratchReg: scratchRegister! - ^self subclassResponsibility! Item was removed: - ----- Method: CogObjectRepresentationForSpur>>genJumpNotSmallIntegersIn:and:scratch: (in category 'compile abstract instructions') ----- - genJumpNotSmallIntegersIn: aRegister and: bRegister scratch: scratchRegister - "Generate a compare and branch to test if aRegister and bRegister contains other than SmallIntegers, - i.e. don't branch if both aRegister and bRegister contain SmallIntegers. - Answer the jump. Destroy scratchRegister if required." - <returnTypeC: #'AbstractInstruction *'> - <returnTypeC: #'AbstractInstruction *'> - <inline: true> - cogit - MoveR: aRegister R: scratchRegister; - AndR: bRegister R: scratchRegister. - ^self genJumpNotSmallIntegerInScratchReg: scratchRegister! Item was changed: ----- Method: VMMaker class>>generateAllConfigurationsUnderVersionControl (in category 'configurations') ----- generateAllConfigurationsUnderVersionControl self generateAllNewspeakConfigurationsUnderVersionControl; generateAllSqueakConfigurationsUnderVersionControl; + generateAllSpurLowcodeConfigurations; generateVMPlugins!

1 0

VM Maker: Cog-eem.337.mcz
by commits＠source.squeak.org 25 Feb '17

25 Feb '17

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.337.mcz ==================== Summary ==================== Name: Cog-eem.337 Author: eem Time: 24 February 2017, 4:08:30.829071 pm UUID: e412f1eb-4517-4759-bbfd-c1257d460238 Ancestors: Cog-eem.336 Restore inadvertent deletions. =============== Diff against Cog-eem.336 =============== Item was added: + ----- Method: BochsPlugin>>primitiveDisassembleAt:InMemory: (in category 'primitives') ----- + "cpuAlien <BochsIA32|X86Alien>" primitiveDisassembleAt: address "<Integer>" InMemory: memory "<Bitmap|ByteArray|WordArray>" + "Return an Array of the instruction length and its decompilation as a string for the instruction at address in memory." + | cpuAlien cpu instrLenOrErr resultObj log logLen logObj logObjData | + <var: #cpu type: #'void *'> + <var: #log type: #'char *'> + <var: #logLen type: #long> + <var: #logObjData type: #'char *'> + cpuAlien := self primitive: #primitiveDisassembleAtInMemory + parameters: #(Unsigned WordsOrBytes) + receiver: #Oop. + (cpu := self cCoerceSimple: (self startOfData: cpuAlien) to: #'void *') = 0 ifTrue: + [^interpreterProxy primitiveFailFor: PrimErrBadReceiver]. + instrLenOrErr := self disassembleFor: cpu + At: address + In: memory + Size: (interpreterProxy byteSizeOf: memory cPtrAsOop). + instrLenOrErr < 0 ifTrue: + [^interpreterProxy primitiveFailFor: PrimErrInappropriate]. + log := self getlog: (self cCode: [self addressOf: logLen] inSmalltalk: [logLen := 0]). + resultObj := interpreterProxy instantiateClass: interpreterProxy classArray indexableSize: 2. + resultObj = 0 ifTrue: + [^interpreterProxy primitiveFailFor: PrimErrNoMemory]. + + "Easier keeping the damn thing on the stack than using pushRemappableOop:/popRemappableOop. + Where is topRemappableOop when you need it?" + interpreterProxy pushRemappableOop: resultObj. + logObj := interpreterProxy + instantiateClass: interpreterProxy classString + indexableSize: logLen. + interpreterProxy failed ifTrue: + [interpreterProxy popRemappableOop. + ^interpreterProxy primitiveFailFor: PrimErrNoMemory]. + logObjData := interpreterProxy arrayValueOf: logObj. + self mem: logObjData cp: log y: logLen. + resultObj := interpreterProxy popRemappableOop. + interpreterProxy + storePointer: 0 + ofObject: resultObj + withValue: (interpreterProxy integerObjectOf: instrLenOrErr). + interpreterProxy storePointer: 1 ofObject: resultObj withValue: logObj. + + ^resultObj! Item was added: + ----- Method: GdbARMPlugin>>primitiveDisassembleAt:InMemory: (in category 'primitives') ----- + "cpuAlien <GdbARMAlien>" primitiveDisassembleAt: address "<Integer>" InMemory: memory "<Bitmap|ByteArray|WordArray>" + "Return an Array of the instruction length and its decompilation as a string for the instruction at address in memory." + | cpuAlien cpu instrLenOrErr resultObj log logLen logObj logObjData | + <var: #cpu type: #'void *'> + cpuAlien := self primitive: #primitiveDisassembleAtInMemory + parameters: #(Unsigned WordsOrBytes) + receiver: #Oop. + (cpu := self startOfData: cpuAlien) = 0 ifTrue: + [^interpreterProxy primitiveFailFor: PrimErrBadReceiver]. + instrLenOrErr := self disassembleFor: cpu + At: address + In: memory + Size: (interpreterProxy byteSizeOf: memory cPtrAsOop). + instrLenOrErr < 0 ifTrue: + [^interpreterProxy primitiveFailFor: PrimErrInappropriate]. + log := self getlog: (self cCode: [self addressOf: logLen] inSmalltalk: [logLen := 0]). + resultObj := interpreterProxy instantiateClass: interpreterProxy classArray indexableSize: 2. + resultObj = 0 ifTrue: + [^interpreterProxy primitiveFailFor: PrimErrNoMemory]. + + "Easier keeping the damn thing on the stack than using pushRemappableOop:/popRemappableOop. + Where is topRemappableOop when you need it?" + interpreterProxy pushRemappableOop: resultObj. + logObj := interpreterProxy + instantiateClass: interpreterProxy classString + indexableSize: logLen. + interpreterProxy failed ifTrue: + [interpreterProxy popRemappableOop. + ^interpreterProxy primitiveFailFor: PrimErrNoMemory]. + logObjData := interpreterProxy arrayValueOf: logObj. + self mem: logObjData cp: log y: logLen. + resultObj := interpreterProxy popRemappableOop. + interpreterProxy + storePointer: 0 + ofObject: resultObj + withValue: (interpreterProxy integerObjectOf: instrLenOrErr). + interpreterProxy storePointer: 1 ofObject: resultObj withValue: logObj. + + ^resultObj!

1 0

VM Maker: VMMaker.oscogIdeas-eem.2139.mcz
by commits＠source.squeak.org 25 Feb '17

25 Feb '17

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscogIdeas-eem.2139.mcz ==================== Summary ==================== Name: VMMaker.oscogIdeas-eem.2139 Author: eem Time: 24 February 2017, 3:36:08.882371 pm UUID: f0fc3b40-4fc6-4228-b593-e712981fbe51 Ancestors: VMMaker.oscog-eem.2138 Tastelessness. Inline asInteger et al in self sends in Character. Since Sista will do all this and more commit on a branch just to document the code. But don't put it in trunk because these is no mechanism to flush the methods containing the inlined methods if they are ever redefined (e.g. using MethodWrappers, et al). =============== Diff against VMMaker.oscog-eem.2138 =============== Item was added: + ----- Method: CogObjectRepresentation>>maybeInlineSendOf:numArgs:receiverTags: (in category 'bytecode generator support') ----- + maybeInlineSendOf: selectorIndex numArgs: numArgs receiverTags: rcvrTag + "Allow the objectRepresentation to inline certain self-sends to immediates if it can." + <inline: true> + ^false! Item was changed: ----- Method: CogObjectRepresentationFor32BitSpur>>genPrimitiveImmediateAsInteger (in category 'primitive generators') ----- genPrimitiveImmediateAsInteger + ":Assume the receiver is never a SmallInteger. One would use ^self for that." - ":Assume the receiuver is never a SmallInteger. One would use ^self for that." self genConvertCharacterToSmallIntegerInReg: ReceiverResultReg. cogit genPrimReturn. ^UnfailingPrimitive! Item was added: + ----- Method: CogObjectRepresentationForSpur>>maybeInlineSendOf:numArgs:receiverTags: (in category 'bytecode generator support') ----- + maybeInlineSendOf: selectorIndex numArgs: numArgs receiverTags: rcvrTag + "Allow the objectRepresentation to inline certain self-sends to immediates if it can. + We try and inline self asInteger in Character. We assume this is not a special selector." + <inline: true> + | methodOrNil | + (rcvrTag = objectMemory characterTag + and: [numArgs = 0 + and: [selectorIndex >= 0 + and: [cogit ssTop isSameEntryAs: (self addressOf: cogit simSelf)]]]) ifFalse: + [^false]. + + methodOrNil := coInterpreter + lookupSelector: (cogit getLiteral: selectorIndex) + inClass: objectMemory classCharacter. + (methodOrNil notNil + and: [(objectMemory isOopCompiledMethod: methodOrNil) + and: [(coInterpreter primitiveIndexOf: methodOrNil) = 171]]) ifFalse: + [^false]. + + cogit ssTop popToReg: ReceiverResultReg. + self genConvertCharacterToSmallIntegerInReg: ReceiverResultReg. + cogit ssTop type: SSRegister; register: ReceiverResultReg. + ^true! Item was added: + ----- Method: CurrentImageCoInterpreterFacade>>lookupSelector:inClass: (in category 'cog jit support') ----- + lookupSelector: selectorOop inClass: classOop + | class selector | + class := self objectForOop: classOop. + selector := self objectForOop: selectorOop. + ^(class canUnderstand: selector) ifTrue: + [self oopForObject: ((class whichClassIncludesSelector: selector) + compiledMethodAt: selector)]! Item was added: + ----- Method: CurrentImageCoInterpreterFacade>>receiverTagBitsForMethod: (in category 'accessing') ----- + receiverTagBitsForMethod: anInteger + self subclassResponsibility! Item was added: + ----- Method: CurrentImageCoInterpreterFacadeForSpurObjectRepresentation>>receiverTagBitsForMethod: (in category 'accessing') ----- + receiverTagBitsForMethod: methodOop + ^(self objectForOop: methodOop) methodClass + caseOf: { + [SmallInteger] -> [objectMemory smallIntegerTag]. + [Character] -> [objectMemory characterTag]. + [SmallFloat64] -> [objectMemory smallFloatTag] } + otherwise: [0]! Item was added: + ----- Method: CurrentImageCoInterpreterFacadeForSqueakV3ObjectRepresentation>>receiverTagBitsForMethod: (in category 'accessing') ----- + receiverTagBitsForMethod: methodOop + ^(self objectForOop: methodOop) methodClass = SmallInteger + ifTrue: [1] + ifFalse: [0]! Item was changed: ----- Method: StackToRegisterMappingCogit>>genSend:numArgs: (in category 'bytecode generator support') ----- genSend: selectorIndex numArgs: numArgs + "Generate an unlinked send. Allow the objectRepresentation to inline if it can." + | inlined | + inlined := objectRepresentation + maybeInlineSendOf: selectorIndex + numArgs: numArgs + receiverTags: receiverTags. + inlined ifTrue: + [self annotateInstructionForBytecode. + ^0]. self marshallSendArguments: numArgs. ^self genMarshalledSend: selectorIndex numArgs: numArgs sendTable: ordinarySendTrampolines!

1 0

VM Maker: VMMaker.oscog-eem.2137.mcz
by commits＠source.squeak.org 23 Feb '17

23 Feb '17

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.2137.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.2137 Author: eem Time: 22 February 2017, 4:06:39.159606 pm UUID: 69cb5651-490e-481d-85cf-7bd7ed25f785 Ancestors: VMMaker.oscog-EstebanLorenzano.2136 CoInterpreter: Earlier assert checking for invalid class on send. Cogit: Support for turning frame offsets and variable base offsets into variable names in disassembly. Support for mapping from offset to temp index and refactor frameOffsetOfTemporary: to frameOffsetOfTemporary:numArgs: to enable this. Print maybeSelectorForMethod: if selector is nil when disassembling a cogMethod. StackToRegisterMappingCogit: Add CogSimStackEntry>>isFrameTempVar and use it swhere possible (for clarity). RegisterAllocatingCogit: Again improve register assignment code in genStorePop:TemporaryVariable:; no need to allocate a register for a temp if it already has one. Must be careful not to assign the same register to two distinct entries, a slip easy to make given that popToReg: and storeToReg: actually do assignments. Realise that a backward jump merge is exactly the same problem as a jump forwards merge (i.e. a parallel move), hence nuke reconcileRegisterStateForBackwardJoin:, and refactor mergeCurrentSimStackWith: into mergeCurrentSimStackWith:forwards:. Realise that register assignments in merges should be done once only, so that merges between temp entries with registers should not be done if already done higher up the stack with volatile entries. Elide the obscurantism of directionForMergeWith: in favour of pushForMergeWith:. Add temporary support for aborting a compilation that fails to generate correct merge code. The idea being to defer solving the somewhat difficult parallel merge problem until after the basics have been verified. With these changes the RegisterAllocatingCogit can start-up a Squeak image, albeit with a handfull of merge failures: Integer>>#digitMultiply:neg:, Bitmap>>#decompress:fromByteArray:at:, TextStyle>>#nextTabXFrom:leftMargin:rightMargin:, SmallInteger>>#printString, WeakKeyDictionary>>#finalizeValues, Morph>>#balloonText. Fix a speeling eppop. Nuke an obsolete method or two. Revert a change stamp. =============== Diff against VMMaker.oscog-EstebanLorenzano.2136 =============== Item was changed: ----- Method: CoInterpreter>>internalFindNewMethodOrdinary (in category 'message sending') ----- internalFindNewMethodOrdinary "Find the compiled method to be run when the current messageSelector is sent to the given class, setting the values of newMethod and primitiveIndex." | ok | <inline: true> ok := self inlineLookupInMethodCacheSel: messageSelector classTag: lkupClassTag. ok ifTrue: [self ifAppropriateCompileToNativeCode: newMethod selector: messageSelector] ifFalse: [self externalizeIPandSP. ((objectMemory isOopForwarded: messageSelector) or: [objectMemory isForwardedClassTag: lkupClassTag]) ifTrue: [(objectMemory isOopForwarded: messageSelector) ifTrue: [messageSelector := self handleForwardedSelectorFaultFor: messageSelector]. (objectMemory isForwardedClassTag: lkupClassTag) ifTrue: [lkupClassTag := self handleForwardedSendFaultForTag: lkupClassTag]. (self lookupInMethodCacheSel: messageSelector classTag: lkupClassTag) ifTrue: [^self ifAppropriateCompileToNativeCode: newMethod selector: messageSelector]]. lkupClass := objectMemory classForClassTag: lkupClassTag. + self assert: (lkupClass notNil and: [self addressCouldBeClassObj: lkupClass]). NewspeakVM ifTrue: [self lookupOrdinarySend] ifFalse: [self lookupMethodInClass: lkupClass]. self internalizeIPandSP. self addNewMethodToCache: lkupClass]! Item was added: + ----- Method: CogRegisterAllocatingSimStackEntry>>complicatedIsMergedWithTargetEntry: (in category 'comparing') ----- + complicatedIsMergedWithTargetEntry: targetEntry + "The receiver is a simStackEntry at a jump to the corresponding simStackEntry at the jump's target. + Answer if no merge is required for the jump." + <var: 'ssEntry' type: #'CogSimStackEntry *'> + spilled ~= targetEntry spilled ifTrue: "push or pop required" + [^false]. + (liveRegister = NoReg and: [targetEntry liveRegister ~= NoReg]) ifTrue: "register load required" + [^false]. + (liveRegister ~= NoReg + and: [liveRegister = targetEntry liveRegister + and: [type = targetEntry type + and: [type = SSConstant or: [type = SSRegister and: [register = targetEntry register]]]]]) ifTrue: + [^true]. + ((type = SSBaseOffset or: [type == SSSpill]) + and: [(targetEntry type = SSBaseOffset or: [targetEntry type == SSSpill]) + and: [offset = targetEntry offset and: [register = targetEntry register]]]) ifTrue: + [^true]. + "self: const =1 (16r1) (live: Extra4Reg) {172} vs reg ReceiverResultReg {127}" + "self: reg ReceiverResultReg {95} vs reg Extra5Reg {85}" + ((type = SSConstant and: [targetEntry type = SSRegister and: [liveRegister ~= targetEntry registerOrNone]]) + or: [type = SSRegister and: [targetEntry type = SSRegister and: [register ~= targetEntry registerOrNone]]]) ifFalse: + [self halt: 'comment the incompatible pair please']. + ^false! Item was changed: ----- Method: CogRegisterAllocatingSimStackEntry>>isMergedWithTargetEntry: (in category 'comparing') ----- isMergedWithTargetEntry: targetEntry "The receiver is a simStackEntry at a jump to the corresponding simStackEntry at the jump's target. Answer if no merge is required for the jump." <var: 'ssEntry' type: #'CogSimStackEntry *'> spilled ~= targetEntry spilled ifTrue: "push or pop required" [^false]. (liveRegister = NoReg and: [targetEntry liveRegister ~= NoReg]) ifTrue: "register load required" [^false]. + (self isSameEntryAs: targetEntry) ifTrue: + [^liveRegister = targetEntry liveRegister]. + (type = SSConstant and: [targetEntry type = SSRegister and: [liveRegister = targetEntry register]]) ifTrue: - (liveRegister ~= NoReg - and: [liveRegister = targetEntry liveRegister - and: [type = targetEntry type - and: [type = SSConstant or: [type = SSRegister and: [register = targetEntry register]]]]]) ifTrue: [^true]. - ((type = SSBaseOffset or: [type == SSSpill]) - and: [(targetEntry type = SSBaseOffset or: [targetEntry type == SSSpill]) - and: [offset = targetEntry offset and: [register = targetEntry register]]]) ifTrue: - [^true]. "self: const =1 (16r1) (live: Extra4Reg) {172} vs reg ReceiverResultReg {127}" "self: reg ReceiverResultReg {95} vs reg Extra5Reg {85}" + "(bo ReceiverResultReg+296 (live: Extra5Reg) {88} vs reg ReceiverResultReg {84}" ((type = SSConstant and: [targetEntry type = SSRegister and: [liveRegister ~= targetEntry registerOrNone]]) + or: [(type = SSRegister and: [targetEntry type = SSRegister and: [register ~= targetEntry registerOrNone]]) + or: [type = SSBaseOffset and: [register = ReceiverResultReg and: [targetEntry type = SSRegister]]]]) ifFalse: - or: [type = SSRegister and: [targetEntry type = SSRegister and: [register ~= targetEntry registerOrNone]]]) ifFalse: [self halt: 'comment the incompatible pair please']. ^false! Item was changed: ----- Method: CogRegisterAllocatingSimStackEntry>>reconcileForwardsWith: (in category 'compile abstract instructions') ----- reconcileForwardsWith: targetEntry "Make the state of the receiver, a stack entry at the end of a basic block, the same as the corresponding simStackEntry at the target of a preceding jump to the beginning of the next basic block. Make sure targetEntry reflects the state of the merged simStack; it will be installed as the current entry by restoreSimStackAtMergePoint: in mergeWithFixupIfRequired:. Answer if the liveRegister for the targetEntry (if any) should be deassigned; this is because if merging a non-temp with a temp that has a live register we can assign to the register, but must unassign the register from the temp, otherwise the temp will acquire the merged value without an assignment." <var: #targetEntry type: #'SimStackEntry *'> | targetReg | (targetReg := targetEntry registerOrNone) = NoReg ifTrue: [| reg | self assert: targetEntry spilled. (self isSameEntryAs: targetEntry) ifTrue: [self assert: spilled. ^false]. (reg := self registerOrNone) = NoReg ifTrue: [reg := TempReg]. self storeToReg: reg. spilled ifTrue: [cogit MoveR: reg Mw: targetEntry offset r: targetEntry register] ifFalse: [cogit PushR: reg]. ^false]. liveRegister ~= NoReg ifTrue: [liveRegister ~= targetReg ifTrue: [cogit MoveR: liveRegister R: targetReg]. (spilled and: [targetEntry spilled not]) ifTrue: [cogit AddCq: objectRepresentation wordSize R: SPReg]. ^false]. spilled ifTrue: [targetEntry spilled ifFalse: [cogit PopR: targetReg. "KISS; generate the least number of instructions..." ^false]] ifFalse: [targetEntry spilled ifTrue: [cogit SubCq: objectRepresentation wordSize R: SPReg]]. type caseOf: { [SSBaseOffset] -> [cogit MoveMw: offset r: register R: targetReg]. [SSSpill] -> [cogit MoveMw: offset r: register R: targetReg]. [SSConstant] -> [cogit genMoveConstant: constant R: targetReg]. [SSRegister] -> [register ~= targetReg ifTrue: [cogit MoveR: register R: targetReg]] }. (targetEntry type = SSConstant and: [type ~= SSConstant or: [constant ~= targetEntry constant]]) ifTrue: [targetEntry register: targetReg; type: SSRegister]. "If merging a constant with a constant assigned to a register, then the register must be deassigned from any temps." ^targetEntry type = SSConstant "If merging a non-temp with a temp that has a live register we can assign to the register, but must unassign the register from the temp, otherwise the temp will acquire the merged value without an assignment." + or: [targetEntry isFrameTempVar and: [(self isSameEntryAs: targetEntry) not]]! - or: [targetEntry type = SSBaseOffset - and: [targetEntry register = FPReg - and: [(self isSameEntryAs: targetEntry) not]]]! Item was changed: ----- Method: CogRegisterAllocatingSimStackEntry>>reconcilePoppingWith: (in category 'compile abstract instructions') ----- reconcilePoppingWith: targetEntry "Make the state of a targetEntry, a stack entry following a non-inlined special selector send, the same as the corresponding entry (the receiver) along the inlined path." <var: #targetEntry type: #'SimStackEntry *'> | targetReg | + spilled = targetEntry spilled ifTrue: + [self assert: (targetEntry spilled + ifTrue: [self isSameEntryAs: targetEntry] + ifFalse: [targetEntry registerOrNone ~= NoReg]). - targetEntry spilled ifTrue: - [self assert: (self isSameEntryAs: targetEntry). (targetReg := targetEntry registerOrNone) = NoReg ifTrue: [^self]. type caseOf: { [SSBaseOffset] -> [cogit MoveMw: offset r: register R: targetReg]. [SSSpill] -> [cogit MoveMw: offset r: register R: targetReg]. [SSConstant] -> [cogit genMoveConstant: constant R: targetReg]. [SSRegister] -> [targetReg ~= register ifTrue: [cogit MoveR: register R: targetReg]] }. ^self]. + self assert: spilled. (targetEntry type ~= SSConstant and: [(targetReg := targetEntry registerOrNone) ~= NoReg]) ifTrue: [cogit PopR: targetReg] ifFalse: [cogit AddCq: objectRepresentation wordSize R: SPReg]! Item was added: + ----- Method: CogRegisterAllocatingSimStackEntry>>simplifiedIsMergedWithTargetEntry: (in category 'comparing') ----- + simplifiedIsMergedWithTargetEntry: targetEntry + "The receiver is a simStackEntry at a jump to the corresponding simStackEntry at the jump's target. + Answer if no merge is required for the jump." + <var: 'ssEntry' type: #'CogSimStackEntry *'> + spilled ~= targetEntry spilled ifTrue: "push or pop required" + [^false]. + (liveRegister = NoReg and: [targetEntry liveRegister ~= NoReg]) ifTrue: "register load required" + [^false]. + (self isSameEntryAs: targetEntry) ifTrue: + [^liveRegister = targetEntry liveRegister]. + (type = SSConstant and: [targetEntry type = SSRegister and: [liveRegister = targetEntry register]]) ifTrue: + [^true]. + "self: const =1 (16r1) (live: Extra4Reg) {172} vs reg ReceiverResultReg {127}" + "self: reg ReceiverResultReg {95} vs reg Extra5Reg {85}" + "(bo ReceiverResultReg+296 (live: Extra5Reg) {88} vs reg ReceiverResultReg {84}" + ((type = SSConstant and: [targetEntry type = SSRegister and: [liveRegister ~= targetEntry registerOrNone]]) + or: [(type = SSRegister and: [targetEntry type = SSRegister and: [register ~= targetEntry registerOrNone]]) + or: [type = SSBaseOffset and: [register = ReceiverResultReg and: [targetEntry type = SSRegister]]]]) ifFalse: + [self halt: 'comment the incompatible pair please']. + ^false! Item was added: + ----- Method: CogSimStackEntry>>isFrameTempVar (in category 'comparing') ----- + isFrameTempVar + "Answer if the receiver is a temporary variable. This + only works in a frameful method, hence the weird name." + <inline: true> + ^type = SSBaseOffset and: [register = FPReg]! Item was changed: ----- Method: Cogit>>blockStartAt: (in category 'compile abstract instructions') ----- blockStartAt: index <cmacro: '(index) (&blockStarts[index])'> "hack set startpc for printSimStack:toDepth:spillBase:on:" + self maybeNoteStartpcFor: (blockStarts at: index). - (self class initializationOptions at: #tempNames ifAbsent: nil) ifNotNil: - [self class initializationOptions at: #startpc put: (blockStarts at: index) startpc]. ^blockStarts at: index! Item was changed: ----- Method: Cogit>>disassembleMethod:on: (in category 'disassembly') ----- disassembleMethod: surrogateOrAddress on: aStream <doNotGenerate> | cogMethod mapEntries codeRanges | cogMethod := surrogateOrAddress isInteger ifTrue: [self cogMethodSurrogateAt: surrogateOrAddress] ifFalse: [surrogateOrAddress]. cogMethod cmType = CMBlock ifTrue: [^self disassembleMethod: cogMethod cmHomeMethod on: aStream]. (disassemblingMethod isNil and: [self class initializationOptions at: #relativeAddressDisassembly ifAbsent: [false]]) ifTrue: [^[disassemblingMethod := cogMethod. self disassembleMethod: surrogateOrAddress on: aStream] ensure: [disassemblingMethod := nil]]. self printMethodHeader: cogMethod on: aStream. mapEntries := Dictionary new. (cogMethod cmType = CMMethod and: [cogMethod cmIsFullBlock]) ifFalse: [mapEntries at: cogMethod asInteger + cmEntryOffset put: 'entry']. cogMethod cmType = CMMethod ifTrue: [cogMethod cmIsFullBlock ifTrue: [mapEntries at: cogMethod asInteger + cbNoSwitchEntryOffset put: 'noSwitchEntry'] ifFalse: [mapEntries at: cogMethod asInteger + cmNoCheckEntryOffset put: 'noCheckEntry']]. cogMethod cmType = CMClosedPIC ifTrue: [mapEntries at: cogMethod asInteger + firstCPICCaseOffset put: 'ClosedPICCase0'. 1 to: MaxCPICCases - 1 do: [:i| mapEntries at: cogMethod asInteger + firstCPICCaseOffset + (i * cPICCaseSize) put: 'ClosedPICCase', i printString]] ifFalse: [self mapFor: cogMethod performUntil: #collectMapEntry:address:into: arg: mapEntries]. NewspeakVM ifTrue: [objectRepresentation canPinObjects ifFalse: [mapEntries keys do: [:a| (mapEntries at: a) = #IsNSSendCall ifTrue: [mapEntries at: a + backEnd jumpShortByteSize put: {'Class'. #disassembleCachedOop:. (objectMemory wordSize)}; at: a + backEnd jumpShortByteSize + objectMemory bytesPerOop put: {'ImplicitReceiver'. #disassembleCachedOop:. (objectMemory wordSize)}]]]]. "This would all be far more elegant and simple if we used blocks. But there are no blocks in C and the basic enumerators here need to be used in the real VM. Apologies." (codeRanges := self codeRangesFor: cogMethod) do: [:range| (cogMethod cmType = CMMethod) ifTrue: [mapEntries keysAndValuesDo: [:mcpc :label| | bcpc selectorOrNone | (((range includes: mcpc) or: [range last + 1 = mcpc]) and: [(AnnotationsWithBytecodePCs includes: label) and: [range cogMethod stackCheckOffset > 0]]) ifTrue: [bcpc := self bytecodePCFor: mcpc startBcpc: range startpc in: range cogMethod. bcpc ~= 0 ifTrue: [label = #IsSendCall ifTrue: [selectorOrNone := (self selectorForSendAt: mcpc annotation: IsSendCall in: cogMethod methodObject). (selectorOrNone isInteger and: [objectMemory addressCouldBeOop: selectorOrNone]) ifTrue: [selectorOrNone := objectMemory stringOf: selectorOrNone]. selectorOrNone := ' ', selectorOrNone] ifFalse: [selectorOrNone := '']. mapEntries at: mcpc put: label, selectorOrNone, ' bc ', bcpc printString, '/', (bcpc + 1) printString]]]]. (cogMethod blockEntryOffset ~= 0 and: [range first = (cogMethod blockEntryOffset + cogMethod asInteger)]) ifTrue: [aStream nextPutAll: 'blockEntry:'; cr. self blockDispatchFor: cogMethod perform: #disassemble:from:to:arg: arg: aStream] ifFalse: [range first > (cogMethod address + cmNoCheckEntryOffset) ifTrue: [self printMethodHeader: range cogMethod on: aStream]. + self maybeNoteStartpcFor: range. self disassembleFrom: range first to: range last labels: mapEntries on: aStream]]. aStream nextPutAll: 'startpc: '; print: codeRanges first startpc; cr. (cogMethod cmType = CMMethod or: [cogMethod cmType = CMOpenPIC]) ifTrue: [[self mapFor: cogMethod performUntil: #printMapEntry:mcpc:args: arg: { aStream. codeRanges. cogMethod }] on: AssertionFailure do: [:ex| ex primitiveChangeClassTo: ResumableVMError basicNew. ":) :) :)" ex resume: nil]]. ^cogMethod! Item was added: + ----- Method: Cogit>>lookupFrameOffset: (in category 'disassembly') ----- + lookupFrameOffset: anInteger + (self class initializationOptions at: #tempNames ifAbsent: nil) ifNotNil: + [:dict| + (self class initializationOptions at: #startpc ifAbsent: nil) ifNotNil: + [:startpc| + (dict at: startpc + 1 ifAbsent: nil) ifNotNil: + [:tempNames| | numArgs | + anInteger = FoxMFReceiver ifTrue: + [^'self']. + numArgs := self class initializationOptions at: #numArgs. + 1 to: tempNames size do: + [:i| + anInteger = (self frameOffsetOfTemporary: i - 1 numArgs: numArgs) ifTrue: + [^tempNames at: i]]]]]. + ^nil! Item was added: + ----- Method: Cogit>>maybeNoteStartpcFor: (in category 'disassembly') ----- + maybeNoteStartpcFor: thing "<CogBlockStart|CogCodeRange>" + <doNotGenerate> + (self class initializationOptions at: #tempNames ifAbsent: nil) ifNotNil: + [self class initializationOptions + at: #startpc put: thing startpc; + at: #numArgs put: ([thing cogMethod ifNil: [-1] ifNotNil: [:cm| cm cmNumArgs]] "CogCodeRange" + on: MessageNotUnderstood + do: [:ex| thing numArgs])] "CogBlockStart"! Item was changed: ----- Method: Cogit>>printMethodHeader:on: (in category 'disassembly') ----- printMethodHeader: cogMethod on: aStream <doNotGenerate> self cCode: '' inSmalltalk: [cogMethod isInteger ifTrue: [^self printMethodHeader: (self cogMethodOrBlockSurrogateAt: cogMethod) on: aStream]]. aStream ensureCr. cogMethod asInteger printOn: aStream base: 16. cogMethod cmType = CMMethod ifTrue: [aStream crtab; nextPutAll: 'objhdr: '. cogMethod objectHeader printOn: aStream base: 16]. cogMethod cmType = CMBlock ifTrue: [aStream crtab; nextPutAll: 'homemth: '. cogMethod cmHomeMethod asUnsignedInteger printOn: aStream base: 16. aStream nextPutAll: ' (offset '; print: cogMethod homeOffset; nextPut: $); crtab; nextPutAll: 'startpc: '; print: cogMethod startpc]. aStream crtab; nextPutAll: 'nArgs: '; print: cogMethod cmNumArgs; tab; nextPutAll: 'type: '; print: cogMethod cmType. (cogMethod cmType ~= 0 and: [cogMethod cmType ~= CMBlock]) ifTrue: [aStream crtab; nextPutAll: 'blksiz: '. cogMethod blockSize printOn: aStream base: 16. cogMethod cmType = CMMethod ifTrue: [aStream crtab; nextPutAll: 'method: '. cogMethod methodObject printOn: aStream base: 16. aStream crtab; nextPutAll: 'mthhdr: '. cogMethod methodHeader printOn: aStream base: 16]. aStream crtab; nextPutAll: 'selctr: '. cogMethod selector printOn: aStream base: 16. (coInterpreter lookupAddress: cogMethod selector) ifNotNil: [:string| aStream nextPut: $=; nextPutAll: string]. + cogMethod selector = objectMemory nilObject ifTrue: + [aStream space; nextPut: $(; nextPutAll: (coInterpreter stringOf: (coInterpreter maybeSelectorOfMethod: cogMethod methodObject)); nextPut: $)]. cogMethod cmType = CMMethod ifTrue: [aStream crtab; nextPutAll: 'blkentry: '. cogMethod blockEntryOffset printOn: aStream base: 16. cogMethod blockEntryOffset ~= 0 ifTrue: [aStream nextPutAll: ' => '. cogMethod asInteger + cogMethod blockEntryOffset printOn: aStream base: 16]]]. cogMethod cmType = CMClosedPIC ifTrue: [aStream crtab; nextPutAll: 'cPICNumCases: '. cogMethod cPICNumCases printOn: aStream base: 16. aStream tab; nextPutAll: 'cpicHasMNUCase: '; nextPutAll: (cogMethod cpicHasMNUCase ifTrue: ['yes'] ifFalse: ['no'])] ifFalse: [aStream crtab; nextPutAll: 'stackCheckOffset: '. cogMethod stackCheckOffset printOn: aStream base: 16. cogMethod stackCheckOffset > 0 ifTrue: [aStream nextPut: $/. cogMethod asInteger + cogMethod stackCheckOffset printOn: aStream base: 16]. cogMethod cmType = CMBlock ifTrue: [aStream crtab; nextPutAll: 'cbUsesInstVars '; nextPutAll: (cogMethod cbUsesInstVars ifTrue: ['yes'] ifFalse: ['no'])] ifFalse: [aStream crtab; nextPutAll: 'cmRefersToYoung: '; nextPutAll: (cogMethod cmRefersToYoung ifTrue: ['yes'] ifFalse: ['no']); tab; nextPutAll: 'cmIsFullBlock: '; nextPutAll: (cogMethod cmIsFullBlock ifTrue: ['yes'] ifFalse: ['no'])]. cogMethod cmType = CMMethod ifTrue: [([cogMethod nextMethodOrIRCs] on: MessageNotUnderstood do: [:ex| nil]) ifNotNil: [:nmoircs| aStream crtab; nextPutAll: 'nextMethodOrIRCs: '. nmoircs = 0 ifTrue: [aStream print: nmoircs] ifFalse: [coInterpreter printHex: nmoircs]]. ([cogMethod counters] on: MessageNotUnderstood do: [:ex| nil]) ifNotNil: [:cntrs| aStream crtab; nextPutAll: 'counters: '. cntrs = 0 ifTrue: [aStream print: cntrs] ifFalse: [coInterpreter printHex: cntrs]]]]. aStream cr; flush! Item was changed: ----- Method: MiscPrimitivePlugin class>>translatedPrimitivesForPharo (in category 'translation') ----- translatedPrimitivesForPharo ^#( (Bitmap compress:toByteArray:) (Bitmap decompress:fromByteArray:at:) (Bitmap encodeBytesOf:in:at:) (Bitmap encodeInt:in:at:) (ByteString compare:with:collated:) (ByteString translate:from:to:table:) (ByteString findFirstInString:inSet:startingAt:) (ByteString indexOfAscii:inString:startingAt:) (String findSubstringViaPrimitive:in:startingAt:matchTable:) (ByteArray hashBytes:startingWith:) (SampledSound convert8bitSignedFrom:to16Bit:) )! Item was changed: ----- Method: RegisterAllocatingCogit>>assignToTempRegConflictingRegisterIn: (in category 'bytecode generator support') ----- assignToTempRegConflictingRegisterIn: conflictingRegisterMask "Find the stackEntry in simStack whose liveRegister matches conflictingRegisterMask and assign it to TempReg." self assert: (self isAPowerOfTwo: conflictingRegisterMask). 0 to: simStackPtr do: [:i| (self simStackAt: i) registerMaskOrNone = conflictingRegisterMask ifTrue: [(self simStackAt: i) storeToReg: TempReg; liveRegister: TempReg. + i+1 to: simStackPtr do: + [:j| + self deny: (self simStackAt: i) registerMaskOrNone = conflictingRegisterMask]. ^self]]. self error: 'conflict entry not found'! Item was added: + ----- Method: RegisterAllocatingCogit>>compileAbstractInstructionsFrom:through: (in category 'compile abstract instructions') ----- + compileAbstractInstructionsFrom: start through: end + "Loop over bytecodes, dispatching to the generator for each bytecode, handling fixups in due course. + Override to provide a development-time only escape for failed merges due to partially implemented + parallel move." + ^[super compileAbstractInstructionsFrom: start through: end] + on: Notification + do: [:ex| + ex tag == #failedMerge ifTrue: + [coInterpreter transcript + ensureCr; nextPutAll: 'FAILED MERGE IN '; + nextPutAll: (coInterpreter nameOfClass: (coInterpreter methodClassOf: methodObj)); + nextPutAll: '>>#'; nextPutAll: (coInterpreter stringOf: (coInterpreter maybeSelectorOfMethod: methodObj)); + flush. + ^ShouldNotJIT]. + ex pass]! Item was removed: - ----- Method: RegisterAllocatingCogit>>conflcitsResolvedBetweenSimStackAnd: (in category 'bytecode generator support') ----- - conflcitsResolvedBetweenSimStackAnd: mergeSimStack - "There are no register conflicts between simStack and mergeSimStack if - traversing both stacks from hot end (simStackPtr) to cold end (0) no register - exists in simStack that has previously existed in mergeSimStack. This is because - the resolution assigns values from simStack to registers in mergeSimStack and so - must not assign to a register yet to be read." - | regsWrittenToMask | - regsWrittenToMask := 0. - simStackPtr to: 0 by: -1 do: - [:i| | mergeMask currentMask | - mergeMask := (self simStack: mergeSimStack at: i) registerMaskOrNone. - currentMask := (self simStack: simStack at: i) registerMaskOrNone. - mergeMask ~= currentMask ifTrue: - [(currentMask anyMask: regsWrittenToMask) ifTrue: - [^false]]. - regsWrittenToMask := regsWrittenToMask bitOr: mergeMask]. - ^true! Item was added: + ----- Method: RegisterAllocatingCogit>>conflictsResolvedBetweenSimStackAnd: (in category 'bytecode generator support') ----- + conflictsResolvedBetweenSimStackAnd: mergeSimStack + "There are no register conflicts between simStack and mergeSimStack if + traversing both stacks from hot end (simStackPtr) to cold end (0) no register + exists in simStack that has previously existed in mergeSimStack. This is because + the resolution assigns values from simStack to registers in mergeSimStack and so + must not assign to a register yet to be read." + | regsWrittenToMask | + regsWrittenToMask := 0. + simStackPtr to: 0 by: -1 do: + [:i| | mergeMask currentMask | + mergeMask := (self simStack: mergeSimStack at: i) registerMaskOrNone. + currentMask := (self simStack: simStack at: i) registerMaskOrNone. + mergeMask ~= currentMask ifTrue: + [(currentMask anyMask: regsWrittenToMask) ifTrue: + [^false]]. + regsWrittenToMask := regsWrittenToMask bitOr: mergeMask]. + ^true! Item was changed: ----- Method: RegisterAllocatingCogit>>deassignRegisterForTempVar:in: (in category 'bytecode generator support') ----- deassignRegisterForTempVar: targetEntry in: mergeSimStack "If merging a non-temp with a temp that has a live register we can assign to the register, but must unassign the register from the temp, otherwise the temp will acquire the merged value without an assignment. The targetEntry must also be transmogrified into an SSRegister entry." <var: #targetEntry type: #'SimStackEntry *'> <var: #duplicateEntry type: #'SimStackEntry *'> <var: #mergeSimStack type: #'SimStackEntry *'> <inline: true> | reg | reg := targetEntry liveRegister. + self assert: (reg ~= NoReg and: [targetEntry type = SSConstant or: [targetEntry isFrameTempVar]]). - self assert: ((targetEntry type = SSConstant and: [reg ~= NoReg]) - or: [targetEntry type = SSBaseOffset and: [targetEntry register = FPReg]]). targetEntry type = SSConstant ifTrue: [simStackPtr to: 0 by: -1 do: [:j| | duplicateEntry | duplicateEntry := self simStack: mergeSimStack at: j. (duplicateEntry registerOrNone = reg and: [duplicateEntry type = SSBaseOffset or: [duplicateEntry type = SSSpill]]) ifTrue: [duplicateEntry liveRegister: NoReg]]] ifFalse: [simStackPtr to: 0 by: -1 do: [:j| | duplicateEntry | duplicateEntry := self simStack: mergeSimStack at: j. (targetEntry isSameEntryAs: duplicateEntry) ifTrue: + [j < methodOrBlockNumTemps + ifTrue: [duplicateEntry liveRegister: NoReg] + ifFalse: [duplicateEntry type: SSRegister; register: reg]]]]. - [duplicateEntry liveRegister: NoReg]]]. targetEntry type: SSRegister; register: reg! Item was removed: - ----- Method: RegisterAllocatingCogit>>directionForMergeWith: (in category 'bytecode generator support') ----- - directionForMergeWith: mergeSimStack - "Answer > 0 if values must be pushed from simStack to merge with mergeSimStack, otherwise < 0 (the default)." - <var: #mergeSimStack type: #'SimStackEntry *'> - <inline: true> - simStackPtr to: methodOrBlockNumArgs by: -1 do: - [:i| - (self simStack: mergeSimStack at: i) spilled ifTrue: - [(self simStack: simStack at: i) spilled ifFalse: - [^1]]]. - ^-1! Item was added: + ----- Method: RegisterAllocatingCogit>>duplicateRegisterAssignmentsInTemporaries (in category 'debugging') ----- + duplicateRegisterAssignmentsInTemporaries + | liveRegisters | + liveRegisters := 0. + 0 to: methodOrBlockNumTemps - 1 do: + [:i| | liveRegister | + liveRegister := (self simStackAt: i) liveRegister. + liveRegister ~= NoReg ifTrue: + [(self register: liveRegister isInMask: liveRegisters) ifTrue: + [^true]. + liveRegisters := liveRegisters bitOr: 1 << liveRegister]]. + ^false! Item was changed: ----- Method: RegisterAllocatingCogit>>ensureFixupAt: (in category 'bytecode generator support') ----- ensureFixupAt: targetPC "Make sure there's a flagged fixup at the target pc in fixups. Initially a fixup's target is just a flag. Later on it is replaced with a proper instruction. Override to enerate stack merging code if required." | fixup | <var: #fixup type: #'BytecodeFixup *'> + self assert: targetPC > bytecodePC. + fixup := self fixupAt: targetPC. - fixup := self fixupAt: targetPC. fixup needsFixup ifTrue: [fixup mergeSimStack ifNil: [self setMergeSimStackOf: fixup] + ifNotNil: [self mergeCurrentSimStackWith: fixup forwards: true]] - ifNotNil: [self mergeCurrentSimStackWith: fixup]] ifFalse: [self assert: fixup mergeSimStack isNil. self moveVolatileSimStackEntriesToRegisters. self setMergeSimStackOf: fixup]. ^super ensureFixupAt: targetPC! Item was removed: - ----- Method: RegisterAllocatingCogit>>frameOffsetOfLastTemp (in category 'bytecode generator support') ----- - frameOffsetOfLastTemp - ^self frameOffsetOfTemporary: methodOrBlockNumTemps! Item was changed: ----- Method: RegisterAllocatingCogit>>genJumpBackTo: (in category 'bytecode generator support') ----- + genJumpBackTo: targetPC + | target | + "We generate + merge + cmp stackLimit + jumpAboveOrEqual target + flush + checkForInterrupts + marge from flushed + jmp target + self printSimStack; printSimStack: target mergeSimStack" + self assert: targetPC < bytecodePC. + target := self fixupAt: targetPC. + self mergeCurrentSimStackWith: target forwards: false. - genJumpBackTo: targetBytecodePC - | nothingToFlush label | - <var: #label type: #'AbstractInstruction *'> - "If there's nothing to flush then the stack state at this point is the same as that after - the check for interrupts and we can avoid generating the register reload code twice." - nothingToFlush := (self liveRegisters bitClear: (self registerMaskFor: FPReg)) = 0. - nothingToFlush ifTrue: - [label := self Label]. - self reconcileRegisterStateForBackwardJoin: (self fixupAt: targetBytecodePC). self MoveAw: coInterpreter stackLimitAddress R: TempReg. self CmpR: TempReg R: SPReg. "N.B. FLAGS := SPReg - TempReg" + self JumpAboveOrEqual: target. - self JumpAboveOrEqual: (self fixupAt: targetBytecodePC). self ssFlushTo: simStackPtr. self CallRT: ceCheckForInterruptTrampoline. self annotateBytecode: self Label. self flushLiveRegistersForSuspensionPoint. + self mergeCurrentSimStackWith: target forwards: false. + self Jump: target. - nothingToFlush - ifTrue: - [self Jump: label] - ifFalse: - [self reconcileRegisterStateForBackwardJoin: (self fixupAt: targetBytecodePC). - self Jump: (self fixupAt: targetBytecodePC)]. deadCode := true. "can't fall through" ^0! Item was changed: ----- Method: RegisterAllocatingCogit>>genStorePop:TemporaryVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean TemporaryVariable: tempIndex <inline: false> + | top srcRegOrNone destReg | + self deny: self duplicateRegisterAssignmentsInTemporaries. - | srcRegOrNone destReg | self ssFlushUpThroughTemporaryVariable: tempIndex. "To avoid a stall writing through destReg, remember srcReg before the potential ssPop: 1 in ssStorePop:toReg:" + top := self ssTop. + srcRegOrNone := top registerOrNone. - srcRegOrNone := self ssTop registerOrNone. "ssStorePop:toPreferredReg: will allocate a register, and indeed may allocate ReceiverResultReg if, for example, the ssEntry to be popped is already in ReceiverResultReg (as the result of a send). ReceiverResultReg is not a good choice for a temporary variable; it has other uses. So if the ssEntry at top of stack has ReceiverResultReg as its live variable, try and allocate an alternative." + destReg := (self simStackAt: tempIndex) liveRegister. + destReg ~= NoReg + ifTrue: + [self ssStorePop: popBoolean toReg: destReg] + ifFalse: + [((top type = SSConstant + or: [srcRegOrNone = NoReg + or: [self register: srcRegOrNone isInMask: self registerMaskUndesirableForTempVars]]) + and: [(destReg := self availableRegOrNoneNotConflictingWith: (self registerMaskUndesirableForTempVars bitOr: self liveRegisters)) ~= NoReg]) + ifTrue: [self ssStorePop: popBoolean toReg: destReg] + ifFalse: [destReg := self ssStorePop: popBoolean toPreferredReg: TempReg]. + "The ssStorePop: may end up assigning a register to ssTop, and if it is also a temp then a new + register must be found for the destination temp, sicne two temp vars can't share a register." + (top isFrameTempVar and: [top liveRegister = destReg]) ifTrue: + [srcRegOrNone := destReg. + destReg := self availableRegOrNoneNotConflictingWith: (self registerMaskUndesirableForTempVars bitOr: self liveRegisters). + destReg ~= NoReg ifTrue: + [self MoveR: srcRegOrNone R: destReg]]. + (destReg ~= NoReg and: [destReg ~= TempReg]) ifTrue: + [(self simStackAt: tempIndex) liveRegister: destReg. + self copyLiveRegisterToCopiesOf: (self simStackAt: tempIndex)]]. - ((self ssTop type = SSConstant - or: [self ssTop registerMaskOrNone anyMask: self registerMaskUndesirableForTempVars]) - and: [(destReg := self availableRegOrNoneNotConflictingWith: (self registerMaskUndesirableForTempVars bitOr: self liveRegisters)) ~= NoReg]) - ifTrue: [self ssStorePop: popBoolean toReg: destReg] - ifFalse: [destReg := self ssStorePop: popBoolean toPreferredReg: TempReg]. self MoveR: (srcRegOrNone ~= NoReg ifTrue: [srcRegOrNone] ifFalse: [destReg]) Mw: (self frameOffsetOfTemporary: tempIndex) r: FPReg. + self deny: self duplicateRegisterAssignmentsInTemporaries. - destReg ~= TempReg ifTrue: - [(self simStackAt: tempIndex) liveRegister: destReg. - self copyLiveRegisterToCopiesOf: (self simStackAt: tempIndex)]. ^0! Item was changed: ----- Method: RegisterAllocatingCogit>>mergeCurrentSimStackWith: (in category 'bytecode generator support') ----- mergeCurrentSimStackWith: fixup <var: #fixup type: #'BytecodeFixup *'> + | mergeSimStack currentEntry targetEntry | - | mergeSimStack direction currentEntry targetEntry | <var: #mergeSimStack type: #'SimStackEntry *'> "At a merge point the cogit expects the stack to be in the same state as mergeSimStack. mergeSimStack is the state as of some jump forward to this point. So make simStack agree with mergeSimStack (it is, um, problematic to plant code at the jump). Values may have to be assigned to registers. Registers may have to be swapped. The state of optStatus must agree." <var: #targetEntry type: #'SimStackEntry *'> <var: #currentEntry type: #'SimStackEntry *'> (mergeSimStack := fixup mergeSimStack) ifNil: [^self]. "Assignments amongst the registers must be made in order to avoid overwriting. If necessary exchange registers amongst simStack's entries to resolve any conflicts." self resolveRegisterOrderConflictsBetweenCurrentSimStackAnd: mergeSimStack. + self assert: (self conflictsResolvedBetweenSimStackAnd: mergeSimStack). + (self pushForMergeWith: mergeSimStack) - self assert: (self conflcitsResolvedBetweenSimStackAnd: mergeSimStack). - "Must determine if we will push or pop values. - If pushing values must enumerate from bottom to top. - If popping, must enumerate from top to bottom." - direction := self directionForMergeWith: mergeSimStack. - direction > 0 ifTrue: [0 to: simStackPtr do: [:i| currentEntry := self simStack: simStack at: i. targetEntry := self simStack: mergeSimStack at: i. (currentEntry reconcileForwardsWith: targetEntry) ifTrue: [self assert: i >= methodOrBlockNumArgs. self deassignRegisterForTempVar: targetEntry in: mergeSimStack]. "Note, we could update the simStack and spillBase here but that is done in restoreSimStackAtMergePoint: spilled ifFalse: [simSpillBase := i - 1]. simStack at: i put: (self cCode: [mergeSimStack at: i] inSmalltalk: [(mergeSimStack at: i) copy])"]] ifFalse: [simStackPtr to: 0 by: -1 do: [:i| currentEntry := self simStack: simStack at: i. targetEntry := self simStack: mergeSimStack at: i. (currentEntry reconcileForwardsWith: targetEntry) ifTrue: [self assert: i >= methodOrBlockNumArgs. self deassignRegisterForTempVar: targetEntry in: mergeSimStack]. "Note, we could update the simStack and spillBase here but that is done in restoreSimStackAtMergePoint: spilled ifFalse: [simSpillBase := i - 1]. simStack at: i put: (self cCode: [mergeSimStack at: i] inSmalltalk: [(mergeSimStack at: i) copy])"]]. "a.k.a. fixup isReceiverResultRegSelf: (fixup isReceiverResultRegSelf and: [optStatus isReceiverResultRegLive])" optStatus isReceiverResultRegLive ifFalse: [fixup isReceiverResultRegSelf: false]! Item was added: + ----- Method: RegisterAllocatingCogit>>mergeCurrentSimStackWith:forwards: (in category 'bytecode generator support') ----- + mergeCurrentSimStackWith: fixup forwards: forwards + "At a merge point the cogit expects the stack to be in the same state as mergeSimStack. + mergeSimStack is the state as of some jump forward or backward to this point. So make simStack agree + with mergeSimStack (it is, um, problematic to plant code at the jump). + Values may have to be assigned to registers. Registers may have to be swapped. + The state of optStatus must agree. + Generate code to merge the current simStack with that of the target fixup, + the goal being to keep as many registers live as possible. If the merge is forwards + registers can be deassigned (since registers are always written to temp vars). + But if backwards, nothing can be deassigned, and the state /must/ reflect the target." + "self printSimStack; printSimStack: fixup mergeSimStack" + <var: #fixup type: #'BytecodeFixup *'> + | startIndex mergeSimStack currentEntry targetEntry writtenToRegisters | + <var: #mergeSimStack type: #'SimStackEntry *'> + <var: #targetEntry type: #'SimStackEntry *'> + <var: #currentEntry type: #'SimStackEntry *'> + (mergeSimStack := fixup mergeSimStack) ifNil: [^self]. + startIndex := opcodeIndex. "for debugging" + "Assignments amongst the registers must be made in order to avoid overwriting. + If necessary exchange registers amongst simStack's entries to resolve any conflicts." + self resolveRegisterOrderConflictsBetweenCurrentSimStackAnd: mergeSimStack. + (self asserta: (self conflictsResolvedBetweenSimStackAnd: mergeSimStack)) ifFalse: + [Notification new tag: #failedMerge; signal]. + writtenToRegisters := 0. + (self pushForMergeWith: mergeSimStack) + ifTrue: + [methodOrBlockNumArgs to: simStackPtr do: + [:i| + currentEntry := self simStack: simStack at: i. + targetEntry := self simStack: mergeSimStack at: i. + writtenToRegisters := writtenToRegisters bitOr: targetEntry registerMask. + (currentEntry reconcileForwardsWith: targetEntry) ifTrue: + [self assert: i >= methodOrBlockNumArgs. + self deassignRegisterForTempVar: targetEntry in: mergeSimStack]. + "Note, we could update the simStack and spillBase here but that is done in restoreSimStackAtMergePoint: + spilled ifFalse: + [simSpillBase := i - 1]. + simStack + at: i + put: (self + cCode: [mergeSimStack at: i] + inSmalltalk: [(mergeSimStack at: i) copy])"]] + ifFalse: + [simStackPtr to: methodOrBlockNumArgs by: -1 do: + [:i| + currentEntry := self simStack: simStack at: i. + targetEntry := self simStack: mergeSimStack at: i. + writtenToRegisters := writtenToRegisters bitOr: targetEntry registerMask. + (currentEntry reconcileForwardsWith: targetEntry) ifTrue: + [self assert: i >= methodOrBlockNumArgs. + self deassignRegisterForTempVar: targetEntry in: mergeSimStack]. + "Note, we could update the simStack and spillBase here but that is done in restoreSimStackAtMergePoint: + spilled ifFalse: + [simSpillBase := i - 1]. + simStack + at: i + put: (self + cCode: [mergeSimStack at: i] + inSmalltalk: [(mergeSimStack at: i) copy])"]]. + methodOrBlockNumArgs - 1 to: 0 by: -1 do: + [:i| + targetEntry := self simStack: mergeSimStack at: i. + (targetEntry registerMask noMask: writtenToRegisters) ifTrue: + [currentEntry := self simStack: simStack at: i. + writtenToRegisters := writtenToRegisters bitOr: targetEntry registerMask. + (currentEntry reconcileForwardsWith: targetEntry) ifTrue: + [self assert: i >= methodOrBlockNumArgs. + self deassignRegisterForTempVar: targetEntry in: mergeSimStack]]]. + optStatus isReceiverResultRegLive ifFalse: + [forwards + ifTrue: "a.k.a. fixup isReceiverResultRegSelf: (fixup isReceiverResultRegSelf and: [optStatus isReceiverResultRegLive])" + [fixup isReceiverResultRegSelf: false] + ifFalse: + [fixup isReceiverResultRegSelf ifTrue: + [self putSelfInReceiverResultReg]]]! Item was changed: ----- Method: RegisterAllocatingCogit>>mergeWithFixupIfRequired: (in category 'simulation stack') ----- mergeWithFixupIfRequired: fixup "If this bytecode has a fixup, some kind of merge needs to be done. There are 4 cases: 1) the bytecode has no fixup (fixup isNotAFixup) do nothing 2) the bytecode has a non merge fixup the fixup has needsNonMergeFixup. The code generating non merge fixup (currently only special selector code) is responsible for the merge so no need to do it. We set deadCode to false as the instruction can be reached from jumps. 3) the bytecode has a merge fixup, but execution flow *cannot* fall through to the merge point. the fixup has needsMergeFixup and deadCode = true. ignores the current simStack as it does not mean anything restores the simStack to the state the jumps to the merge point expects it to be. 4) the bytecode has a merge fixup and execution flow *can* fall through to the merge point. the fixup has needsMergeFixup and deadCode = false. + Merge the state into the fixup's state via mergeCurrentSimStackWith:forwards:. - flushes the stack to the stack pointer so the fall through execution path simStack is - in the state the merge point expects it to be. - restores the simStack to the state the jumps to the merge point expects it to be. In addition, if this is a backjump merge point, we patch the fixup to hold the current simStackPtr for later assertions. self printSimStack: fixup mergeSimStack" <var: #fixup type: #'BytecodeFixup *'> "case 1" fixup notAFixup ifTrue: [^0]. "case 2" fixup isNonMergeFixup ifTrue: [deadCode ifTrue: [self deny: fixup simStackPtr isNil. simStackPtr := fixup simStackPtr. self restoreSimStackAtMergePoint: fixup. deadCode := false] ifFalse: [self flushRegistersOnlyLiveOnFallThrough: fixup]. ^0]. "cases 3 and 4" self assert: fixup isMergeFixup. self traceMerge: fixup. deadCode ifTrue: [simStackPtr := fixup simStackPtr] "case 3" + ifFalse: [self mergeCurrentSimStackWith: fixup forwards: true]. "case 4" - ifFalse: [self mergeCurrentSimStackWith: fixup]. "case 4" "cases 3 and 4" deadCode := false. fixup isBackwardBranchFixup ifTrue: [self assert: fixup mergeSimStack isNil. self setMergeSimStackOf: fixup]. fixup targetInstruction: self Label. self assert: simStackPtr = fixup simStackPtr. self cCode: '' inSmalltalk: [self assert: fixup simStackPtr = (self debugStackPointerFor: bytecodePC)]. self restoreSimStackAtMergePoint: fixup. ^0! Item was added: + ----- Method: RegisterAllocatingCogit>>pushForMergeWith: (in category 'bytecode generator support') ----- + pushForMergeWith: mergeSimStack + "Answer if values must be pushed from simStack to merge with mergeSimStack, otherwise < 0 (the default)." + <var: #mergeSimStack type: #'SimStackEntry *'> + <inline: true> + simStackPtr to: methodOrBlockNumArgs by: -1 do: + [:i| + (self simStack: mergeSimStack at: i) spilled ~=(self simStack: simStack at: i) spilled ifTrue: + [^(self simStack: mergeSimStack at: i) spilled]]. + ^false! Item was removed: - ----- Method: RegisterAllocatingCogit>>reconcileRegisterStateForBackwardJoin: (in category 'bytecode generator support') ----- - reconcileRegisterStateForBackwardJoin: fixup - <var: #fixup type: #'BytecodeFixup *'> - | fixupSimStack | - <var: #fixupSimStack type: #'SimStackEntry *'> - self assert: (optStatus ssEntry isSameEntryAs: (self addressOf: simSelf)). - fixup isReceiverResultRegSelf ifTrue: - [optStatus isReceiverResultRegLive ifFalse: - [optStatus ssEntry storeToReg: ReceiverResultReg]]. - fixupSimStack := fixup mergeSimStack. - simStackPtr to: 0 by: -1 do: - [:i| - self assert: (self simStackAt: i) spilled. - (self simStackAt: i) reconcileBackwardsWith: (self addressOf: (fixupSimStack at: i))]! Item was changed: ----- Method: SimpleStackBasedCogit>>frameOffsetOfTemporary: (in category 'bytecode generator support') ----- frameOffsetOfTemporary: index + ^self frameOffsetOfTemporary: index numArgs: methodOrBlockNumArgs! - ^index < methodOrBlockNumArgs - ifTrue: [FoxCallerSavedIP + ((methodOrBlockNumArgs - index) * objectMemory wordSize)] - ifFalse: [FoxMFReceiver - objectMemory wordSize + ((methodOrBlockNumArgs - index) * objectMemory wordSize)]! Item was added: + ----- Method: SimpleStackBasedCogit>>frameOffsetOfTemporary:numArgs: (in category 'bytecode generator support') ----- + frameOffsetOfTemporary: index numArgs: numArgs + <inline: true> + ^index < numArgs + ifTrue: [FoxCallerSavedIP + ((numArgs - index) * objectMemory wordSize)] + ifFalse: [FoxMFReceiver - objectMemory wordSize + ((numArgs - index) * objectMemory wordSize)]! Item was added: + ----- Method: SimpleStackBasedCogit>>temporaryIndexOfFrameOffset: (in category 'bytecode generator support') ----- + temporaryIndexOfFrameOffset: offset + ^self temporaryIndexOfFrameOffset: offset numArgs: methodOrBlockNumArgs! Item was added: + ----- Method: SimpleStackBasedCogit>>temporaryIndexOfFrameOffset:numArgs: (in category 'bytecode generator support') ----- + temporaryIndexOfFrameOffset: offset numArgs: numArgs + "For assert checking..." + ^numArgs - ((offset < 0 "args are > 0" + ifTrue: [offset - FoxMFReceiver + objectMemory wordSize] + ifFalse: [offset - FoxCallerSavedIP]) / objectMemory wordSize)!

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VM Maker: Cog-eem.336.mcz
by commits＠source.squeak.org 23 Feb '17

23 Feb '17

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.336.mcz ==================== Summary ==================== Name: Cog-eem.336 Author: eem Time: 22 February 2017, 3:40:22.065344 pm UUID: 57629034-08b1-4dcc-ad9a-3e69450bcdb6 Ancestors: Cog-eem.335 Add support for converting frame offsets and variable base offsets into temp and global var names. Add support for eliding the machine code bytes. Nuke an obsolete method. =============== Diff against Cog-eem.335 =============== Item was changed: ----- Method: BochsIA32Alien>>decorateDisassembly:for:fromAddress: (in category 'disassembly') ----- decorateDisassembly: anInstructionString for: aSymbolManager "<Cogit>" fromAddress: address | string i1 i2 v | string := anInstructionString. aSymbolManager relativeBaseForDisassemblyInto: [:baseAddress :baseName| string := baseName, '+', (address - baseAddress printStringBase: 16 length: 4 padded: true), (string copyFrom: (string indexOf: $:) + 1 to: string size)]. (i1 := string indexOfSubCollection: '%ds:0x') > 0 ifTrue: [i2 := i1 + 6. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. string := string copyReplaceFrom: i1 + 4 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 4 to: i2 - 1))]. (i1 := string indexOfSubCollection: '%ss:0x') > 0 ifTrue: [i2 := i1 + 6. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. ((string at: i2) = $( and: [(string at: i2 + 1) = $%]) ifTrue: [v := Integer readFrom: (ReadStream on: string from: i1 + 6 to: i2 - 1) base: 16. string := string copyReplaceFrom: i1 to: i2 - 1 with: ((v bitAnd: (1 bitShift: 31) - 1) - (v bitAnd: (1 bitShift: 31))) printString]]. (i1 := string indexOfSubCollection: '$0x') > 0 ifTrue: [i2 := i1 + 3. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. string := string copyReplaceFrom: i1 + 1 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 1 to: i2 - 1))]. ((i1 := string indexOf: $() > 1 and: [(string at: i1 + 1) isDigit and: [i1 < (i2 := string indexOf: $))]]) ifTrue: [string := string copyReplaceFrom: i1 + 1 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 1 to: i2 - 1))]. + PrintCodeBytes ifFalse: + [string := string copyFrom: 1 to: (string lastIndexOf: $:) - 2]. ^string! Item was removed: - ----- Method: BochsPlugin>>primitiveDisassembleAt:InMemory: (in category 'primitives') ----- - "cpuAlien <BochsIA32|X86Alien>" primitiveDisassembleAt: address "<Integer>" InMemory: memory "<Bitmap|ByteArray|WordArray>" - "Return an Array of the instruction length and its decompilation as a string for the instruction at address in memory." - | cpuAlien cpu instrLenOrErr resultObj log logLen logObj logObjData | - <var: #cpu type: #'void *'> - <var: #log type: #'char *'> - <var: #logLen type: #long> - <var: #logObjData type: #'char *'> - cpuAlien := self primitive: #primitiveDisassembleAtInMemory - parameters: #(Unsigned WordsOrBytes) - receiver: #Oop. - (cpu := self cCoerceSimple: (self startOfData: cpuAlien) to: #'void *') = 0 ifTrue: - [^interpreterProxy primitiveFailFor: PrimErrBadReceiver]. - instrLenOrErr := self disassembleFor: cpu - At: address - In: memory - Size: (interpreterProxy byteSizeOf: memory cPtrAsOop). - instrLenOrErr < 0 ifTrue: - [^interpreterProxy primitiveFailFor: PrimErrInappropriate]. - log := self getlog: (self cCode: [self addressOf: logLen] inSmalltalk: [logLen := 0]). - resultObj := interpreterProxy instantiateClass: interpreterProxy classArray indexableSize: 2. - resultObj = 0 ifTrue: - [^interpreterProxy primitiveFailFor: PrimErrNoMemory]. - - "Easier keeping the damn thing on the stack than using pushRemappableOop:/popRemappableOop. - Where is topRemappableOop when you need it?" - interpreterProxy pushRemappableOop: resultObj. - logObj := interpreterProxy - instantiateClass: interpreterProxy classString - indexableSize: logLen. - interpreterProxy failed ifTrue: - [interpreterProxy popRemappableOop. - ^interpreterProxy primitiveFailFor: PrimErrNoMemory]. - logObjData := interpreterProxy arrayValueOf: logObj. - self mem: logObjData cp: log y: logLen. - resultObj := interpreterProxy popRemappableOop. - interpreterProxy - storePointer: 0 - ofObject: resultObj - withValue: (interpreterProxy integerObjectOf: instrLenOrErr). - interpreterProxy storePointer: 1 ofObject: resultObj withValue: logObj. - - ^resultObj! Item was changed: ----- Method: BochsX64Alien>>decorateDisassembly:for:fromAddress: (in category 'disassembly') ----- decorateDisassembly: anInstructionString for: aSymbolManager "<Cogit>" fromAddress: address | string i1 i2 v extra | + string := PrintCodeBytes + ifTrue: [anInstructionString] + ifFalse: [anInstructionString copyFrom: 1 to: (anInstructionString lastIndexOf: $:) - 1]. "trailing space useful for parsing numbers" - string := anInstructionString. aSymbolManager relativeBaseForDisassemblyInto: [:baseAddress :baseName| string := baseName, '+', (address - baseAddress printStringBase: 16 length: 4 padded: true), (string copyFrom: (string indexOf: $:) + 1 to: string size)]. ((i1 := string indexOfSubCollection: '%ds:(') > 0 or: [(i1 := string indexOfSubCollection: '%ss:(') > 0]) ifTrue: [string := string copyReplaceFrom: i1 to: i1 + 3 with: '']. (i1 := string indexOfSubCollection: '%ds:0x') > 0 ifTrue: [i2 := i1 + 6. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. (v := string copyFrom: i2 to: (i2 + 5 min: string size)) = '(%rbx)' ifTrue: [v := Integer readFrom: (ReadStream on: string from: i1 + 6 to: i2 - 1) base: 16. (aSymbolManager lookupAddress: aSymbolManager varBaseAddress + v) ifNotNil: [:varName| extra := ' = ', varName]]. v = '(%rip)' ifTrue: + [v := anInstructionString size - (anInstructionString lastIndexOf: $:) - 1 / 3. "Count number of instruction bytes to find size of instruction" - [v := string size - (string indexOf: $: startingAt: i2 + 5) - 1 / 3. "Count number of instruction bytes to find size of instruction" v := v + address. "Add address of instruction" v := v + (Integer readFrom: (ReadStream on: string from: i1 + 6 to: i2 - 1) base: 16) signedIntFromLong64. "Add offset to yield pc-relative address" (aSymbolManager lookupAddress: v) ifNotNil: [:methodName| extra := ' = ', methodName]]. string := string copyReplaceFrom: i1 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 4 to: i2 - 1))]. (i1 := string indexOfSubCollection: '%ss:0x') > 0 ifTrue: [i2 := i1 + 6. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. ((string at: i2) = $( + and: [(string at: i2 + 1) = $%]) ifTrue: - and: [(string at: i2 + 1) = $%]) ifTrue: [v := Integer readFrom: (ReadStream on: string from: i1 + 6 to: i2 - 1) base: 16. + v := (v bitAnd: (1 bitShift: 31) - 1) - (v bitAnd: (1 bitShift: 31)). + ((string copyFrom: i2 to: (i2 + 5 min: string size)) = '(%rbp)' and: [PrintTempNames]) ifTrue: + [(aSymbolManager lookupFrameOffset: v) ifNotNil: + [:varName| string := string copyReplaceFrom: i1 to: i2 - 1 with: varName. i2 := 0]. + i2 ~= 0 ifTrue: [string := string copyReplaceFrom: i1 to: i2 - 1 with: v printString]]]]. - string := string - copyReplaceFrom: i1 - to: i2 - 1 - with: ((v bitAnd: (1 bitShift: 31) - 1) - (v bitAnd: (1 bitShift: 31))) printString]]. (i1 := string indexOfSubCollection: '$0x') > 0 ifTrue: [i2 := i1 + 3. ['0123456789abcdef' includes: (string at: i2)] whileTrue: [i2 := i2 + 1]. string := string copyReplaceFrom: i1 + 1 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 1 to: i2 - 1))]. ((i1 := string indexOf: $() > 1 and: [(string at: i1 + 1) isDigit and: [i1 < (i2 := string indexOf: $))]]) ifTrue: [string := string copyReplaceFrom: i1 + 1 to: i2 - 1 with: (aSymbolManager lookupCHexString: (string copyFrom: i1 + 1 to: i2 - 1)). i1 := string indexOfSubCollection: '+0x'. "calls & jumps" i1 > 0 ifTrue: [v := Integer readFrom: (i2 := ReadStream on: string from: i1 + 3 to: string size) base: 16. v := ((v bitAnd: (1 bitShift: 63) - 1) - (v bitAnd: (1 bitShift: 63))) printStringRadix: 16. v := v first = $1 ifTrue: [v copyReplaceFrom: 1 to: 3 with: '+0x'] ifFalse: [v copyReplaceFrom: 2 to: 4 with: '0x']. string := string copyReplaceFrom: i1 to: i2 position with: v]]. ^extra ifNil: [string] + ifNotNil: + [PrintCodeBytes + ifTrue: [i1 := string lastIndexOf: $:. + string copyReplaceFrom: i1 - 1 to: i1 - 2 with: extra] + ifFalse: [string, ';', extra]]! - ifNotNil: [i1 := string lastIndexOf: $:. string copyReplaceFrom: i1 - 1 to: i1 - 2 with: extra]! Item was changed: Alien variableByteSubclass: #CogProcessorAlien instanceVariableNames: '' + classVariableNames: 'PrintCodeBytes PrintTempNames SavedState' - classVariableNames: 'SavedState' poolDictionaries: '' category: 'Cog-Processors'! !CogProcessorAlien commentStamp: 'lw 8/23/2012 19:15' prior: 0! I am the superclass for the Simulation CPU instance wrappers. I ensure that methods used in both/all of them need not be copied.! Item was changed: ----- Method: CogProcessorAlien class>>initialize (in category 'class initialization') ----- initialize + PrintCodeBytes ifNil: [PrintCodeBytes := true]. "Does disassembly include code bytes?" + PrintTempNames ifNil: [PrintTempNames := false]. "Does disassembly include temp names?" SavedState := WeakIdentityKeyDictionary new. Smalltalk addToStartUpList: self; addToShutDownList: self! Item was added: + ----- Method: CogProcessorAlien class>>printCodeBytes (in category 'accessing') ----- + printCodeBytes + <preference: 'Does disassembly include code bytes' + category: 'Cogit' + description: 'If true, assembly will include machine code bytes..' + type: #Boolean> + ^PrintCodeBytes ifNil: [true]! Item was added: + ----- Method: CogProcessorAlien class>>printCodeBytes: (in category 'accessing') ----- + printCodeBytes: aBoolean + PrintCodeBytes := aBoolean! Item was added: + ----- Method: CogProcessorAlien class>>printTempNames (in category 'accessing') ----- + printTempNames + <preference: 'Does disassembly include temp names?' + category: 'Cogit' + description: 'If true, assembly will try and associate frame-relative offsets as temp names.' + type: #Boolean> + ^PrintTempNames ifNil: [false]! Item was added: + ----- Method: CogProcessorAlien class>>printTempNames: (in category 'accessing') ----- + printTempNames: aBoolean + PrintTempNames := aBoolean! Item was removed: - ----- Method: GdbARMPlugin>>primitiveDisassembleAt:InMemory: (in category 'primitives') ----- - "cpuAlien <GdbARMAlien>" primitiveDisassembleAt: address "<Integer>" InMemory: memory "<Bitmap|ByteArray|WordArray>" - "Return an Array of the instruction length and its decompilation as a string for the instruction at address in memory." - | cpuAlien cpu instrLenOrErr resultObj log logLen logObj logObjData | - <var: #cpu type: #'void *'> - cpuAlien := self primitive: #primitiveDisassembleAtInMemory - parameters: #(Unsigned WordsOrBytes) - receiver: #Oop. - (cpu := self startOfData: cpuAlien) = 0 ifTrue: - [^interpreterProxy primitiveFailFor: PrimErrBadReceiver]. - instrLenOrErr := self disassembleFor: cpu - At: address - In: memory - Size: (interpreterProxy byteSizeOf: memory cPtrAsOop). - instrLenOrErr < 0 ifTrue: - [^interpreterProxy primitiveFailFor: PrimErrInappropriate]. - log := self getlog: (self cCode: [self addressOf: logLen] inSmalltalk: [logLen := 0]). - resultObj := interpreterProxy instantiateClass: interpreterProxy classArray indexableSize: 2. - resultObj = 0 ifTrue: - [^interpreterProxy primitiveFailFor: PrimErrNoMemory]. - - "Easier keeping the damn thing on the stack than using pushRemappableOop:/popRemappableOop. - Where is topRemappableOop when you need it?" - interpreterProxy pushRemappableOop: resultObj. - logObj := interpreterProxy - instantiateClass: interpreterProxy classString - indexableSize: logLen. - interpreterProxy failed ifTrue: - [interpreterProxy popRemappableOop. - ^interpreterProxy primitiveFailFor: PrimErrNoMemory]. - logObjData := interpreterProxy arrayValueOf: logObj. - self mem: logObjData cp: log y: logLen. - resultObj := interpreterProxy popRemappableOop. - interpreterProxy - storePointer: 0 - ofObject: resultObj - withValue: (interpreterProxy integerObjectOf: instrLenOrErr). - interpreterProxy storePointer: 1 ofObject: resultObj withValue: logObj. - - ^resultObj!

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VM Maker: VMMaker.oscog-EstebanLorenzano.2136.mcz
by commits＠source.squeak.org 22 Feb '17

22 Feb '17

Esteban Lorenzano uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-EstebanLorenzano.2136.mcz ==================== Summary ==================== Name: VMMaker.oscog-EstebanLorenzano.2136 Author: EstebanLorenzano Time: 22 February 2017, 4:10:00.203815 pm UUID: 40534c32-ca6b-4e97-91ec-31d509e49b0c Ancestors: VMMaker.oscog-rsf.2135, VMMaker.oscog-HolgerHansPeterFreyther.2135 Address fortify issue in printf printf(variable) is dangerous as variable can contain escape sequences. Change the code to define print to printf("%s", s) as seen in other >>#print: implementations. this is necesary to allow packaging of VM in debian (they will reject the source if it is not commited with this protection) =============== Diff against VMMaker.oscog-rsf.2135 =============== Item was changed: ----- Method: Cogit>>print: (in category 'printing') ----- print: aString + <cmacro: '(aString) printf("%s", aString)'> - <cmacro: '(aString) printf(aString)'> coInterpreter transcript print: aString! Item was changed: ----- Method: MiscPrimitivePlugin class>>translatedPrimitivesForPharo (in category 'translation') ----- translatedPrimitivesForPharo ^#( (Bitmap compress:toByteArray:) (Bitmap decompress:fromByteArray:at:) (Bitmap encodeBytesOf:in:at:) (Bitmap encodeInt:in:at:) (ByteString compare:with:collated:) (ByteString translate:from:to:table:) (ByteString findFirstInString:inSet:startingAt:) (ByteString indexOfAscii:inString:startingAt:) (String findSubstringViaPrimitive:in:startingAt:matchTable:) (ByteArray hashBytes:startingWith:) (SampledSound convert8bitSignedFrom:to16Bit:) )!

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IMPORTANT: GCC 6 generates position independent executables by default on Linux
by Ronie Salgado 22 Feb '17

22 Feb '17

Hello, I was debugging a strange crash when calling sqrt via a Lowcode instruction in the interpreter, which I tracked to currentBytecode stored in register(EBX), having a very large value. When debugging the generated assembly code with GDB, I noticed that GCC was generating position independent code and using EBX for doing a call without spilling/unspilling its value. By googling, it seems that position independent executable generation was turned on GCC 6 by default ( https://www.open-mesh.org/issues/304 ). To disable PIE, we have to compile the sources with -fno-pie and link with the -no-pie options. Best regards, Ronie

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[OpenSmalltalk/opensmalltalk-vm]
by GitHub 21 Feb '17

21 Feb '17

Branch: refs/heads/jpeg_win64_fix Home: https://github.com/OpenSmalltalk/opensmalltalk-vm

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Vm-dev February 2017