Vm-dev April 2015

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VM Maker: VMMaker.oscog-cb.1272.mcz
by commits＠source.squeak.org 29 Apr '15

29 Apr '15

ClementBera uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1272.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1272 Author: cb Time: 29 April 2015, 2:46:41.805 pm UUID: 45c8bdbc-d974-494f-a827-27ce49c06790 Ancestors: VMMaker.oscog-cb.1271 Isolate more super sends that were triggering bugs in C code generation. =============== Diff against VMMaker.oscog-cb.1271 =============== Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorComparison (in category 'bytecode generators') ----- genSpecialSelectorComparison "Override to count inlined branches if followed by a conditional branch. We borrow the following conditional branch's counter and when about to inline the comparison we decrement the counter (without writing it back) and if it trips simply abort the inlining, falling back to the normal send which will then continue to the conditional branch which will trip and enter the abort." | nextPC postBranchPC targetBytecodePC primDescriptor branchDescriptor rcvrIsInt argIsInt rcvrInt argInt result jumpNotSmallInts inlineCAB annotateInst counterAddress countTripped counterReg | <var: #countTripped type: #'AbstractInstruction *'> <var: #primDescriptor type: #'BytecodeDescriptor *'> <var: #jumpNotSmallInts type: #'AbstractInstruction *'> <var: #branchDescriptor type: #'BytecodeDescriptor *'> + (coInterpreter isOptimizedMethod: methodObj) ifTrue: [ ^ self genSpecialSelectorComparisonWithoutCounters ]. - (coInterpreter isOptimizedMethod: methodObj) ifTrue: [ ^ self genUnoptimizedSpecialSelectorComparison ]. self ssFlushTo: simStackPtr - 2. primDescriptor := self generatorAt: byte0. argIsInt := self ssTop type = SSConstant and: [objectMemory isIntegerObject: (argInt := self ssTop constant)]. rcvrIsInt := (self ssValue: 1) type = SSConstant and: [objectMemory isIntegerObject: (rcvrInt := (self ssValue: 1) constant)]. "short-cut the jump if operands are SmallInteger constants." (argIsInt and: [rcvrIsInt]) ifTrue: [self cCode: '' inSmalltalk: "In Simulator ints are unsigned..." [rcvrInt := objectMemory integerValueOf: rcvrInt. argInt := objectMemory integerValueOf: argInt]. primDescriptor opcode caseOf: { [JumpLess] -> [result := rcvrInt < argInt]. [JumpLessOrEqual] -> [result := rcvrInt <= argInt]. [JumpGreater] -> [result := rcvrInt > argInt]. [JumpGreaterOrEqual] -> [result := rcvrInt >= argInt]. [JumpZero] -> [result := rcvrInt = argInt]. [JumpNonZero] -> [result := rcvrInt ~= argInt] }. "Must enter any annotatedConstants into the map" self annotateBytecodeIfAnnotated: (self ssValue: 1). self annotateBytecodeIfAnnotated: self ssTop. "Must annotate the bytecode for correct pc mapping." self ssPop: 2. ^self ssPushAnnotatedConstant: (result ifTrue: [objectMemory trueObject] ifFalse: [objectMemory falseObject])]. self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. "Only interested in inlining if followed by a conditional branch." inlineCAB := branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]. "Further, only interested in inlining = and ~= if there's a SmallInteger constant involved. The relational operators successfully statically predict SmallIntegers; the equality operators do not." (inlineCAB and: [primDescriptor opcode = JumpZero or: [primDescriptor opcode = JumpNonZero]]) ifTrue: [inlineCAB := argIsInt or: [rcvrIsInt]]. inlineCAB ifFalse: [^self genSpecialSelectorSend]. argIsInt ifTrue: [(self ssValue: 1) popToReg: ReceiverResultReg. annotateInst := self ssTop annotateUse. self ssPop: 2. self MoveR: ReceiverResultReg R: TempReg] ifFalse: [self marshallSendArguments: 1. self MoveR: Arg0Reg R: TempReg. rcvrIsInt ifFalse: [objectRepresentation isSmallIntegerTagNonZero ifTrue: [self AndR: ReceiverResultReg R: TempReg] ifFalse: [self OrR: ReceiverResultReg R: TempReg]]]. jumpNotSmallInts := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. counterReg := self allocateRegNotConflictingWith: (self registerMaskFor: ReceiverResultReg and: Arg0Reg). self genExecutionCountLogicInto: [ :cAddress :countTripBranch | counterAddress := cAddress. countTripped := countTripBranch ] counterReg: counterReg. argIsInt ifTrue: [annotateInst ifTrue: [self annotateBytecode: (self CmpCq: argInt R: ReceiverResultReg)] ifFalse: [self CmpCq: argInt R: ReceiverResultReg]] ifFalse: [self CmpR: Arg0Reg R: ReceiverResultReg]. "Cmp is weird/backwards so invert the comparison. Further since there is a following conditional jump bytecode define non-merge fixups and leave the cond bytecode to set the mergeness." self gen: (branchDescriptor isBranchTrue ifTrue: [primDescriptor opcode] ifFalse: [self inverseBranchFor: primDescriptor opcode]) operand: (self ensureNonMergeFixupAt: targetBytecodePC - initialPC) asUnsignedInteger. self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress. self Jump: (self ensureNonMergeFixupAt: postBranchPC - initialPC). countTripped jmpTarget: (jumpNotSmallInts jmpTarget: self Label). argIsInt ifTrue: [self MoveCq: argInt R: Arg0Reg]. ^self genMarshalledSend: (coInterpreter specialSelector: byte0 - self firstSpecialSelectorBytecodeOffset) numArgs: 1 sendTable: ordinarySendTrampolines! Item was added: + ----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorComparisonWithoutCounters (in category 'bytecode generators') ----- + genSpecialSelectorComparisonWithoutCounters + "This method is there because if I put directly the super send in genSpecialSelectorComparison Slang does not correctly translte the code to C, it does not correctly type one of the branchDescriptor to BytecodeDescriptor" + ^ super genSpecialSelectorComparison! Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorEqualsEqualsWithForwarders (in category 'bytecode generators') ----- genSpecialSelectorEqualsEqualsWithForwarders "Override to count inlined branches if followed by a conditional branch. We borrow the following conditional branch's counter and when about to inline the comparison we decrement the counter (without writing it back) and if it trips simply abort the inlining, falling back to the normal send which will then continue to the conditional branch which will trip and enter the abort." | nextPC postBranchPC targetBytecodePC branchDescriptor label counterReg fixup counterAddress countTripped unforwardArg unforwardRcvr argReg rcvrReg regMask | <var: #fixup type: #'BytecodeFixup *'> <var: #countTripped type: #'AbstractInstruction *'> <var: #label type: #'AbstractInstruction *'> <var: #primDescriptor type: #'BytecodeDescriptor *'> <var: #branchDescriptor type: #'BytecodeDescriptor *'> + ((coInterpreter isOptimizedMethod: methodObj) or: [needsFrame not]) ifTrue: [ ^ self genSpecialSelectorEqualsEqualsWithForwardersWithoutCounters ]. - ((coInterpreter isOptimizedMethod: methodObj) or: [needsFrame not]) ifTrue: [ ^ super genSpecialSelectorEqualsEquals ]. regMask := 0. self extractMaybeBranchDescriptorInto: [ :descr :next :postBranch :target | branchDescriptor := descr. nextPC := next. postBranchPC := postBranch. targetBytecodePC := target ]. unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not. unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not. "If an operand is an annotable constant, it may be forwarded, so we need to store it into a register so the forwarder check can jump back to the comparison after unforwarding the constant. However, if one of the operand is an unnanotable constant, does not allocate a register for it (machine code will use operations on constants)." self allocateEqualsEqualsRegistersArgNeedsReg: unforwardArg rcvrNeedsReg: unforwardRcvr into: [ :rcvr :arg | rcvrReg:= rcvr. argReg := arg ]. argReg ifNotNil: [ regMask := self registerMaskFor: argReg ]. rcvrReg ifNotNil: [ regMask := regMask bitOr: (self registerMaskFor: rcvrReg) ]. "Only interested in inlining if followed by a conditional branch." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: [^ self genEqualsEqualsNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg]. counterReg := self allocateRegNotConflictingWith: regMask. self genExecutionCountLogicInto: [ :cAddress :countTripBranch | counterAddress := cAddress. countTripped := countTripBranch ] counterReg: counterReg. self assert: (unforwardArg or: [ unforwardRcvr ]). "If branching the stack must be flushed for the merge" self ssFlushTo: simStackPtr - 2. label := self Label. self genEqualsEqualsComparisonArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. self ssPop: 2. "pop by 2 temporarily for the fixups" branchDescriptor isBranchTrue ifTrue: [ fixup := self ensureNonMergeFixupAt: postBranchPC - initialPC. self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC - initialPC) asUnsignedInteger. ] ifFalse: [ fixup := self ensureNonMergeFixupAt: targetBytecodePC - initialPC. self JumpZero: (self ensureNonMergeFixupAt: postBranchPC - initialPC) asUnsignedInteger. ]. unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ]. unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg jumpBackTo: label ]. self ssPop: -2. self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress. self Jump: fixup. countTripped jmpTarget: self Label. "inlined version of #== ignoring the branchDescriptor if the counter trips to have normal state for the optimizer" self genEqualsEqualsNoBranchArgIsConstant: unforwardArg not rcvrIsConstant: unforwardRcvr not argReg: argReg rcvrReg: rcvrReg. ^ 0! Item was added: + ----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorEqualsEqualsWithForwardersWithoutCounters (in category 'bytecode generators') ----- + genSpecialSelectorEqualsEqualsWithForwardersWithoutCounters + "This method is there because if I put directly the super send in genSpecialSelectorComparison Slang does not correctly translte the code to C, it does not correctly type one of the branchDescriptor to BytecodeDescriptor" + ^ super genSpecialSelectorEqualsEqualsWithForwarders!

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VM Maker: VMMaker.oscog-cb.1271.mcz
by commits＠source.squeak.org 29 Apr '15

29 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1271.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1271 Author: cb Time: 29 April 2015, 10:33:32.261 am UUID: d1d8e36f-01bc-4d38-b9a2-6a5188c5e3cc Ancestors: VMMaker.oscog-eem.1270 In fact in genJumpIf we always reload the counterReg after the trampoline after the jump back to retry. No need to add logic there. Fix the bug that #== was marked as mapped whereas it should not thanks to Eliot. The SistaSimulator runs without assertion failures. I'm going to try to recompile it now. =============== Diff against VMMaker.oscog-eem.1270 =============== Item was removed: - ----- Method: SistaStackToRegisterMappingCogit class>>generatorTableFrom: (in category 'class initialization') ----- - generatorTableFrom: anArray - "Override to replace the unmapped, non-counting inlined #== with a mapped counting inlined #==." - | table | - table := super generatorTableFrom: anArray. - table object do: - [:descriptor| - descriptor generator == #genSpecialSelectorEqualsEquals ifTrue: - [descriptor - isMapped: true; - isMappedInBlock: true; - needsFrameFunction: nil]]. - ^table! Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genJumpIf:to: (in category 'bytecode generator support') ----- genJumpIf: boolean to: targetBytecodePC "The heart of performance counting in Sista. Conditional branches are 6 times less frequent than sends and can provide basic block frequencies (send counters can't). Each conditional has a 32-bit counter split into an upper 16 bits counting executions and a lower half counting untaken executions of the branch. Executing the branch decrements the upper half, tripping if the count goes negative. Not taking the branch decrements the lower half. N.B. We *do not* eliminate dead branches (true ifTrue:/true ifFalse:) so that scanning for send and branch data is simplified and that branch data is correct." <inline: false> | desc ok counterAddress countTripped retry counterReg | <var: #ok type: #'AbstractInstruction *'> <var: #desc type: #'CogSimStackEntry *'> <var: #retry type: #'AbstractInstruction *'> <var: #countTripped type: #'AbstractInstruction *'> (coInterpreter isOptimizedMethod: methodObj) ifTrue: [ ^ super genJumpIf: boolean to: targetBytecodePC ]. self ssFlushTo: simStackPtr - 1. desc := self ssTop. self ssPop: 1. desc popToReg: TempReg. "We prefer calleeSaved to avoid saving it across the trap trip trampoline" counterReg := self allocateRegPreferringCalleeSavedNotConflictingWith: 0. retry := self Label. self genExecutionCountLogicInto: [ :cAddress :countTripBranch | counterAddress := cAddress. countTripped := countTripBranch ] counterReg: counterReg. counterIndex := counterIndex + 1. "Cunning trick by LPD. If true and false are contiguous subtract the smaller. Correct result is either 0 or the distance between them. If result is not 0 or their distance send mustBeBoolean." self assert: (objectMemory objectAfter: objectMemory falseObject) = objectMemory trueObject. self annotate: (self SubCw: boolean R: TempReg) objRef: boolean. self JumpZero: (self ensureFixupAt: targetBytecodePC - initialPC). self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress. self CmpCq: (boolean == objectMemory falseObject ifTrue: [objectMemory trueObject - objectMemory falseObject] ifFalse: [objectMemory falseObject - objectMemory trueObject]) R: TempReg. ok := self JumpZero: 0. self MoveCq: 0 R: counterReg. "if counterReg is 0 this is a mustBeBoolean, not a counter trip." - self flag: 'Hi Clément. You can''t just save things to the Smalltalk stack. You can /only/ save things that execution expects to be there on a context''s stack, because this frame may get mapped to a context object and then back, and gc''ed etc. The counter reg does not contain an object so is a complete no-no on the Smalltalk stack. On the C stack in the trampoline is OK, not on the Smalltalk stack in method execution. So instead of saving and restoring the counterReg around the call, something we can''t do, we can reload it after the call'. - false ifTrue: - ["If counterReg is caller saved then save it" - (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ self PushR: counterReg ]]. - countTripped jmpTarget: (self CallRT: (boolean == objectMemory falseObject ifTrue: [ceSendMustBeBooleanAddFalseTrampoline] ifFalse: [ceSendMustBeBooleanAddTrueTrampoline])). "If we're in an image which hasn't got the Sista code loaded then the ceCounterTripped: trampoline will return directly to machine code, returning the boolean. So the code should jump back to the retry point. The trampoline makes sure that TempReg has been reloaded." self annotateBytecode: self Label. - self flag: 'see above'. - false ifTrue: - ["If counterReg is caller saved then restore it" - (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ self PopR: counterReg ]]. - - "Note we /can't/ save and restore the counterReg's contents around the call since the stack can - only contain what an interpreted context's stack would contain at the corresponding point. The - counter is not an object, so can't be written to the stack. Hence we reload it after the call." - self MoveAw: counterAddress R: counterReg. - self Jump: retry. + ok jmpTarget: self Label. ^0!

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Re: [Vm-dev] VM Maker: VMMaker.oscog-eem.1270.mcz
by Eliot Miranda 29 Apr '15

29 Apr '15

Hi Clément, the issue with the assert fail on starting the current Sista is one of incorrect pc mapping. The only difference between SistaStackToRegisterMappingCogit and StackToRegisterMappingCogit is that in the Sista cogit #== is mapped, see SistaStackToRegisterMappingCogit class>>generatorTableFrom: anArray "Override to replace the unmapped, non-counting inlined #== with a mapped counting inlined #==." | table | table := super generatorTableFrom: anArray. table object do: [:descriptor| descriptor generator == #genSpecialSelectorEqualsEquals ifTrue: [descriptor isMapped: true; isMappedInBlock: true; needsFrameFunction: nil]]. ^table Loking at what you've done I guess you've removed the need to map #== mapped, in which case the above should be deleted and #== unmapped. But looking at the generated code for #== followed by a jump I can't understand how the code works. What I see is counting instructions followed by the #== comparison, as in SistaStackToRegisterMappingCogit genAndDis: IdentityDictionary>>#scanFor: options: #( SistaVM true ObjectMemory Spur32BitCoMemoryManager MULTIPLEBYTECODESETS true ISA IA32 bytecodeTableInitializer initializeBytecodeTableForSqueakV3PlusClosuresSistaV1Hybrid) which generates the following for the "(element := array at: index) == nil" #== comparison: 000014c6: movl $0x00100098=#at:, %ecx : B9 98 00 10 00 000014cb: call .+0xffffefa0 (0x00000470=ceSend1Args) : E8 A0 EF FF FF IsSendCall bc 49/50: 000014d0: movl %edx, -24(%ebp) : 89 55 E8 do the "executed jump" count for the following jump: 000014d3: movl %ds:0x40090, %edi : 8B 3D 90 00 04 00 000014d9: subl $0x00010000, %edi : 81 EF 00 00 01 00 "If the count trips, jump to a second occurrence of the comparison code" 000014df: jb .+0x00000035 (0x00001516) : 72 35 "write back modified count" 000014e1: movl %edi, %ds:0x40090 : 89 3D 90 00 04 00 "do the #== nil comparison" 000014e7: cmpl $0x00100000=nil, %edx : 81 FA 00 00 10 00 "jump to the #== nil being true continuation" 000014ed: jz .+0x00000086 (0x00001579) : 0F 84 86 00 00 00 "fall throguh to unforwarding code given that the #== nil could be false because of forwarding, and it should be retried" 000014f3: movl %edx, %eax : 89 D0 000014f5: andl $0x00000003, %eax : 83 E0 03 000014f8: jnz .+0x0000000e (0x00001508) : 75 0E What I don't understand is if you trip the count how is the #== ever executed? Don't you just continue assuming the result was either true or false? That can't be right. So I'm confused and hence I haven't deleted the generatorTableFrom: method. I don't understand the code and so shouldn't mess with it :) On Tue, Apr 28, 2015 at 5:12 PM, <commits(a)source.squeak.org> wrote: > > Eliot Miranda uploaded a new version of VMMaker to project VM Maker: > http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1270.mcz > > ==================== Summary ==================== > > Name: VMMaker.oscog-eem.1270 > Author: eem > Time: 28 April 2015, 5:11:29.049 pm > UUID: a6737c7e-fb6b-4fe9-a44e-6b01396cff34 > Ancestors: VMMaker.oscog-eem.1269 > > Nuke obsolete printMcpc:Bcpc:on: > > Correct SistaStackToRegisterMappingCogit>>genJumpIf:to: > to reload counterReg instead of saving and > restoring it around counter callback trampoline. > > =============== Diff against VMMaker.oscog-eem.1269 =============== > > Item was removed: > - ----- Method: Cogit>>printMcpc:Bcpc:on: (in category 'method map') ----- > - printMcpc: mcpc Bcpc: bcpc on: aStream > - <doNotGenerate> > - aStream ensureCr. > - mcpc printOn: aStream base: 16. > - aStream space; tab; print: bcpc; cr; flush. > - ^0! > > Item was changed: > ----- Method: SistaStackToRegisterMappingCogit>>genJumpIf:to: (in > category 'bytecode generator support') ----- > genJumpIf: boolean to: targetBytecodePC > "The heart of performance counting in Sista. Conditional branches > are 6 times less > frequent than sends and can provide basic block frequencies (send > counters can't). > Each conditional has a 32-bit counter split into an upper 16 bits > counting executions > and a lower half counting untaken executions of the branch. > Executing the branch > decrements the upper half, tripping if the count goes negative. > Not taking the branch > decrements the lower half. N.B. We *do not* eliminate dead > branches (true ifTrue:/true ifFalse:) > so that scanning for send and branch data is simplified and that > branch data is correct." > <inline: false> > | desc ok counterAddress countTripped retry counterReg | > <var: #ok type: #'AbstractInstruction *'> > <var: #desc type: #'CogSimStackEntry *'> > <var: #retry type: #'AbstractInstruction *'> > <var: #countTripped type: #'AbstractInstruction *'> > > (coInterpreter isOptimizedMethod: methodObj) ifTrue: [ ^ super > genJumpIf: boolean to: targetBytecodePC ]. > > self ssFlushTo: simStackPtr - 1. > desc := self ssTop. > self ssPop: 1. > desc popToReg: TempReg. > + > - > "We prefer calleeSaved to avoid saving it across the trap trip > trampoline" > counterReg := self > allocateRegPreferringCalleeSavedNotConflictingWith: 0. > retry := self Label. > self > genExecutionCountLogicInto: [ :cAddress :countTripBranch | > counterAddress := cAddress. > countTripped := countTripBranch ] > counterReg: counterReg. > counterIndex := counterIndex + 1. > + > - > "Cunning trick by LPD. If true and false are contiguous subtract > the smaller. > Correct result is either 0 or the distance between them. If > result is not 0 or > their distance send mustBeBoolean." > self assert: (objectMemory objectAfter: objectMemory falseObject) > = objectMemory trueObject. > self annotate: (self SubCw: boolean R: TempReg) objRef: boolean. > self JumpZero: (self ensureFixupAt: targetBytecodePC - initialPC). > > self genFallsThroughCountLogicCounterReg: counterReg > counterAddress: counterAddress. > > self CmpCq: (boolean == objectMemory falseObject > ifTrue: [objectMemory trueObject - > objectMemory falseObject] > ifFalse: [objectMemory falseObject > - objectMemory trueObject]) > R: TempReg. > ok := self JumpZero: 0. > self MoveCq: 0 R: counterReg. "if counterReg is 0 this is a > mustBeBoolean, not a counter trip." > + > + self flag: 'Hi Clément. You can''t just save things to the > Smalltalk stack. You can /only/ save things that execution expects to be > there on a context''s stack, because this frame may get mapped to a context > object and then back, and gc''ed etc. The counter reg does not contain an > object so is a complete no-no on the Smalltalk stack. On the C stack in > the trampoline is OK, not on the Smalltalk stack in method execution. So > instead of saving and restoring the counterReg around the call, something > we can''t do, we can reload it after the call'. > + false ifTrue: > + ["If counterReg is caller saved then save it" > + (self register: counterReg isInMask: callerSavedRegMask) > ifTrue: [ self PushR: counterReg ]]. > + > - > - "If counterReg is caller saved then save it" > - (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ > self PushR: counterReg ]. > - > countTripped jmpTarget: > (self CallRT: (boolean == objectMemory falseObject > ifTrue: > [ceSendMustBeBooleanAddFalseTrampoline] > ifFalse: > [ceSendMustBeBooleanAddTrueTrampoline])). > > "If we're in an image which hasn't got the Sista code loaded then > the ceCounterTripped: > trampoline will return directly to machine code, returning the > boolean. So the code should > jump back to the retry point. The trampoline makes sure that > TempReg has been reloaded." > self annotateBytecode: self Label. > + > + self flag: 'see above'. > + false ifTrue: > + ["If counterReg is caller saved then restore it" > + (self register: counterReg isInMask: callerSavedRegMask) > ifTrue: [ self PopR: counterReg ]]. > + > + "Note we /can't/ save and restore the counterReg's contents around > the call since the stack can > + only contain what an interpreted context's stack would contain at > the corresponding point. The > + counter is not an object, so can't be written to the stack. Hence > we reload it after the call." > + self MoveAw: counterAddress R: counterReg. > + > - > - "If counterReg is caller saved then restore it" > - (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ > self PopR: counterReg ]. > - > self Jump: retry. > ok jmpTarget: self Label. > ^0! > > Item was removed: > - ----- Method: SistaStackToRegisterMappingCogit>>printMcpc:Bcpc:on: (in > category 'method map') ----- > - printMcpc: mcpc Bcpc: bcpc on: aStream > - <doNotGenerate> > - self shouldNotImplement! > > -- best, Eliot

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[commit][3316] fix asm clause typo
by commits＠squeakvm.org 29 Apr '15

29 Apr '15

Revision: 3316 Author: rowledge Date: 2015-04-28 20:27:05 -0700 (Tue, 28 Apr 2015) Log Message: ----------- fix asm clause typo Modified Paths: -------------- branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h Modified: branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h =================================================================== --- branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h 2015-04-28 22:36:39 UTC (rev 3315) +++ branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h 2015-04-29 03:27:05 UTC (rev 3316) @@ -41,7 +41,7 @@ */ # if __GNUC__ # define getfp() ({ register unsigned long fp; \ - asm volatile ("mov %0, r11 : "=r"(fp) : ); \ + asm volatile ("mov %0, r11" : "=r"(fp) : ); \ fp; }) # else extern unsigned long getfp();

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VM Maker: VMMaker.oscog-eem.1270.mcz
by commits＠source.squeak.org 29 Apr '15

29 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1270.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1270 Author: eem Time: 28 April 2015, 5:11:29.049 pm UUID: a6737c7e-fb6b-4fe9-a44e-6b01396cff34 Ancestors: VMMaker.oscog-eem.1269 Nuke obsolete printMcpc:Bcpc:on: Correct SistaStackToRegisterMappingCogit>>genJumpIf:to: to reload counterReg instead of saving and restoring it around counter callback trampoline. =============== Diff against VMMaker.oscog-eem.1269 =============== Item was removed: - ----- Method: Cogit>>printMcpc:Bcpc:on: (in category 'method map') ----- - printMcpc: mcpc Bcpc: bcpc on: aStream - <doNotGenerate> - aStream ensureCr. - mcpc printOn: aStream base: 16. - aStream space; tab; print: bcpc; cr; flush. - ^0! Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genJumpIf:to: (in category 'bytecode generator support') ----- genJumpIf: boolean to: targetBytecodePC "The heart of performance counting in Sista. Conditional branches are 6 times less frequent than sends and can provide basic block frequencies (send counters can't). Each conditional has a 32-bit counter split into an upper 16 bits counting executions and a lower half counting untaken executions of the branch. Executing the branch decrements the upper half, tripping if the count goes negative. Not taking the branch decrements the lower half. N.B. We *do not* eliminate dead branches (true ifTrue:/true ifFalse:) so that scanning for send and branch data is simplified and that branch data is correct." <inline: false> | desc ok counterAddress countTripped retry counterReg | <var: #ok type: #'AbstractInstruction *'> <var: #desc type: #'CogSimStackEntry *'> <var: #retry type: #'AbstractInstruction *'> <var: #countTripped type: #'AbstractInstruction *'> (coInterpreter isOptimizedMethod: methodObj) ifTrue: [ ^ super genJumpIf: boolean to: targetBytecodePC ]. self ssFlushTo: simStackPtr - 1. desc := self ssTop. self ssPop: 1. desc popToReg: TempReg. + - "We prefer calleeSaved to avoid saving it across the trap trip trampoline" counterReg := self allocateRegPreferringCalleeSavedNotConflictingWith: 0. retry := self Label. self genExecutionCountLogicInto: [ :cAddress :countTripBranch | counterAddress := cAddress. countTripped := countTripBranch ] counterReg: counterReg. counterIndex := counterIndex + 1. + - "Cunning trick by LPD. If true and false are contiguous subtract the smaller. Correct result is either 0 or the distance between them. If result is not 0 or their distance send mustBeBoolean." self assert: (objectMemory objectAfter: objectMemory falseObject) = objectMemory trueObject. self annotate: (self SubCw: boolean R: TempReg) objRef: boolean. self JumpZero: (self ensureFixupAt: targetBytecodePC - initialPC). self genFallsThroughCountLogicCounterReg: counterReg counterAddress: counterAddress. self CmpCq: (boolean == objectMemory falseObject ifTrue: [objectMemory trueObject - objectMemory falseObject] ifFalse: [objectMemory falseObject - objectMemory trueObject]) R: TempReg. ok := self JumpZero: 0. self MoveCq: 0 R: counterReg. "if counterReg is 0 this is a mustBeBoolean, not a counter trip." + + self flag: 'Hi Clément. You can''t just save things to the Smalltalk stack. You can /only/ save things that execution expects to be there on a context''s stack, because this frame may get mapped to a context object and then back, and gc''ed etc. The counter reg does not contain an object so is a complete no-no on the Smalltalk stack. On the C stack in the trampoline is OK, not on the Smalltalk stack in method execution. So instead of saving and restoring the counterReg around the call, something we can''t do, we can reload it after the call'. + false ifTrue: + ["If counterReg is caller saved then save it" + (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ self PushR: counterReg ]]. + - - "If counterReg is caller saved then save it" - (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ self PushR: counterReg ]. - countTripped jmpTarget: (self CallRT: (boolean == objectMemory falseObject ifTrue: [ceSendMustBeBooleanAddFalseTrampoline] ifFalse: [ceSendMustBeBooleanAddTrueTrampoline])). "If we're in an image which hasn't got the Sista code loaded then the ceCounterTripped: trampoline will return directly to machine code, returning the boolean. So the code should jump back to the retry point. The trampoline makes sure that TempReg has been reloaded." self annotateBytecode: self Label. + + self flag: 'see above'. + false ifTrue: + ["If counterReg is caller saved then restore it" + (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ self PopR: counterReg ]]. + + "Note we /can't/ save and restore the counterReg's contents around the call since the stack can + only contain what an interpreted context's stack would contain at the corresponding point. The + counter is not an object, so can't be written to the stack. Hence we reload it after the call." + self MoveAw: counterAddress R: counterReg. + - - "If counterReg is caller saved then restore it" - (self register: counterReg isInMask: callerSavedRegMask) ifTrue: [ self PopR: counterReg ]. - self Jump: retry. ok jmpTarget: self Label. ^0! Item was removed: - ----- Method: SistaStackToRegisterMappingCogit>>printMcpc:Bcpc:on: (in category 'method map') ----- - printMcpc: mcpc Bcpc: bcpc on: aStream - <doNotGenerate> - self shouldNotImplement!

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[commit][3315] Provide stack alignment checks for ARM32.
by commits＠squeakvm.org 29 Apr '15

29 Apr '15

Revision: 3315 Author: eliot Date: 2015-04-28 15:36:39 -0700 (Tue, 28 Apr 2015) Log Message: ----------- Provide stack alignment checks for ARM32. Make sure the spur image uploader uploads the checksum. Modified Paths: -------------- branches/Cog/image/uploadspurimage.sh branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h Modified: branches/Cog/image/uploadspurimage.sh =================================================================== --- branches/Cog/image/uploadspurimage.sh 2015-04-26 23:58:12 UTC (rev 3314) +++ branches/Cog/image/uploadspurimage.sh 2015-04-28 22:36:39 UTC (rev 3315) @@ -15,11 +15,11 @@ echo ssh -x $RemoteUser mkdir $DIR ssh -x $RemoteUser mkdir $DIR echo scp -p $BASENAME.image $BASENAME.changes $BASENAME.sum "$@" $RemoteUser:$DIR -scp -p $BASENAME.image $BASENAME.changes "$@" $RemoteUser:$DIR +scp -p $BASENAME.image $BASENAME.changes $BASENAME.sum "$@" $RemoteUser:$DIR echo ssh $RemoteUser chmod a-w $DIR/* \\\; ls -al $DIR ssh $RemoteUser chmod a-w $DIR/* \; ls -al $DIR -echo ssh $RemoteUser rm $RemoteRoot/{$BASENAME.image,$BASENAME.changes} -ssh $RemoteUser rm $RemoteRoot/{$BASENAME.image,$BASENAME.changes} +echo ssh $RemoteUser rm $RemoteRoot/{$BASENAME.image,$BASENAME.changes,$BASENAME.sum} +ssh $RemoteUser rm $RemoteRoot/{$BASENAME.image,$BASENAME.changes,$BASENAME.sum} echo ssh $RemoteUser cd $RemoteRoot \\\; ln -s $DATE/{$BASENAME.image,$BASENAME.changes} . ssh $RemoteUser cd $RemoteRoot \; ln -s $DATE/{$BASENAME.image,$BASENAME.changes,$BASENAME.sum} . ssh $RemoteUser ls -l $RemoteRoot $RemoteRoot/$DATE Modified: branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h =================================================================== --- branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h 2015-04-26 23:58:12 UTC (rev 3314) +++ branches/Cog/platforms/Cross/vm/sqCogStackAlignment.h 2015-04-28 22:36:39 UTC (rev 3315) @@ -5,19 +5,27 @@ * AUTHOR: Eliot Miranda * DATE: February 2009 * - * Changes: eem Wed Jul 14 17:11:01 PDT 2010 - * make 16 bytes the default alignment for all x86. + * Changes: eem Tue 28 Apr 2015 Add ARM32 support. + * eem Wed Jul 14 2010 make 16 bytes the default alignment for all x86. */ +#if __i386__ && (__SSE2__ || __APPLE__ && __MACH__ || __linux__) /* 16-byte stack alignment on x86 is required for SSE instructions which * insist on aligned addresses for accessing 64 or 128 bit values in memory. */ -#if __i386__ && (__SSE2__ || __APPLE__ && __MACH__ || __linux__) # define STACK_ALIGN_BYTES 16 # define LEAF_CALL_STACK_ALIGN_BYTES 12 # define STACK_FP_ALIGN_BYTES 8 #endif +#if defined(__arm__) || defined(__arm32__) || defined(ARM32) +/* 8-byte stack alignment on ARM32 is required for instructions + * which access doubles and insist on 8-byte alignment. + */ +# define STACK_ALIGN_BYTES 8 +# define STACK_FP_ALIGN_BYTES 8 +#endif + #if defined(STACK_ALIGN_BYTES) # if defined(_X86_) || defined(i386) || defined(__i386) || defined(__i386__) # if __GNUC__ @@ -27,17 +35,39 @@ # else extern unsigned long getfp(); # endif +# elif defined(__arm__) || defined(__arm32__) || defined(ARM32) + /* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0041c/Cegbid… + * ARM DUI 0041C Page 9-7 + */ +# if __GNUC__ +# define getfp() ({ register unsigned long fp; \ + asm volatile ("mov %0, r11 : "=r"(fp) : ); \ + fp; }) +# else +extern unsigned long getfp(); +# endif # else # error define code for your processor here # endif extern unsigned long (*ceGetSP)(); /* provided by Cogit */ # define STACK_ALIGN_MASK (STACK_ALIGN_BYTES-1) -# define assertCStackWellAligned() do { \ +# if defined(LEAF_CALL_STACK_ALIGN_BYTES) + /* On CISCs, calling cGetSP will push ret pc and change algnment */ +# define assertCStackWellAligned() do { \ extern sqInt cFramePointerInUse; \ if (cFramePointerInUse) \ assert((getfp() & STACK_ALIGN_MASK) == STACK_FP_ALIGN_BYTES); \ assert((ceGetSP() & STACK_ALIGN_MASK) == LEAF_CALL_STACK_ALIGN_BYTES); \ } while (0) +# else + /* on RISCs, LinkReg implies stack ptr unchanged when doing cGetSP */ +# define assertCStackWellAligned() do { \ + extern sqInt cFramePointerInUse; \ + if (cFramePointerInUse) \ + assert((getfp() & STACK_ALIGN_MASK) == STACK_FP_ALIGN_BYTES); \ + assert((ceGetSP() & STACK_ALIGN_MASK) == STACK_FP_ALIGN_BYTES); \ +} while (0) +# endif #else /* defined(STACK_ALIGN_BYTES) */ # define STACK_ALIGN_BYTES 4 # define assertCStackWellAligned() 0

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VM Maker: VMMaker.oscog-eem.1269.mcz
by commits＠source.squeak.org 28 Apr '15

28 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1269.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1269 Author: eem Time: 28 April 2015, 2:52:00.14 pm UUID: dfe19ffc-4c55-433c-a284-cf4696e6489b Ancestors: VMMaker.oscog-cb.1268 Punctuation ( .. => . ). Simplify C for jumpTargetPCAt: =============== Diff against VMMaker.oscog-cb.1268 =============== Item was changed: ----- Method: CogARMCompiler>>jumpTargetPCAt: (in category 'disassembly') ----- jumpTargetPCAt: pc <returnTypeC: #usqInt> | operand word | word := objectMemory long32At: pc. operand := word bitAnd: 16rFFFFFF. (operand anyMask: 16r800000) ifTrue: [operand := operand - 16r1000000]. + ^self + cCode: [operand * 4 + pc + 8] + inSmalltalk: [operand * 4 + pc + 8 bitAnd: cogit addressSpaceMask]! - ^operand * 4 + pc + 8 bitAnd: cogit addressSpaceMask! Item was changed: ----- Method: CogObjectRepresentationForSpur>>mixed:branchIf:notInstanceOfBehaviors:target: (in category 'sista support') ----- mixed: numNonImmediates branchIf: reg notInstanceOfBehaviors: arrayObj target: targetFixUp | jmpImmediate jumps label numCases classObj index | <var: #label type: #'AbstractInstruction *'> <var: #jmpImmediate type: #'AbstractInstruction *'> <var: #jumps type: #'AbstractInstruction **'> <var: #targetFixUp type: #'AbstractInstruction *'> numCases := objectMemory numSlotsOf: arrayObj. cogit MoveR: reg R: TempReg. jmpImmediate := self genJumpImmediateInScratchReg: TempReg. "Rcvr is non immediate" + jumps := self alloca: numNonImmediates type: (self cCode: [#'AbstractInstruction *'] inSmalltalk: [cogit backEnd class]). - jumps := self alloca: numNonImmediates type: (self cCode: [#'AbstractInstruction *'] inSmalltalk: [cogit backEnd class]).. self genGetClassIndexOfNonImm: reg into: TempReg. index := 0. 0 to: numCases - 1 do: [:i| classObj := objectMemory fetchPointer: i ofObject: arrayObj. (objectMemory isImmediateClass: classObj) ifFalse: [ self genCmpClassIndex: (objectMemory classTagForClass: classObj) R: TempReg. jumps at: index put: (cogit JumpZero: 0). index := index + 1 ] ]. cogit Jump: targetFixUp. "Rcvr is immediate" jmpImmediate jmpTarget: cogit Label. numCases - numNonImmediates "num Immediates allowed" caseOf: {[ 1 ] -> [ "1 immediate allowed. jump to targetFixUp if the rcvr is not this immediate" 0 to: numCases - 1 do: [ :j | classObj := objectMemory fetchPointer: j ofObject: arrayObj. (objectMemory isImmediateClass: classObj) ifTrue: [ self branchIf: reg hasNotImmediateTag: (objectMemory classTagForClass: classObj) target: targetFixUp ] ] ] . [ 2 ] -> [ "2 immediates allowed. On 32 bits nothing to do, all immediate are allowed, on 64 bits generates the jump to fixup for the third tag" self branch2CasesIf: reg notInstanceOfBehaviors: arrayObj target: targetFixUp ] . [ 3 ] -> [ "nothing to do, all immediates are allowed." ] }. label := self Label. 0 to: numNonImmediates - 1 do: [:i | (jumps at: i) jmpTarget: label ]. ^ 0 ! Item was changed: ----- Method: CogObjectRepresentationForSpur>>noneImmediateBranchIf:notInstanceOfBehaviors:target: (in category 'sista support') ----- noneImmediateBranchIf: reg notInstanceOfBehaviors: arrayObj target: targetFixUp "All classes in arrayObj are not immediate" | label numJumps jumps classObj | <var: #targetFixUp type: #'AbstractInstruction *'> <var: #label type: #'AbstractInstruction *'> <var: #jumps type: #'AbstractInstruction **'> cogit MoveR: reg R: TempReg. + jumps := self alloca: (objectMemory numSlotsOf: arrayObj) type: (self cCode: [#'AbstractInstruction *'] inSmalltalk: [cogit backEnd class]). - jumps := self alloca: (objectMemory numSlotsOf: arrayObj) type: (self cCode: [#'AbstractInstruction *'] inSmalltalk: [cogit backEnd class]).. (self genJumpImmediateInScratchReg: TempReg) jmpTarget: targetFixUp. self genGetClassIndexOfNonImm: reg into: TempReg. 0 to: (numJumps := objectMemory numSlotsOf: arrayObj) - 1 do: [:i| classObj := objectMemory fetchPointer: i ofObject: arrayObj. self genCmpClassIndex: (objectMemory classTagForClass: classObj) R: TempReg. jumps at: i put: (cogit JumpZero: 0) ]. cogit Jump: targetFixUp. label := self Label. 0 to: numJumps do: [:i | (jumps at: i) jmpTarget: label ]. ^0! Item was changed: ----- Method: Cogit>>generateMapAt:start: (in category 'method map') ----- generateMapAt: addressOrNull start: startAddress "Generate the method map at addressrNull (or compute it if addressOrNull is null). Answer the length of the map in byes. Each entry in the map is in two parts. In the least signficant bits are a displacement of how far from the start or previous entry, unless it is an IsAnnotationExtension byte, in which case those bits are the extension. In the most signficant bits are the type of annotation at the point reached. A null byte ends the map." | length location | <var: #annotation type: #'InstructionAnnotation *'> length := 0. location := startAddress. 0 to: annotationIndex - 1 do: [:i| | annotation mcpc delta maxDelta mapEntry | annotation := self addressOf: (annotations at: i). mcpc := annotation instruction address + annotation instruction machineCodeSize. [(delta := mcpc - location / backEnd codeGranularity) > DisplacementMask] whileTrue: [maxDelta := (delta min: MaxX2NDisplacement) bitClear: DisplacementMask. self assert: maxDelta >> AnnotationShift <= DisplacementMask. addressOrNull ifNotNil: [objectMemory byteAt: addressOrNull - length put: maxDelta >> AnnotationShift + DisplacementX2N. self traceMap: IsDisplacementX2N byte: maxDelta >> AnnotationShift + DisplacementX2N at: addressOrNull - length for: mcpc]. location := location + (maxDelta * backEnd codeGranularity). length := length + 1]. addressOrNull ifNotNil: [mapEntry := delta + ((annotation annotation min: IsSendCall) << AnnotationShift). objectMemory byteAt: addressOrNull - length put: mapEntry. self traceMap: annotation byte: mapEntry at: addressOrNull - length for: mcpc]. + location := location + (delta * backEnd codeGranularity). - location := location + (delta * backEnd codeGranularity).. length := length + 1. annotation annotation > IsSendCall ifTrue: "Add the necessary IsAnnotationExtension" [addressOrNull ifNotNil: [mapEntry := IsAnnotationExtension << AnnotationShift + (annotation annotation - IsSendCall). objectMemory byteAt: addressOrNull - length put: mapEntry. self traceMap: annotation byte: mapEntry at: addressOrNull - length for: mcpc]. length := length + 1]]. addressOrNull ifNotNil: [objectMemory byteAt: addressOrNull - length put: MapEnd. self traceMap: MapEnd byte: MapEnd at: addressOrNull - length for: 0]. ^length + 1! Item was changed: ----- Method: InterpreterPrimitives>>primitiveShortAt (in category 'sound primitives') ----- primitiveShortAt "Treat the receiver, which can be indexible by either bytes or words, as an array of signed 16-bit values. Answer the contents of the given index. Note that the index specifies the i-th 16-bit entry, not the i-th byte or word." | index rcvr value | + index := self stackTop. - index := self stackTop.. (objectMemory isIntegerObject: index) ifFalse: [^self primitiveFailFor: PrimErrBadArgument]. rcvr := self stackValue: 1. (objectMemory isWordsOrBytes: rcvr) ifFalse: [^self primitiveFailFor: PrimErrInappropriate]. index := objectMemory integerValueOf: index. ((index >= 1) and: [index <= (objectMemory num16BitUnitsOf: rcvr)]) ifFalse: [^self primitiveFailFor: PrimErrBadIndex]. value := objectMemory fetchShort16: index - 1 ofObject: rcvr. self cCode: [] inSmalltalk: [value > 32767 ifTrue: [value := value - 65536]]. self pop: 2 thenPushInteger: value! Item was changed: ----- Method: NewCoObjectMemory>>methodHeaderOf: (in category 'memory access') ----- methodHeaderOf: methodObj "Answer the method header of a CompiledMethod object. If the method has been cogged then the header is a pointer to the CogMethod and the real header will be stored in the CogMethod." <api> <inline: true> | header | self assert: (self isCompiledMethod: methodObj). header := self fetchPointer: HeaderIndex ofObject: methodObj. ^(self isIntegerObject: header) ifTrue: [header] ifFalse: [self assert: header asUnsignedInteger < coInterpreter heapBase. self assert: (coInterpreter cCoerceSimple: header to: #'CogMethod *') objectHeader + = self nullHeaderForMachineCodeMethod. - = self nullHeaderForMachineCodeMethod.. (coInterpreter cCoerceSimple: header to: #'CogMethod *') methodHeader]! Item was changed: ----- Method: NewCoObjectMemory>>noCheckMethodHeaderOf: (in category 'memory access') ----- noCheckMethodHeaderOf: methodObj "Answer the method header of a CompiledMethod object. If the method has been cogged then the header is a pointer to the CogMethod and the real header will be stored in the CogMethod." <inline: true> | header | header := self fetchPointer: HeaderIndex ofObject: methodObj. ^(self isIntegerObject: header) ifTrue: [header] ifFalse: [self assert: header asUnsignedInteger < coInterpreter heapBase. self assert: (coInterpreter cCoerceSimple: header to: #'CogMethod *') objectHeader + = self nullHeaderForMachineCodeMethod. - = self nullHeaderForMachineCodeMethod.. (coInterpreter cCoerceSimple: header to: #'CogMethod *') methodHeader]! Item was changed: ----- Method: SimpleStackBasedCogit>>generateMissAbortTrampolines (in category 'initialization') ----- generateMissAbortTrampolines + "Generate the run-time entries for the various method and PIC entry misses and aborts. - "Generate the run-time entries for the various method and PIC entry misses and aborts.. Read the class-side method trampolines for documentation on the various trampolines" ceMethodAbortTrampoline := self genMethodAbortTrampoline. cePICAbortTrampoline := self genPICAbortTrampoline. ceCPICMissTrampoline := self genTrampolineFor: #ceCPICMiss:receiver: called: 'ceCPICMissTrampoline' arg: ClassReg arg: ReceiverResultReg! Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genExtJumpIfNotInstanceOfBehaviorsOrPopBytecode (in category 'bytecode generators') ----- genExtJumpIfNotInstanceOfBehaviorsOrPopBytecode "SistaV1: * 254 11111110 kkkkkkkk jjjjjjjj branch If Not Instance Of Behavior/Array Of Behavior kkkkkkkk (+ Extend A * 256, where Extend A >= 0) distance jjjjjjjj (+ Extend B * 256, where Extend B >= 0)" | reg literal distance targetFixUp | "We loose the information of in which register is stack top when jitting the branch target so we need to flush everything. We could use a fixed register here...." reg := self allocateRegForStackEntryAt: 0. self ssTop popToReg: reg. self ssFlushTo: simStackPtr. "flushed but the value is still in reg" literal := self getLiteral: (extA * 256 + byte1). extA := 0. distance := extB * 256 + byte2. extB := 0. + targetFixUp := self cCoerceSimple: (self ensureFixupAt: bytecodePC + 3 + distance - initialPC) to: #'AbstractInstruction *'. - targetFixUp := self cCoerceSimple: (self ensureFixupAt: bytecodePC + 3 + distance - initialPC) to: #'AbstractInstruction *'.. (objectMemory isArrayNonImm: literal) ifTrue: [objectRepresentation branchIf: reg notInstanceOfBehaviors: literal target: targetFixUp] ifFalse: [objectRepresentation branchIf: reg notInstanceOfBehavior: literal target: targetFixUp]. self genPopStackBytecode. ^0! Item was changed: ----- Method: Spur32BitCoMemoryManager>>methodHeaderOf: (in category 'growing/shrinking memory') ----- methodHeaderOf: methodObj "Answer the method header of a CompiledMethod object. If the method has been cogged then the header is a pointer to the CogMethod and the real header will be stored in the CogMethod." <api> <inline: true> | header | self assert: (self isCompiledMethod: methodObj). header := self fetchPointer: HeaderIndex ofObject: methodObj. ^(self isIntegerObject: header) ifTrue: [header] ifFalse: [self assert: header asUnsignedInteger < newSpaceStart. self assert: (coInterpreter cCoerceSimple: header to: #'CogMethod *') objectHeader + = self nullHeaderForMachineCodeMethod. - = self nullHeaderForMachineCodeMethod.. (coInterpreter cCoerceSimple: header to: #'CogMethod *') methodHeader]! Item was changed: ----- Method: Spur64BitCoMemoryManager>>methodHeaderOf: (in category 'growing/shrinking memory') ----- methodHeaderOf: methodObj "Answer the method header of a CompiledMethod object. If the method has been cogged then the header is a pointer to the CogMethod and the real header will be stored in the CogMethod." <api> <inline: true> | header | self assert: (self isCompiledMethod: methodObj). header := self fetchPointer: HeaderIndex ofObject: methodObj. ^(self isIntegerObject: header) ifTrue: [header] ifFalse: [self assert: header asUnsignedInteger < newSpaceStart. self assert: (coInterpreter cCoerceSimple: header to: #'CogMethod *') objectHeader + = self nullHeaderForMachineCodeMethod. - = self nullHeaderForMachineCodeMethod.. (coInterpreter cCoerceSimple: header to: #'CogMethod *') methodHeader]! Item was changed: ----- Method: SpurGenerationScavenger>>processWeakSurvivor: (in category 'weakness and ephemerality') ----- processWeakSurvivor: weakObj "Process a weak survivor on the weakList. Those of its fields which have not survived the scavenge should be nilled, and if any + are, the coInterpreter should be informed via signalFinalization:. - are, the coInterpreter should be informed via signalFinalization:.. Answer if the weakObj has any young referents." | weakObjShouldMourn hasYoungReferents numStrongSlots | weakObjShouldMourn := hasYoungReferents := false. "N.B. generateToByDoLimitExpression:negative:on: guards against (unsigned)0 - 1 going +ve" numStrongSlots := manager numFixedSlotsOf: weakObj. 0 to: numStrongSlots - 1 do: [:i| | referent | referent := manager fetchPointer: i ofObject: weakObj. ((manager isNonImmediate: referent) and: [manager isYoungObject: referent]) ifTrue: [hasYoungReferents := true]]. numStrongSlots to: (manager numSlotsOf: weakObj) - 1 do: [:i| | referent | referent := manager fetchPointer: i ofObject: weakObj. "Referent could be forwarded due to scavenging or a become:, don't assume." (manager isNonImmediate: referent) ifTrue: [(manager isForwarded: referent) ifTrue: [referent := manager followForwarded: referent. "weakObj is either young or already in remembered table; no need to check" self assert: ((manager isReallyYoungObject: weakObj) + or: [manager isRemembered: weakObj]). - or: [manager isRemembered: weakObj]).. manager storePointerUnchecked: i ofObject: weakObj withValue: referent]. (self isMaybeOldScavengeSurvivor: referent) ifTrue: [(manager isYoungObject: referent) ifTrue: [hasYoungReferents := true]] ifFalse: [weakObjShouldMourn := true. manager storePointerUnchecked: i ofObject: weakObj withValue: manager nilObject]]]. weakObjShouldMourn ifTrue: [coInterpreter signalFinalization: weakObj]. ^hasYoungReferents! Item was changed: ----- Method: SpurMemoryManager>>ensureRoomOnObjStackAt: (in category 'obj stacks') ----- ensureRoomOnObjStackAt: objStackRootIndex "An obj stack is a stack of objects stored in a hidden root slot, such as the markStack or the ephemeronQueue. It is a linked list of segments, with the hot end at the head of the list. It is a word object. The stack pointer is in ObjStackTopx and 0 means empty. The list goes through ObjStackNextx. We don't want to shrink objStacks, since they're used in GC and its good to keep their memory around. So unused pages created by popping emptying pages are kept on the ObjStackFreex list." | stackOrNil freeOrNewPage | stackOrNil := self fetchPointer: objStackRootIndex ofObject: hiddenRootsObj. (stackOrNil = nilObj or: [(self fetchPointer: ObjStackTopx ofObject: stackOrNil) >= ObjStackLimit]) ifTrue: [freeOrNewPage := stackOrNil = nilObj ifTrue: [0] ifFalse: [self fetchPointer: ObjStackFreex ofObject: stackOrNil]. freeOrNewPage ~= 0 ifTrue: "the free page list is always on the new page." [self storePointer: ObjStackFreex ofObjStack: stackOrNil withValue: 0. self assert: (marking not or: [self isMarked: freeOrNewPage])] ifFalse: [freeOrNewPage := self allocateSlotsInOldSpace: ObjStackPageSlots format: self wordIndexableFormat classIndex: self wordSizeClassIndexPun. freeOrNewPage ifNil: [self error: 'no memory to allocate or extend obj stack']. + self storePointer: ObjStackFreex ofObjStack: freeOrNewPage withValue: 0. - self storePointer: ObjStackFreex ofObjStack: freeOrNewPage withValue: 0.. marking ifTrue: [self setIsMarkedOf: freeOrNewPage to: true]]. self storePointer: ObjStackMyx ofObjStack: freeOrNewPage withValue: objStackRootIndex; storePointer: ObjStackNextx ofObjStack: freeOrNewPage withValue: (stackOrNil = nilObj ifTrue: [0] ifFalse: [stackOrNil]); storePointer: ObjStackTopx ofObjStack: freeOrNewPage withValue: 0; storePointer: objStackRootIndex ofObject: hiddenRootsObj withValue: freeOrNewPage. self assert: (self isValidObjStackAt: objStackRootIndex). "Added a new page; now update and answer the relevant cached first page." stackOrNil := self updateRootOfObjStackAt: objStackRootIndex with: freeOrNewPage]. self assert: (self isValidObjStackAt: objStackRootIndex). ^stackOrNil! Item was changed: ----- Method: SpurMemoryManager>>enterIntoClassTable: (in category 'class table') ----- enterIntoClassTable: aBehavior "Enter aBehavior into the class table and answer 0. Otherwise answer a primitive failure code." <inline: false> | initialMajorIndex majorIndex minorIndex page | majorIndex := classTableIndex >> self classTableMajorIndexShift. initialMajorIndex := majorIndex. "classTableIndex should never index the first page; it's reserved for known classes" self assert: initialMajorIndex > 0. minorIndex := classTableIndex bitAnd: self classTableMinorIndexMask. [page := self fetchPointer: majorIndex ofObject: hiddenRootsObj. page = nilObj ifTrue: [page := self allocateSlotsInOldSpace: self classTablePageSize format: self arrayFormat classIndex: self arrayClassIndexPun. page ifNil: [^PrimErrNoMemory]. self fillObj: page numSlots: self classTablePageSize with: nilObj. self storePointer: majorIndex ofObject: hiddenRootsObj withValue: page. numClassTablePages := numClassTablePages + 1. minorIndex := 0]. minorIndex to: self classTablePageSize - 1 do: [:i| (self fetchPointer: i ofObject: page) = nilObj ifTrue: + [classTableIndex := majorIndex << self classTableMajorIndexShift + i. - [classTableIndex := majorIndex << self classTableMajorIndexShift + i.. "classTableIndex must never index the first page, which is reserved for classes known to the VM." self assert: classTableIndex >= (1 << self classTableMajorIndexShift). self storePointer: i ofObject: page withValue: aBehavior. self setHashBitsOf: aBehavior to: classTableIndex. self assert: (self classAtIndex: (self rawHashBitsOf: aBehavior)) = aBehavior. ^0]]. majorIndex := (majorIndex + 1 bitAnd: self classIndexMask) max: 1. majorIndex = initialMajorIndex ifTrue: "wrapped; table full" [^PrimErrLimitExceeded]] repeat! Item was changed: ----- Method: SpurMemoryManager>>numSlotsOf: (in category 'object access') ----- numSlotsOf: objOop <returnTypeC: #usqInt> <api> | numSlots | self flag: #endianness. "numSlotsOf: should not be applied to free or forwarded objects." self assert: (self classIndexOf: objOop) > self isForwardedObjectClassIndexPun. + numSlots := self rawNumSlotsOf: objOop. - numSlots := self rawNumSlotsOf: objOop.. ^numSlots = self numSlotsMask "overflow slots; (2^32)-1 slots are plenty" ifTrue: [self rawOverflowSlotsOf: objOop] ifFalse: [numSlots]! Item was changed: ----- Method: SpurMemoryManager>>numSlotsOfAny: (in category 'object access') ----- numSlotsOfAny: objOop "A private internal version of numSlotsOf: that is happy to be applied to free or forwarded objects." <returnTypeC: #usqInt> | numSlots | + numSlots := self rawNumSlotsOf: objOop. - numSlots := self rawNumSlotsOf: objOop.. ^numSlots = self numSlotsMask ifTrue: [self rawOverflowSlotsOf: objOop] "overflow slots; (2^32)-1 slots are plenty" ifFalse: [numSlots]! Item was changed: ----- Method: SpurMemoryManager>>setHiddenRootsObj: (in category 'class table') ----- setHiddenRootsObj: anOop hiddenRootsObj := anOop. self cCode: [self assert: self validClassTableRootPages] inSmalltalk: [numClassTablePages ifNotNil: + [self assert: self validClassTableRootPages]]. - [self assert: self validClassTableRootPages]].. classTableFirstPage := self fetchPointer: 0 ofObject: hiddenRootsObj. self assert: (self numSlotsOf: classTableFirstPage) - 1 = self classTableMinorIndexMask. "Set classTableIndex to the start of the last used page (excepting first page). Set numClassTablePages to the number of used pages." numClassTablePages := self classTableRootSlots. 2 to: numClassTablePages - 1 do: [:i| (self fetchPointer: i ofObject: hiddenRootsObj) = nilObj ifTrue: [numClassTablePages := i. classTableIndex := (numClassTablePages - 1 max: 1) << self classTableMajorIndexShift. ^self]]. "no unused pages; set it to the start of the second page." classTableIndex := 1 << self classTableMajorIndexShift! Item was changed: ----- Method: StackInterpreterSimulatorMorph>>displayViewLayoutFrame (in category 'submorphs - simulator display view') ----- displayViewLayoutFrame | squeakJSFrame buttonFrame simulatorFrame| "if any Morphic guru's understand layouts and offsets, please fix this. tty" buttonFrame := self buttonRowLayoutFrame. squeakJSFrame := self squeakJSRowLayoutFrame. + simulatorFrame := self simulatorLayoutFrame. - simulatorFrame := self simulatorLayoutFrame.. ^LayoutFrame fractions: (0@0 corner: 1@1) offsets: (0@(buttonFrame bottomOffset) corner: simulatorFrame leftOffset@squeakJSFrame topOffset)! Item was changed: ----- Method: StackToRegisterMappingCogit class>>initializeBytecodeTableForSqueakV3PlusClosuresNewspeakV4Hybrid (in category 'class initialization') ----- initializeBytecodeTableForSqueakV3PlusClosuresNewspeakV4Hybrid "SimpleStackBasedCogit initializeBytecodeTableForSqueakV3PlusClosuresNewspeakV4Hybrid" "StackToRegisterMappingCogit initializeBytecodeTableForSqueakV3PlusClosuresNewspeakV4Hybrid" + super initializeBytecodeTableForSqueakV3PlusClosuresNewspeakV4Hybrid. - super initializeBytecodeTableForSqueakV3PlusClosuresNewspeakV4Hybrid.. numPushNilsFunction := #v3or4:Num:Push:Nils:. pushNilSizeFunction := #v3or4PushNilSize:numInitialNils:! Item was changed: ----- Method: StackToRegisterMappingCogit>>genUnaryInlinePrimitive: (in category 'inline primitive generators') ----- genUnaryInlinePrimitive: prim "Unary inline primitives." "SistaV1: 248 11111000 iiiiiiii mjjjjjjj Call Primitive #iiiiiiii + (jjjjjjj * 256) m=1 means inlined primitive, no hard return after execution. See EncoderForSistaV1's class comment and StackInterpreter>>#unaryInlinePrimitive:" | rcvrReg resultReg | rcvrReg := self allocateRegForStackEntryAt: 0. resultReg := self allocateRegNotConflictingWith: (self registerMaskFor: rcvrReg). self ssTop popToReg: rcvrReg. self ssPop: 1. prim caseOf: { "00 unchecked class" [1] -> "01 unchecked pointer numSlots" [objectRepresentation genGetNumSlotsOf: rcvrReg into: resultReg; genConvertIntegerToSmallIntegerInReg: resultReg]. "02 unchecked pointer basicSize" [3] -> "03 unchecked byte numBytes" [objectRepresentation genGetNumBytesOf: rcvrReg into: resultReg; genConvertIntegerToSmallIntegerInReg: resultReg]. "04 unchecked short16Type format numShorts" "05 unchecked word32Type format numWords" "06 unchecked doubleWord64Type format numDoubleWords" } otherwise: + [^EncounteredUnknownBytecode]. - [^EncounteredUnknownBytecode].. self ssPushRegister: resultReg. ^0! Item was changed: ----- Method: TSwitchStmtNode>>nodesDo:parent: (in category 'enumerating') ----- nodesDo: aBlock parent: parent "Apply aBlock to all nodes in the receiver with each node's parent. N.B. This is assumed to be bottom-up, leaves first." + expression nodesDo: aBlock parent: self. - expression nodesDo: aBlock parent: self.. cases do: [:pair| pair first do: [:node| node nodesDo: aBlock parent: self.]. pair last nodesDo: aBlock parent: self.]. otherwiseOrNil ifNotNil: [otherwiseOrNil nodesDo: aBlock parent: self]. aBlock value: self value: parent!

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VM Maker: Cog-eem.262.mcz
by commits＠source.squeak.org 28 Apr '15

28 Apr '15

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.262.mcz ==================== Summary ==================== Name: Cog-eem.262 Author: eem Time: 28 April 2015, 2:16:05.182 pm UUID: 5d51a88a-cc96-4346-9578-83eed6858818 Ancestors: Cog-eem.261 In ARM assembly decoration only use register contents if disassembling the current pc. =============== Diff against Cog-eem.261 =============== Item was changed: ----- Method: GdbARMAlien>>decorateDisassembly:for:fromAddress: (in category 'disassembly') ----- decorateDisassembly: anInstructionString for: aSymbolManager fromAddress: address "Decode what we can of the instruction and decorate it with useful stuff" | word opcode rotate mode operand memory addressinatorBlock| + addressinatorBlock := + [:value| | string | + (value notNil + and: [(string := aSymbolManager lookupAddress: value) notNil]) + ifTrue: [ ' = ', value hex, ' = ', string] + ifFalse: ['']]. - addressinatorBlock := [:value| - (aSymbolManager lookupAddress: value) - ifNotNil: [:string| ' = ', value hex, ' = ', string] - ifNil: ['']]. word := (memory:= aSymbolManager objectMemory) longAt: address. (self instructionIsAnyB: word) ifTrue: + [((self instructionIsB: word) or: [self instructionIsBL: word]) ifTrue: + ["We can extract the offset from a plain B/BL instruction" + operand := self extractOffsetFromBL: word.. + operand := operand + address + 8 bitAnd: aSymbolManager addressSpaceMask]. + "We can't extract the offset from a BX/BLX instructions register, unless we're at the current pc, + because otherwise its current value has nothing to do with the value when this instruction is executed." + (self pc = address + and: [(self instructionIsBX: word) or: [self instructionIsBLX: word]]) ifTrue: + [operand := (self perform: (self registerStateGetters at: (word bitAnd: 15) + 1))]] - [((self instructionIsB: word) or: [self instructionIsBL: word]) - ifTrue:["We can extract the offset from a plain B/BL instruction" - operand := self extractOffsetFromBL: word.. - operand := operand + address + 8 bitAnd: aSymbolManager addressSpaceMask]. - ((self instructionIsBX: word) or: [self instructionIsBLX: word]) - ifTrue:["We can extract the offset from a BX/BLX instructions register" - operand := (self perform: (self registerStateGetters at: (word bitAnd: 15) + 1))]. - - (aSymbolManager lookupAddress: operand) ifNotNil: - [:name| ^anInstructionString, ' = ', operand hex, ' = ', name]] ifFalse: [(self instructionIsAnyLoadStore: word) ifTrue: [|baseR| "first see if this is a load via the varBase register - quick access globals. We'll trust that nobody makes a nasty instruction that uses this reg in a mean way" + operand := (baseR := (word >> 16 bitAnd: 15)) = CogARMCompiler VarBaseReg + ifTrue: [aSymbolManager varBaseAddress + (word bitAnd: 1 << 12 - 1)] + ifFalse: [self pc = address ifTrue: + [(self register: baseR) + (self extractOffsetFromLoadStore: word)]]. - (baseR := (word >> 16 bitAnd: 15)) = CogARMCompiler VarBaseReg - ifTrue:[ operand := aSymbolManager varBaseAddress + (word bitAnd: 1 << 12 - 1)] - ifFalse:[ operand := (self register: baseR) + (self extractOffsetFromLoadStore: word)]. "look for SP operations -pop/push" + (self instructionIsPush: word) ifTrue: "push - " + [|srcR| - (self instructionIsPush: word) ifTrue: ["push - " - |srcR| srcR := word >>12 bitAnd: 16rF. + ^ (anInstructionString readStream upTo: $}), '}', (self pc = address ifTrue: [' (', (self register: srcR) hex, ') to ', (self sp - 4) hex] ifFalse: [''])]. + (self instructionIsPop: word) ifTrue: "pop - " + [^ (anInstructionString readStream upTo: $}), '}', (self pc = address ifTrue: [' (', (memory longAt: self sp) hex, ') ' , ' from ' , self sp hex] ifFalse: [''])]. - ^ (anInstructionString readStream upTo: $}), '} (', (self register: srcR) hex, ') to ', (self sp - 4) hex ]. - (self instructionIsPop: word) ifTrue: ["pop - " - ^ (anInstructionString readStream upTo: $}), '} (', (memory longAt: self sp) hex, ') ' , ' from ' , self sp hex ]. "look for a ld/st of the sp" + (self instructionIsLDRSP: word) ifTrue: + [^anInstructionString, '; Load SP from ', (addressinatorBlock value: operand)]. + (self instructionIsSTRSP: word) ifTrue: + [^anInstructionString, '; Save SP to ', (addressinatorBlock value: operand)]] - (self instructionIsLDRSP: word) ifTrue:[| val | - val := operand > memory memory size - ifTrue: [aSymbolManager simulatedVariableAt: operand ] - ifFalse: [memory longAt: operand]. - ^anInstructionString, '; Load SP (', (val ifNil:['unknown'] ifNotNil:[:v| v hex]) , ') from ', (addressinatorBlock value: operand)]. - (self instructionIsSTRSP: word) ifTrue:[ - ^anInstructionString, '; Save SP (', self sp hex, ') to ', (addressinatorBlock value: operand)]. - ] ifFalse: ["check for SP changers not relating to read/writing data" + (self instructionIsAlignSP: word) ifTrue: + [^anInstructionString, ' ALIGN SP ', (self pc = address ifTrue: [self sp hex] ifFalse: [''])]. + (self instructionIsAddSP: word) ifTrue: + [^anInstructionString, ' ADD ', (word bitAnd: 16rFF) asString,' to SP ', (self pc = address ifTrue: ['= ' , self sp hex] ifFalse: [''])]. - (self instructionIsAlignSP: word) - ifTrue: [^anInstructionString, ' ALIGN SP ' , self sp hex; cr]. - (self instructionIsAddSP: word) - ifTrue:[^anInstructionString, ' ADD ', (word bitAnd: 16rFF) asString,' to SP = ' , self sp hex]. "check for the end of a mov/orr/orr/orr set filling a reg with a const" opcode := word >> 21 bitAnd: 16rF. opcode ~= CogARMCompiler orOpcode ifTrue: [^anInstructionString]. rotate := word >> 8 bitAnd: 16rF. mode := word >> 25 bitAnd: 7. "CogARMCompiler always uses a 0 rotate in the last operand of the final ORR when building long constants." (mode = 1 and: [rotate ~= 0]) ifTrue: [^anInstructionString]. operand := aSymbolManager backEnd literalBeforeFollowingAddress: address + 4]]. "is there an interesting address with this?" ^anInstructionString, (addressinatorBlock value: operand)!

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VM Maker: Cog-eem.262.mcz
by commits＠source.squeak.org 28 Apr '15

28 Apr '15

Eliot Miranda uploaded a new version of Cog to project VM Maker: http://source.squeak.org/VMMaker/Cog-eem.262.mcz ==================== Summary ==================== Name: Cog-eem.262 Author: eem Time: 28 April 2015, 2:09:33.609 pm UUID: 358d33f0-74ee-4f59-b3df-9e6907d66705 Ancestors: Cog-eem.261 empty log message =============== Diff against Cog-eem.261 =============== Item was changed: ----- Method: GdbARMAlien>>decorateDisassembly:for:fromAddress: (in category 'disassembly') ----- decorateDisassembly: anInstructionString for: aSymbolManager fromAddress: address "Decode what we can of the instruction and decorate it with useful stuff" | word opcode rotate mode operand memory addressinatorBlock| + addressinatorBlock := + [:value| | string | + (value notNil + and: [(string := aSymbolManager lookupAddress: value) notNil]) + ifTrue: [ ' = ', value hex, ' = ', string] + ifFalse: ['']]. - addressinatorBlock := [:value| - (aSymbolManager lookupAddress: value) - ifNotNil: [:string| ' = ', value hex, ' = ', string] - ifNil: ['']]. word := (memory:= aSymbolManager objectMemory) longAt: address. (self instructionIsAnyB: word) ifTrue: + [((self instructionIsB: word) or: [self instructionIsBL: word]) ifTrue: + ["We can extract the offset from a plain B/BL instruction" + operand := self extractOffsetFromBL: word.. + operand := operand + address + 8 bitAnd: aSymbolManager addressSpaceMask]. + "We can't extract the offset from a BX/BLX instructions register, unless we're at the current pc, + because otherwise its current value has nothing to do with the value when this instruction is executed." + (self pc = address + and: [(self instructionIsBX: word) or: [self instructionIsBLX: word]]) ifTrue: + [operand := (self perform: (self registerStateGetters at: (word bitAnd: 15) + 1))]] - [((self instructionIsB: word) or: [self instructionIsBL: word]) - ifTrue:["We can extract the offset from a plain B/BL instruction" - operand := self extractOffsetFromBL: word.. - operand := operand + address + 8 bitAnd: aSymbolManager addressSpaceMask]. - ((self instructionIsBX: word) or: [self instructionIsBLX: word]) - ifTrue:["We can extract the offset from a BX/BLX instructions register" - operand := (self perform: (self registerStateGetters at: (word bitAnd: 15) + 1))]. - - (aSymbolManager lookupAddress: operand) ifNotNil: - [:name| ^anInstructionString, ' = ', operand hex, ' = ', name]] ifFalse: [(self instructionIsAnyLoadStore: word) ifTrue: [|baseR| "first see if this is a load via the varBase register - quick access globals. We'll trust that nobody makes a nasty instruction that uses this reg in a mean way" + operand := (baseR := (word >> 16 bitAnd: 15)) = CogARMCompiler VarBaseReg + ifTrue: [aSymbolManager varBaseAddress + (word bitAnd: 1 << 12 - 1)] + ifFalse: [self pc = address ifTrue: + [(self register: baseR) + (self extractOffsetFromLoadStore: word)]]. - (baseR := (word >> 16 bitAnd: 15)) = CogARMCompiler VarBaseReg - ifTrue:[ operand := aSymbolManager varBaseAddress + (word bitAnd: 1 << 12 - 1)] - ifFalse:[ operand := (self register: baseR) + (self extractOffsetFromLoadStore: word)]. "look for SP operations -pop/push" + (self instructionIsPush: word) ifTrue: "push - " + [|srcR| - (self instructionIsPush: word) ifTrue: ["push - " - |srcR| srcR := word >>12 bitAnd: 16rF. + ^ (anInstructionString readStream upTo: $}), '}', (self pc = address ifTrue: [' (', (self register: srcR) hex, ') to ', (self sp - 4) hex] ifFalse: [''])]. + (self instructionIsPop: word) ifTrue: "pop - " + [^ (anInstructionString readStream upTo: $}), '}', (self pc = address ifTrue: [' (', (memory longAt: self sp) hex, ') ' , ' from ' , self sp hex] ifFalse: [''])]. - ^ (anInstructionString readStream upTo: $}), '} (', (self register: srcR) hex, ') to ', (self sp - 4) hex ]. - (self instructionIsPop: word) ifTrue: ["pop - " - ^ (anInstructionString readStream upTo: $}), '} (', (memory longAt: self sp) hex, ') ' , ' from ' , self sp hex ]. "look for a ld/st of the sp" + (self instructionIsLDRSP: word) ifTrue: + [^anInstructionString, '; Load SP from ', (addressinatorBlock value: operand)]. + (self instructionIsSTRSP: word) ifTrue: + [^anInstructionString, '; Save SP to ', (addressinatorBlock value: operand)]] - (self instructionIsLDRSP: word) ifTrue:[| val | - val := operand > memory memory size - ifTrue: [aSymbolManager simulatedVariableAt: operand ] - ifFalse: [memory longAt: operand]. - ^anInstructionString, '; Load SP (', (val ifNil:['unknown'] ifNotNil:[:v| v hex]) , ') from ', (addressinatorBlock value: operand)]. - (self instructionIsSTRSP: word) ifTrue:[ - ^anInstructionString, '; Save SP (', self sp hex, ') to ', (addressinatorBlock value: operand)]. - ] ifFalse: ["check for SP changers not relating to read/writing data" + (self instructionIsAlignSP: word) ifTrue: + [^anInstructionString, ' ALIGN SP ', (self pc = address ifTrue: [self sp hex] ifFalse: [''])]. + (self instructionIsAddSP: word) ifTrue: + [^anInstructionString, ' ADD ', (word bitAnd: 16rFF) asString,' to SP ', (self pc = address ifTrue: ['= ' , self sp hex] ifFalse: [''])]. - (self instructionIsAlignSP: word) - ifTrue: [^anInstructionString, ' ALIGN SP ' , self sp hex; cr]. - (self instructionIsAddSP: word) - ifTrue:[^anInstructionString, ' ADD ', (word bitAnd: 16rFF) asString,' to SP = ' , self sp hex]. "check for the end of a mov/orr/orr/orr set filling a reg with a const" opcode := word >> 21 bitAnd: 16rF. opcode ~= CogARMCompiler orOpcode ifTrue: [^anInstructionString]. rotate := word >> 8 bitAnd: 16rF. mode := word >> 25 bitAnd: 7. "CogARMCompiler always uses a 0 rotate in the last operand of the final ORR when building long constants." (mode = 1 and: [rotate ~= 0]) ifTrue: [^anInstructionString]. operand := aSymbolManager backEnd literalBeforeFollowingAddress: address + 4]]. "is there an interesting address with this?" ^anInstructionString, (addressinatorBlock value: operand)!

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VM Maker: VMMaker.oscog-cb.1268.mcz
by commits＠source.squeak.org 28 Apr '15

28 Apr '15

ClementBera uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1268.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1268 Author: cb Time: 28 April 2015, 4:20:16.748 pm UUID: 3d3bd6a7-9121-4682-a388-0037d1513a0a Ancestors: VMMaker.oscog-cb.1267 changed the return type to usqint based on Eliot's advises =============== Diff against VMMaker.oscog-cb.1267 =============== Item was changed: ----- Method: CogIA32Compiler>>jumpTargetPCAt: (in category 'disassembly') ----- jumpTargetPCAt: pc + <returnTypeC: #usqInt> - <returnTypeC: #sqInt> | size byte offset | size := self instructionSizeAt: pc. size = 2 ifTrue: [byte := objectMemory byteAt: pc + 1. offset := (byte bitAnd: 16r80) = 0 ifTrue: [byte] ifFalse: [byte - 256]] ifFalse: [byte := objectMemory byteAt: pc + size - 1. offset := (byte bitAnd: 16r80) = 0 ifTrue: [byte] ifFalse: [byte - 256]. offset := offset << 8 + (objectMemory byteAt: pc + size - 2). offset := offset << 8 + (objectMemory byteAt: pc + size - 3). offset := offset << 8 + (objectMemory byteAt: pc + size - 4)]. ^pc + size + offset! Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>getJumpTargetPCAt: (in category 'method introspection') ----- getJumpTargetPCAt: pc <api> - <returnTypeC: #sqInt> ^backEnd jumpTargetPCAt: pc!

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Vm-dev April 2015