Vm-dev April 2015

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Re: [Vm-dev] VM Maker: VMMaker.oscog-eem.1249.mcz
by Clément Bera 23 Apr '15

23 Apr '15

About *The only reason we assert needsFrame here is that in a frameless method ReceiverResultReg must and does contain only self* What if in frameless method we swap temporarily the ReceiverResultReg ? I mean a work around like that for frameless methods : SimpleStackBasedCogit >>genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex *| tempReg |* *needsFrame ifFalse: * * [ **tempReg** := self allocateRegNotConflictingWith: (self registerMaskFor: ClassReg and: ReceiverResultReg).* *self MoveR: ReceiverResultReg R: tempReg ].* popBoolean ifTrue: [self PopR: ClassReg] ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. objectRepresentation genStoreSourceReg: ClassReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame. *needsFrame ifFalse: * * [ **self MoveR: **tempReg** R:** ReceiverResultReg ].* That's two extra instructions but compared to a stack frame creation it may make sense. Anyway it does not really matter I guess there are few frameless methods on the SistaCogit. 2015-04-23 20:08 GMT+02:00 <commits(a)source.squeak.org>: > > Eliot Miranda uploaded a new version of VMMaker to project VM Maker: > http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1249.mcz > > ==================== Summary ==================== > > Name: VMMaker.oscog-eem.1249 > Author: eem > Time: 23 April 2015, 11:07:28.905 am > UUID: 41e8dbc2-ed01-42d2-9155-eaf604510aaa > Ancestors: VMMaker.oscog-eem.1248 > > More commentary. > > =============== Diff against VMMaker.oscog-eem.1248 =============== > > Item was changed: > ----- Method: SimpleStackBasedCogit>>genStorePop:LiteralVariable: (in > category 'bytecode generator support') ----- > genStorePop: popBoolean LiteralVariable: litVarIndex > <inline: false> > | association | > + "The only reason we assert needsFrame here is that in a frameless > method > + ReceiverResultReg must and does contain only self, but the > ceStoreCheck > + trampoline expects the target of the store to be in > ReceiverResultReg. So > + in a frameless method we would have a conflict between the > receiver and > + the literal store, unless we we smart enough to realise that > ReceiverResultReg > + was unused after the literal variable store, unlikely given that > methods > + return self by default." > self assert: needsFrame. > association := self getLiteral: litVarIndex. > self annotate: (self MoveCw: association R: ReceiverResultReg) > objRef: association. > objectRepresentation > genEnsureObjInRegNotForwarded: ReceiverResultReg > scratchReg: TempReg. > popBoolean > ifTrue: [self PopR: ClassReg] > ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. > traceStores > 0 ifTrue: > [self CallRT: ceTraceStoreTrampoline]. > ^objectRepresentation > genStoreSourceReg: ClassReg > slotIndex: ValueIndex > destReg: ReceiverResultReg > scratchReg: TempReg > inFrame: needsFrame! > > Item was changed: > ----- Method: > SimpleStackBasedCogit>>genStorePop:MaybeContextReceiverVariable: (in > category 'bytecode generator support') ----- > genStorePop: popBoolean MaybeContextReceiverVariable: slotIndex > <inline: false> > | jmpSingle jmpDone | > <var: #jmpSingle type: #'AbstractInstruction *'> > <var: #jmpDone type: #'AbstractInstruction *'> > + "The reason we need a frame here is that assigning to an inst var > of a context may > + involve wholesale reorganization of stack pages, and the only way > to preserve the > + execution state of an activation in that case is if it has a > frame." > self assert: needsFrame. > self MoveMw: FoxMFReceiver r: FPReg R: ReceiverResultReg. > objectRepresentation > genLoadSlot: SenderIndex > sourceReg: ReceiverResultReg > destReg: TempReg. > self MoveMw: 0 r: SPReg R: ClassReg. > jmpSingle := objectRepresentation > genJumpNotSmallIntegerInScratchReg: TempReg. > self MoveCq: slotIndex R: SendNumArgsReg. > self CallRT: ceStoreContextInstVarTrampoline. > jmpDone := self Jump: 0. > jmpSingle jmpTarget: self Label. > traceStores > 0 ifTrue: > [self CallRT: ceTraceStoreTrampoline]. > objectRepresentation > genStoreSourceReg: ClassReg > slotIndex: slotIndex > destReg: ReceiverResultReg > scratchReg: TempReg > inFrame: true. > jmpDone jmpTarget: self Label. > popBoolean ifTrue: > [self AddCq: objectMemory wordSize R: SPReg]. > ^0! > > Item was changed: > ----- Method: SimpleStackBasedCogit>>genStorePop:RemoteTemp:At: (in > category 'bytecode generator support') ----- > genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex > <inline: false> > + "The only reason we assert needsFrame here is that in a frameless > method > + ReceiverResultReg must and does contain only self, but the > ceStoreCheck > + trampoline expects the target of the store to be in > ReceiverResultReg. So > + in a frameless method we would have a conflict between the > receiver and > + the temote temp store, unless we we smart enough to realise that > + ReceiverResultReg was unused after the literal variable store, > unlikely given > + that methods return self by default." > self assert: needsFrame. > popBoolean > ifTrue: [self PopR: ClassReg] > ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. > self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: > FPReg R: ReceiverResultReg. > traceStores > 0 ifTrue: > [self CallRT: ceTraceStoreTrampoline]. > ^objectRepresentation > genStoreSourceReg: ClassReg > slotIndex: slotIndex > destReg: ReceiverResultReg > scratchReg: TempReg > inFrame: needsFrame! > > Item was changed: > ----- Method: > StackToRegisterMappingCogit>>genStorePop:MaybeContextReceiverVariable: (in > category 'bytecode generator support') ----- > genStorePop: popBoolean MaybeContextReceiverVariable: slotIndex > <inline: false> > | jmpSingle jmpDone valueReg | > <var: #jmpSingle type: #'AbstractInstruction *'> > <var: #jmpDone type: #'AbstractInstruction *'> > + "The reason we need a frame here is that assigning to an inst var > of a context may > + involve wholesale reorganization of stack pages, and the only way > to preserve the > + execution state of an activation in that case is if it has a > frame." > self assert: needsFrame. > self ssFlushUpThroughReceiverVariable: slotIndex. > "Note that ReceiverResultReg remains live after both > ceStoreContextInstVarTrampoline and ceStoreCheckTrampoline." > self ensureReceiverResultRegContainsSelf. > self ssPop: 1. > self ssAllocateCallReg: ClassReg and: SendNumArgsReg. "for the > ceStoreCheck call in genStoreSourceReg:... below" > self ssPush: 1. > objectRepresentation > genLoadSlot: SenderIndex > sourceReg: ReceiverResultReg > destReg: TempReg. > valueReg := self ssStorePop: popBoolean toPreferredReg: ClassReg. > valueReg ~= ClassReg ifTrue: > [self MoveR: valueReg R: ClassReg]. > jmpSingle := objectRepresentation > genJumpNotSmallIntegerInScratchReg: TempReg. > self MoveCq: slotIndex R: SendNumArgsReg. > self CallRT: ceStoreContextInstVarTrampoline. > jmpDone := self Jump: 0. > jmpSingle jmpTarget: self Label. > traceStores > 0 ifTrue: > [self MoveR: ClassReg R: TempReg. > self CallRT: ceTraceStoreTrampoline]. > objectRepresentation > genStoreSourceReg: ClassReg > slotIndex: slotIndex > destReg: ReceiverResultReg > scratchReg: TempReg > inFrame: true. > jmpDone jmpTarget: self Label. > ^0! > > Item was changed: > ----- Method: StackToRegisterMappingCogit>>genStorePop:RemoteTemp:At: > (in category 'bytecode generator support') ----- > genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex > <inline: false> > | topReg topSpilled tempVectReg | > + "The only reason we assert needsFrame here is that in a frameless > method > + ReceiverResultReg must and does contain only self, but the > ceStoreCheck > + trampoline expects the target of the store to be in > ReceiverResultReg. So > + in a frameless method we would have a conflict between the > receiver and > + the temote temp store, unless we we smart enough to realise that > + ReceiverResultReg was unused after the literal variable store, > unlikely given > + that methods return self by default." > self assert: needsFrame. > optStatus isReceiverResultRegLive: false. > "N.B. No need to check the stack for references because we > generate code for > remote temp loads that stores the result in a register, deferring > only the register push." > "Avoid store check for immediate values" > (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: > [ tempVectReg := self allocateAnyReg. > self MoveMw: (self frameOffsetOfTemporary: > remoteTempIndex) r: FPReg R: tempVectReg. > self ssStorePop: popBoolean toReg: TempReg. > traceStores > 0 ifTrue: > [ tempVectReg = ReceiverResultReg ifFalse: > [ self ssAllocateRequiredReg: > ReceiverResultReg. > optStatus isReceiverResultRegLive: > false. > self MoveR: tempVectReg R: > ReceiverResultReg ]. > self CallRT: ceTraceStoreTrampoline]. > ^objectRepresentation > genStoreImmediateInSourceReg: TempReg > slotIndex: slotIndex > destReg: tempVectReg]. > topReg := self allocateRegForStackTopEntryNotConflictingWith: > (self registerMaskFor: ReceiverResultReg). > self ssPop: 1. > "for the ceStoreCheck call in genStoreSourceReg:... below" > self ssAllocateCallReg: topReg and: ReceiverResultReg. > self ssPush: 1. > topSpilled := self ssTop spilled. > self ssStorePop: (popBoolean or: [topSpilled]) toReg: topReg. > popBoolean ifFalse: > [topSpilled ifFalse: [self ssPop: 1]. > self ssPushRegister: topReg]. > self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: > FPReg R: ReceiverResultReg. > traceStores > 0 ifTrue: > [self MoveR: topReg R: TempReg. > self CallRT: ceTraceStoreTrampoline]. > ^objectRepresentation > genStoreSourceReg: topReg > slotIndex: slotIndex > destReg: ReceiverResultReg > scratchReg: TempReg > inFrame: needsFrame! > >

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VM Maker: VMMaker.oscog-eem.1251.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1251.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1251 Author: eem Time: 23 April 2015, 11:30:49.748 am UUID: e2557ad3-dc51-4f12-98dc-6e9b4477571d Ancestors: VMMaker.oscog-cb.1250 Tiny change. I prefer intention-revealling var names, not type-revealling var names. =============== Diff against VMMaker.oscog-cb.1250 =============== Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable:traceBlock:inFrame: (in category 'bytecode generator support') ----- + genStorePop: popBoolean ReceiverVariable: slotIndex traceBlock: block inFrame: inFrame - genStorePop: popBoolean ReceiverVariable: slotIndex traceBlock: block inFrame: boolean <inline: true> | topReg | self ssFlushUpThroughReceiverVariable: slotIndex. "Avoid store check for immediate values" (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: [self ensureReceiverResultRegContainsSelf. self ssStorePop: popBoolean toReg: TempReg. traceStores > 0 ifTrue: [block value]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: slotIndex destReg: ReceiverResultReg]. topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). self ssStorePop: popBoolean toReg: topReg. "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." self ensureReceiverResultRegContainsSelf. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. block value]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg + inFrame: inFrame! - inFrame: boolean!

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VM Maker: VMMaker.oscog-cb.1250.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1250.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1250 Author: cb Time: 23 April 2015, 8:21:51.274 pm UUID: 7ac1c3b2-fa60-4fa8-85b4-1fd406143de6 Ancestors: VMMaker.oscog-eem.1249 fix frameless inst var store. I made a mistake. Added the flush in SistaCogit for branchIfNotInstanceOf =============== Diff against VMMaker.oscog-eem.1249 =============== Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genExtJumpIfNotInstanceOfBehaviorsOrPopBytecode (in category 'bytecode generators') ----- genExtJumpIfNotInstanceOfBehaviorsOrPopBytecode "SistaV1: * 254 11111110 kkkkkkkk jjjjjjjj branch If Not Instance Of Behavior/Array Of Behavior kkkkkkkk (+ Extend A * 256, where Extend A >= 0) distance jjjjjjjj (+ Extend B * 256, where Extend B >= 0)" | reg literal distance targetFixUp | + "We loose the information of in which register is stack top + when jitting the branch target so we need to flush everything. + We could use a fixed register here...." + self ssFlushTo: simStackPtr. reg := self allocateRegForStackTopEntry. self ssTop popToReg: reg. literal := self getLiteral: (extA * 256 + byte1). extA := 0. distance := extB * 256 + byte2. extB := 0. targetFixUp := (self ensureFixupAt: bytecodePC + 3 + distance - initialPC) asUnsignedInteger. (objectMemory isArrayNonImm: literal) ifTrue: [objectRepresentation branchIf: reg notInstanceOfBehaviors: literal target: targetFixUp] ifFalse: [objectRepresentation branchIf: reg notInstanceOfBehavior: literal target: targetFixUp]. self genPopStackBytecode. ^0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean ReceiverVariable: slotIndex <inline: false> ^ needsFrame ifFalse: [ self genStorePop: popBoolean ReceiverVariable: slotIndex + traceBlock: [ backEnd saveAndRestoreLinkRegAround: [self CallRT: ceTraceStoreTrampoline] ] + inFrame: needsFrame ] - traceBlock: [ backEnd saveAndRestoreLinkRegAround: [self CallRT: ceTraceStoreTrampoline] ] ] ifTrue: [ self genStorePop: popBoolean ReceiverVariable: slotIndex + traceBlock: [ self CallRT: ceTraceStoreTrampoline ] + inFrame: needsFrame ]! - traceBlock: [ self CallRT: ceTraceStoreTrampoline ] ]! Item was removed: - ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable:traceBlock: (in category 'bytecode generator support') ----- - genStorePop: popBoolean ReceiverVariable: slotIndex traceBlock: block - <inline: true> - | topReg | - self ssFlushUpThroughReceiverVariable: slotIndex. - "Avoid store check for immediate values" - (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - [self ensureReceiverResultRegContainsSelf. - self ssStorePop: popBoolean toReg: TempReg. - traceStores > 0 ifTrue: [block value]. - ^objectRepresentation - genStoreImmediateInSourceReg: TempReg - slotIndex: slotIndex - destReg: ReceiverResultReg]. - topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). - self ssStorePop: popBoolean toReg: topReg. - "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." - self ensureReceiverResultRegContainsSelf. - traceStores > 0 ifTrue: - [self MoveR: topReg R: TempReg. - block value]. - ^objectRepresentation - genStoreSourceReg: topReg - slotIndex: slotIndex - destReg: ReceiverResultReg - scratchReg: TempReg - inFrame: true! Item was added: + ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable:traceBlock:inFrame: (in category 'bytecode generator support') ----- + genStorePop: popBoolean ReceiverVariable: slotIndex traceBlock: block inFrame: boolean + <inline: true> + | topReg | + self ssFlushUpThroughReceiverVariable: slotIndex. + "Avoid store check for immediate values" + (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: + [self ensureReceiverResultRegContainsSelf. + self ssStorePop: popBoolean toReg: TempReg. + traceStores > 0 ifTrue: [block value]. + ^objectRepresentation + genStoreImmediateInSourceReg: TempReg + slotIndex: slotIndex + destReg: ReceiverResultReg]. + topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). + self ssStorePop: popBoolean toReg: topReg. + "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." + self ensureReceiverResultRegContainsSelf. + traceStores > 0 ifTrue: + [self MoveR: topReg R: TempReg. + block value]. + ^objectRepresentation + genStoreSourceReg: topReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg + inFrame: boolean!

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VM Maker: VMMaker.oscog-eem.1249.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1249.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1249 Author: eem Time: 23 April 2015, 11:07:28.905 am UUID: 41e8dbc2-ed01-42d2-9155-eaf604510aaa Ancestors: VMMaker.oscog-eem.1248 More commentary. =============== Diff against VMMaker.oscog-eem.1248 =============== Item was changed: ----- Method: SimpleStackBasedCogit>>genStorePop:LiteralVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean LiteralVariable: litVarIndex <inline: false> | association | + "The only reason we assert needsFrame here is that in a frameless method + ReceiverResultReg must and does contain only self, but the ceStoreCheck + trampoline expects the target of the store to be in ReceiverResultReg. So + in a frameless method we would have a conflict between the receiver and + the literal store, unless we we smart enough to realise that ReceiverResultReg + was unused after the literal variable store, unlikely given that methods + return self by default." self assert: needsFrame. association := self getLiteral: litVarIndex. self annotate: (self MoveCw: association R: ReceiverResultReg) objRef: association. objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. popBoolean ifTrue: [self PopR: ClassReg] ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. traceStores > 0 ifTrue: [self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: ClassReg slotIndex: ValueIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was changed: ----- Method: SimpleStackBasedCogit>>genStorePop:MaybeContextReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean MaybeContextReceiverVariable: slotIndex <inline: false> | jmpSingle jmpDone | <var: #jmpSingle type: #'AbstractInstruction *'> <var: #jmpDone type: #'AbstractInstruction *'> + "The reason we need a frame here is that assigning to an inst var of a context may + involve wholesale reorganization of stack pages, and the only way to preserve the + execution state of an activation in that case is if it has a frame." self assert: needsFrame. self MoveMw: FoxMFReceiver r: FPReg R: ReceiverResultReg. objectRepresentation genLoadSlot: SenderIndex sourceReg: ReceiverResultReg destReg: TempReg. self MoveMw: 0 r: SPReg R: ClassReg. jmpSingle := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. self MoveCq: slotIndex R: SendNumArgsReg. self CallRT: ceStoreContextInstVarTrampoline. jmpDone := self Jump: 0. jmpSingle jmpTarget: self Label. traceStores > 0 ifTrue: [self CallRT: ceTraceStoreTrampoline]. objectRepresentation genStoreSourceReg: ClassReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: true. jmpDone jmpTarget: self Label. popBoolean ifTrue: [self AddCq: objectMemory wordSize R: SPReg]. ^0! Item was changed: ----- Method: SimpleStackBasedCogit>>genStorePop:RemoteTemp:At: (in category 'bytecode generator support') ----- genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex <inline: false> + "The only reason we assert needsFrame here is that in a frameless method + ReceiverResultReg must and does contain only self, but the ceStoreCheck + trampoline expects the target of the store to be in ReceiverResultReg. So + in a frameless method we would have a conflict between the receiver and + the temote temp store, unless we we smart enough to realise that + ReceiverResultReg was unused after the literal variable store, unlikely given + that methods return self by default." self assert: needsFrame. popBoolean ifTrue: [self PopR: ClassReg] ifFalse: [self MoveMw: 0 r: SPReg R: ClassReg]. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. traceStores > 0 ifTrue: [self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: ClassReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:MaybeContextReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean MaybeContextReceiverVariable: slotIndex <inline: false> | jmpSingle jmpDone valueReg | <var: #jmpSingle type: #'AbstractInstruction *'> <var: #jmpDone type: #'AbstractInstruction *'> + "The reason we need a frame here is that assigning to an inst var of a context may + involve wholesale reorganization of stack pages, and the only way to preserve the + execution state of an activation in that case is if it has a frame." self assert: needsFrame. self ssFlushUpThroughReceiverVariable: slotIndex. "Note that ReceiverResultReg remains live after both ceStoreContextInstVarTrampoline and ceStoreCheckTrampoline." self ensureReceiverResultRegContainsSelf. self ssPop: 1. self ssAllocateCallReg: ClassReg and: SendNumArgsReg. "for the ceStoreCheck call in genStoreSourceReg:... below" self ssPush: 1. objectRepresentation genLoadSlot: SenderIndex sourceReg: ReceiverResultReg destReg: TempReg. valueReg := self ssStorePop: popBoolean toPreferredReg: ClassReg. valueReg ~= ClassReg ifTrue: [self MoveR: valueReg R: ClassReg]. jmpSingle := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. self MoveCq: slotIndex R: SendNumArgsReg. self CallRT: ceStoreContextInstVarTrampoline. jmpDone := self Jump: 0. jmpSingle jmpTarget: self Label. traceStores > 0 ifTrue: [self MoveR: ClassReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. objectRepresentation genStoreSourceReg: ClassReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: true. jmpDone jmpTarget: self Label. ^0! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:RemoteTemp:At: (in category 'bytecode generator support') ----- genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex <inline: false> | topReg topSpilled tempVectReg | + "The only reason we assert needsFrame here is that in a frameless method + ReceiverResultReg must and does contain only self, but the ceStoreCheck + trampoline expects the target of the store to be in ReceiverResultReg. So + in a frameless method we would have a conflict between the receiver and + the temote temp store, unless we we smart enough to realise that + ReceiverResultReg was unused after the literal variable store, unlikely given + that methods return self by default." self assert: needsFrame. optStatus isReceiverResultRegLive: false. "N.B. No need to check the stack for references because we generate code for remote temp loads that stores the result in a register, deferring only the register push." "Avoid store check for immediate values" (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: [ tempVectReg := self allocateAnyReg. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: tempVectReg. self ssStorePop: popBoolean toReg: TempReg. traceStores > 0 ifTrue: [ tempVectReg = ReceiverResultReg ifFalse: [ self ssAllocateRequiredReg: ReceiverResultReg. optStatus isReceiverResultRegLive: false. self MoveR: tempVectReg R: ReceiverResultReg ]. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: slotIndex destReg: tempVectReg]. topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). self ssPop: 1. "for the ceStoreCheck call in genStoreSourceReg:... below" self ssAllocateCallReg: topReg and: ReceiverResultReg. self ssPush: 1. topSpilled := self ssTop spilled. self ssStorePop: (popBoolean or: [topSpilled]) toReg: topReg. popBoolean ifFalse: [topSpilled ifFalse: [self ssPop: 1]. self ssPushRegister: topReg]. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame!

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VM Maker: VMMaker.oscog-eem.1248.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-eem.1248.mcz ==================== Summary ==================== Name: VMMaker.oscog-eem.1248 Author: eem Time: 23 April 2015, 10:43:29.344 am UUID: ec950a22-b488-4bba-9520-24174b51b5ca Ancestors: VMMaker.oscog-cb.1247 Commentary, and one assert added to Clément's changes. =============== Diff against VMMaker.oscog-cb.1247 =============== Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:LiteralVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean LiteralVariable: litVarIndex <inline: false> | topReg assocReg association | + "The only reason we assert needsFrame here is that in a frameless method + ReceiverResultReg must and does contain only self, but the ceStoreCheck + trampoline expects the target of the store to be in ReceiverResultReg. So + in a frameless method we would have a conflict between the receiver and + the literal store, unless we we smart enough to realise that ReceiverResultReg + was unused after the literal variable store, unlikely given that methods + return self by default." + self assert: needsFrame. "N.B. No need to check the stack for references because we generate code for literal variable loads that stores the result in a register, deferring only the register push." association := self getLiteral: litVarIndex. "Avoid store check for immediate values" (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: [ assocReg := self allocateAnyReg. self genMoveConstant: association R: assocReg. objectRepresentation genEnsureObjInRegNotForwarded: assocReg scratchReg: TempReg. self ssStorePop: popBoolean toReg: TempReg. traceStores > 0 ifTrue: [ assocReg = ReceiverResultReg ifFalse: [ self ssAllocateRequiredReg: ReceiverResultReg. optStatus isReceiverResultRegLive: false. self MoveR: assocReg R: ReceiverResultReg ]. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: ValueIndex destReg: assocReg ] ifFalse: [ self assert: needsFrame. "because ReceiverResult reg is used for storeCheckTrampoline" ]. topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). self ssStorePop: popBoolean toReg: topReg. optStatus isReceiverResultRegLive: false. self ssAllocateCallReg: ReceiverResultReg. "for ceStoreCheck call in genStoreSourceReg: has to be ReceiverResultReg" self genMoveConstant: association R: ReceiverResultReg. objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: ValueIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssAllocateCallReg:and: (in category 'simulation stack') ----- ssAllocateCallReg: requiredReg1 and: requiredReg2 + "Allocate registers needed in a run-time call (i.e. flush uses of the + registers to the real stack). Since the run-time can smash any and + all caller-saved registers also flush all caller-saved registers." self ssAllocateRequiredRegMask: (callerSavedRegMask bitOr: ((self registerMaskFor: requiredReg1) bitOr: (self registerMaskFor: requiredReg2))) upThrough: simStackPtr! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssAllocateCallReg:and:and: (in category 'simulation stack') ----- ssAllocateCallReg: requiredReg1 and: requiredReg2 and: requiredReg3 + "Allocate registers needed in a run-time call (i.e. flush uses of the + registers to the real stack). Since the run-time can smash any and + all caller-saved registers also flush all caller-saved registers." self ssAllocateRequiredRegMask: (callerSavedRegMask bitOr: ((self registerMaskFor: requiredReg1) bitOr: ((self registerMaskFor: requiredReg2) bitOr: (self registerMaskFor: requiredReg3)))) upThrough: simStackPtr! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssAllocateCallReg:and:and:and: (in category 'simulation stack') ----- ssAllocateCallReg: requiredReg1 and: requiredReg2 and: requiredReg3 and: requiredReg4 + "Allocate registers needed in a run-time call (i.e. flush uses of the + registers to the real stack). Since the run-time can smash any and + all caller-saved registers also flush all caller-saved registers." self ssAllocateRequiredRegMask: (callerSavedRegMask bitOr: ((self registerMaskFor: requiredReg1) bitOr: ((self registerMaskFor: requiredReg2) bitOr: ((self registerMaskFor: requiredReg3) bitOr: (self registerMaskFor: requiredReg4))))) upThrough: simStackPtr!

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VM Maker: VMMaker.oscog-cb.1247.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1247.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1247 Author: cb Time: 23 April 2015, 2:54:45.86 pm UUID: e18d9b5d-23e8-4f00-bd6e-76bad1b22dd5 Ancestors: VMMaker.oscog-cb.1246 I think I fixed #== in the SistaCogit, At least the simulator goes further (but it looks like it still does not start... ). =============== Diff against VMMaker.oscog-cb.1246 =============== Item was removed: - ----- Method: SistaStackToRegisterMappingCogit>>genDirectEqualsEqualsArg:rcvr:argReg:rcvrReg: (in category 'bytecode generators') ----- - genDirectEqualsEqualsArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg - <inline: true> - | label jumpEqual jumpNotEqual | - label := self Label. - unforwardArg - ifFalse: [ self CmpCq: self ssTop constant R: rcvrReg ] - ifTrue: [ unforwardRcvr - ifFalse: [ self CmpCq: (self ssValue: 1) constant R: argReg ] - ifTrue: [ self CmpR: argReg R: rcvrReg ] ]. - self ssPop: 2. - jumpEqual := self JumpZero: 0. - unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ]. - unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg jumpBackTo: label ]. - self genMoveFalseR: rcvrReg. - jumpNotEqual := self Jump: 0. - jumpEqual jmpTarget: (self genMoveTrueR: rcvrReg). - jumpNotEqual jmpTarget: self Label. - self ssPushRegister: rcvrReg. - ^0! Item was added: + ----- Method: SistaStackToRegisterMappingCogit>>genDirectEqualsEqualsNoBranchArg:rcvr:argReg:rcvrReg: (in category 'bytecode generators') ----- + genDirectEqualsEqualsNoBranchArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg + <inline: true> + | label jumpEqual jumpNotEqual | + label := self Label. + self genEqualsEqualsComparisonArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg. + self ssPop: 2. + jumpEqual := self JumpZero: 0. + unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ]. + unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg jumpBackTo: label ]. + self genMoveFalseR: rcvrReg. + jumpNotEqual := self Jump: 0. + jumpEqual jmpTarget: (self genMoveTrueR: rcvrReg). + jumpNotEqual jmpTarget: self Label. + self ssPushRegister: rcvrReg. + ^0! Item was added: + ----- Method: SistaStackToRegisterMappingCogit>>genEqualsEqualsComparisonArg:rcvr:argReg:rcvrReg: (in category 'bytecode generators') ----- + genEqualsEqualsComparisonArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg + <inline: true> + unforwardArg + ifFalse: [ self CmpCq: self ssTop constant R: rcvrReg ] + ifTrue: [ unforwardRcvr + ifFalse: [ self CmpCq: (self ssValue: 1) constant R: argReg ] + ifTrue: [ self CmpR: argReg R: rcvrReg ] ]. ! Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorEqualsEqualsWithForwarders (in category 'bytecode generators') ----- genSpecialSelectorEqualsEqualsWithForwarders "Override to count inlined branches if followed by a conditional branch. We borrow the following conditional branch's counter and when about to inline the comparison we decrement the counter (without writing it back) and if it trips simply abort the inlining, falling back to the normal send which will then continue to the conditional branch which will trip and enter the abort." | nextPC postBranchPC targetBytecodePC primDescriptor branchDescriptor nExts label counterReg fixup counterAddress countTripped unforwardArg unforwardRcvr argReg rcvrReg regMask | <var: #fixup type: #'BytecodeFixup *'> <var: #countTripped type: #'AbstractInstruction *'> <var: #primDescriptor type: #'BytecodeDescriptor *'> <var: #branchDescriptor type: #'BytecodeDescriptor *'> ((coInterpreter isOptimizedMethod: methodObj) or: [needsFrame not]) ifTrue: [ ^ super genSpecialSelectorEqualsEquals ]. primDescriptor := self generatorAt: byte0. regMask := 0. nextPC := bytecodePC + primDescriptor numBytes. nExts := 0. [branchDescriptor := self generatorAt: (objectMemory fetchByte: nextPC ofObject: methodObj) + (byte0 bitAnd: 256). branchDescriptor isExtension] whileTrue: [nExts := nExts + 1. nextPC := nextPC + branchDescriptor numBytes]. (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifTrue: [self ssFlushTo: simStackPtr - 2]. unforwardRcvr := (objectRepresentation isUnannotatableConstant: (self ssValue: 1)) not. unforwardArg := (objectRepresentation isUnannotatableConstant: self ssTop) not. "if the rcvr or the arg is an annotable constant, we need to push it to a register else the forwarder check can't jump back to the comparison after unforwarding the constant" unforwardArg ifTrue: [unforwardRcvr ifTrue: [self allocateRegForStackTopTwoEntriesInto: [:rTop :rNext| argReg := rTop. rcvrReg := rNext]. self ssTop popToReg: argReg. (self ssValue:1) popToReg: rcvrReg] ifFalse: [argReg := self allocateRegForStackTopEntry. self ssTop popToReg: argReg]] ifFalse: [self assert: unforwardRcvr. rcvrReg := self allocateRegForStackEntryAt: 1. (self ssValue:1) popToReg: rcvrReg]. + argReg ifNotNil: [ regMask := self registerMaskFor: argReg ]. - argReg ifNotNil: [ regMask := self registerMaskFor: regMask ]. rcvrReg ifNotNil: [ regMask := regMask bitOr: (self registerMaskFor: rcvrReg) ]. - "Here we can use Cq because the constant does not need to be annotated" self assert: (unforwardArg not or: [argReg notNil]). self assert: (unforwardRcvr not or: [rcvrReg notNil]). "Only interested in inlining if followed by a conditional branch." (branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]) ifFalse: + [^ self genDirectEqualsEqualsNoBranchArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg]. - [^ self genDirectEqualsEqualsArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg]. targetBytecodePC := nextPC + branchDescriptor numBytes + (self spanFor: branchDescriptor at: nextPC exts: nExts in: methodObj). postBranchPC := nextPC + branchDescriptor numBytes. - counterReg := self allocateRegNotConflictingWith: regMask. "Use this as the count reg, can't conflict with the registers for the arg and the receiver of #==." counterAddress := counters + ((self sizeof: #sqInt) * counterIndex). self flag: 'will need to use MoveAw32:R: if 64 bits'. self assert: objectMemory wordSize = CounterBytes. self MoveAw: counterAddress R: counterReg. self SubCq: 16r10000 R: counterReg. "Count executed" "If counter trips simply abort the inlined comparison and send continuing to the following branch *without* writing back. A double decrement will not trip the second time." countTripped := self JumpCarry: 0. self MoveR: counterReg Aw: counterAddress. "write back" self assert: (unforwardArg or: [ unforwardRcvr ]). label := self Label. + self genEqualsEqualsComparisonArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg. - unforwardArg - ifFalse: [ self CmpCq: self ssTop constant R: rcvrReg ] - ifTrue: [ unforwardRcvr - ifFalse: [ self CmpCq: (self ssValue: 1) constant R: argReg ] - ifTrue: [ self CmpR: argReg R: rcvrReg ] ]. + self ssPop: 2. "pop by 2 temporarily for the fixups" + branchDescriptor isBranchTrue + ifTrue: + [ fixup := self ensureNonMergeFixupAt: postBranchPC - initialPC. + self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC - initialPC) asUnsignedInteger. ] + ifFalse: + [ fixup := self ensureNonMergeFixupAt: targetBytecodePC - initialPC. + self JumpZero: (self ensureNonMergeFixupAt: postBranchPC - initialPC) asUnsignedInteger. ]. + unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ]. + unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg jumpBackTo: label ]. - self ssPop: 2. - branchDescriptor isBranchTrue ifTrue: - [ fixup := self ensureNonMergeFixupAt: postBranchPC - initialPC. - self JumpZero: (self ensureNonMergeFixupAt: targetBytecodePC - initialPC) asUnsignedInteger. - unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ]. - unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg jumpBackTo: label ] ]. - branchDescriptor isBranchFalse ifTrue: - [ fixup := self ensureNonMergeFixupAt: targetBytecodePC - initialPC. - self JumpZero: (self ensureNonMergeFixupAt: postBranchPC - initialPC) asUnsignedInteger. - unforwardArg ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: argReg scratchReg: TempReg jumpBackTo: label ]. - unforwardRcvr ifTrue: [ objectRepresentation genEnsureOopInRegNotForwarded: rcvrReg scratchReg: TempReg jumpBackTo: label ] ]. self ssPop: -2. "the jump has not been taken and forwarders have been followed." self SubCq: 1 R: counterReg. "Count untaken" self MoveR: counterReg Aw: counterAddress. "write back" + self Jump: fixup. - self Jump: (self ensureNonMergeFixupAt: postBranchPC - initialPC). countTripped jmpTarget: self Label. "inlined version of #== ignoring the branchDescriptor if the counter trips to have normal state for the optimizer" + self genDirectEqualsEqualsNoBranchArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg. + ^ 0! - ^ self genDirectEqualsEqualsArg: unforwardArg rcvr: unforwardRcvr argReg: argReg rcvrReg: rcvrReg!

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VM Maker: VMMaker.oscog-cb.1246.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1246.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1246 Author: cb Time: 23 April 2015, 1:56:41.665 pm UUID: 94149f1f-8fa4-4899-84c6-091fcb539bf7 Ancestors: VMMaker.oscog-cb.1245 Refactored storePop methods to use register allocation. I believe that now #genStorePop: popBoolean LiteralVariable: litVarIndex can be frameless but I am confused on how to handle ReceiverResultReg. I need to discuss with Eliot about it. =============== Diff against VMMaker.oscog-cb.1245 =============== Item was changed: ----- Method: StackToRegisterMappingCogit>>allocateRegForStackTopThreeEntriesInto:thirdIsReceiver: (in category 'simulation stack') ----- allocateRegForStackTopThreeEntriesInto: trinaryBlock thirdIsReceiver: thirdIsReceiver <inline: true> | topRegistersMask rTop rNext rThird | topRegistersMask := 0. (self ssTop type = SSRegister and: [ thirdIsReceiver not or: [ self ssTop register ~= ReceiverResultReg ] ]) ifTrue: [ topRegistersMask := self registerMaskFor: (rTop := self ssTop register)]. ((self ssValue: 1) type = SSRegister and: [ thirdIsReceiver not or: [ (self ssValue: 1) register ~= ReceiverResultReg ] ]) ifTrue: [ topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: (rNext := (self ssValue: 1) register))]. ((self ssValue: 2) type = SSRegister and: [thirdIsReceiver not or: [ (self ssValue: 2) register = ReceiverResultReg ] ]) ifTrue: [ topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: (rThird := (self ssValue: 2) register))]. rThird ifNil: [ thirdIsReceiver ifTrue: [ rThird := ReceiverResultReg. "Free ReceiverResultReg if it was not free" + self ssAllocateRequiredReg: ReceiverResultReg. - (self register: ReceiverResultReg isInMask: self liveRegisters) ifTrue: - [ self ssAllocateRequiredReg: ReceiverResultReg ]. optStatus isReceiverResultRegLive: false ] ifFalse: [ rThird := self allocateRegNotConflictingWith: topRegistersMask ]. topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: rThird) ]. rTop ifNil: [ rTop := self allocateRegNotConflictingWith: topRegistersMask. topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: rTop) ]. rNext ifNil: [ rNext := self allocateRegNotConflictingWith: topRegistersMask ]. ^ trinaryBlock value: rTop value: rNext value: rThird ! Item was changed: ----- Method: StackToRegisterMappingCogit>>freeAnyRegNotConflictingWith: (in category 'simulation stack') ----- freeAnyRegNotConflictingWith: regMask "Spill the closest register on stack not conflicting with regMask. Assertion Failure if regMask has already all the registers" <var: #desc type: #'CogSimStackEntry *'> | reg index | + self assert: needsFrame. index := simSpillBase max: 0. [reg isNil and: [index < simStackPtr] ] whileTrue: [ | desc | desc := self simStackAt: index. desc type = SSRegister ifTrue: [ (regMask anyMask: (self registerMaskFor: desc register)) ifFalse: [ reg := desc register ] ]. index := index + 1]. self assert: reg notNil. self ssAllocateRequiredReg: reg. ^reg! Item was removed: - ----- Method: StackToRegisterMappingCogit>>genFramelessStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- - genFramelessStorePop: popBoolean ReceiverVariable: slotIndex - <inline: false> - | topReg valueReg | - self assert: needsFrame not. - self ssFlushUpThroughReceiverVariable: slotIndex. - "Avoid store check for immediate values" - (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - [self ensureReceiverResultRegContainsSelf. - self ssStorePop: popBoolean toPreferredReg: TempReg. - traceStores > 0 ifTrue: - [backEnd saveAndRestoreLinkRegAround: - [self CallRT: ceTraceStoreTrampoline]]. - ^objectRepresentation - genStoreImmediateInSourceReg: TempReg - slotIndex: slotIndex - destReg: ReceiverResultReg]. - (topReg := self ssTop registerOrNil) isNil ifTrue: - [topReg := ClassReg]. - valueReg := self ssStorePop: popBoolean toPreferredReg: topReg. - "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." - self ensureReceiverResultRegContainsSelf. - traceStores > 0 ifTrue: - [self MoveR: valueReg R: TempReg. - backEnd saveAndRestoreLinkRegAround: - [self CallRT: ceTraceStoreTrampoline]]. - ^objectRepresentation - genStoreSourceReg: valueReg - slotIndex: slotIndex - destReg: ReceiverResultReg - scratchReg: TempReg - inFrame: false! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:LiteralVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean LiteralVariable: litVarIndex <inline: false> | topReg assocReg association | "N.B. No need to check the stack for references because we generate code for literal variable loads that stores the result in a register, deferring only the register push." association := self getLiteral: litVarIndex. "Avoid store check for immediate values" (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: [ assocReg := self allocateAnyReg. self genMoveConstant: association R: assocReg. objectRepresentation genEnsureObjInRegNotForwarded: assocReg scratchReg: TempReg. self ssStorePop: popBoolean toReg: TempReg. traceStores > 0 ifTrue: [ assocReg = ReceiverResultReg ifFalse: [ self ssAllocateRequiredReg: ReceiverResultReg. optStatus isReceiverResultRegLive: false. self MoveR: assocReg R: ReceiverResultReg ]. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: ValueIndex destReg: assocReg ] ifFalse: [ self assert: needsFrame. "because ReceiverResult reg is used for storeCheckTrampoline" ]. topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). - self ssPop: 1. - self ssAllocateCallReg: topReg. "for the ceStoreCheck call in genStoreSourceReg:... below" - self ssPush: 1. self ssStorePop: popBoolean toReg: topReg. optStatus isReceiverResultRegLive: false. self ssAllocateCallReg: ReceiverResultReg. "for ceStoreCheck call in genStoreSourceReg: has to be ReceiverResultReg" self genMoveConstant: association R: ReceiverResultReg. objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: ValueIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean ReceiverVariable: slotIndex <inline: false> + ^ needsFrame + ifFalse: + [ self + genStorePop: popBoolean + ReceiverVariable: slotIndex + traceBlock: [ backEnd saveAndRestoreLinkRegAround: [self CallRT: ceTraceStoreTrampoline] ] ] + ifTrue: + [ self + genStorePop: popBoolean + ReceiverVariable: slotIndex + traceBlock: [ self CallRT: ceTraceStoreTrampoline ] ]! - | topReg valueReg | - needsFrame ifFalse: - [^self genFramelessStorePop: popBoolean ReceiverVariable: slotIndex]. - self ssFlushUpThroughReceiverVariable: slotIndex. - "Avoid store check for immediate values" - (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - [self ensureReceiverResultRegContainsSelf. - self ssStorePop: popBoolean toPreferredReg: TempReg. - traceStores > 0 ifTrue: - [self CallRT: ceTraceStoreTrampoline]. - ^objectRepresentation - genStoreImmediateInSourceReg: TempReg - slotIndex: slotIndex - destReg: ReceiverResultReg]. - ((topReg := self ssTop registerOrNil) isNil - or: [topReg = ReceiverResultReg]) ifTrue: - [topReg := ClassReg]. - self ssPop: 1. - self ssAllocateCallReg: topReg. "for the ceStoreCheck call in genStoreSourceReg:... below" - self ssPush: 1. - valueReg := self ssStorePop: popBoolean toPreferredReg: topReg. - valueReg = ReceiverResultReg ifTrue: - [self MoveR: valueReg R: topReg]. - "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." - self ensureReceiverResultRegContainsSelf. - traceStores > 0 ifTrue: - [self MoveR: topReg R: TempReg. - self CallRT: ceTraceStoreTrampoline]. - ^objectRepresentation - genStoreSourceReg: topReg - slotIndex: slotIndex - destReg: ReceiverResultReg - scratchReg: TempReg - inFrame: true! Item was added: + ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable:traceBlock: (in category 'bytecode generator support') ----- + genStorePop: popBoolean ReceiverVariable: slotIndex traceBlock: block + <inline: true> + | topReg | + self ssFlushUpThroughReceiverVariable: slotIndex. + "Avoid store check for immediate values" + (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: + [self ensureReceiverResultRegContainsSelf. + self ssStorePop: popBoolean toReg: TempReg. + traceStores > 0 ifTrue: [block value]. + ^objectRepresentation + genStoreImmediateInSourceReg: TempReg + slotIndex: slotIndex + destReg: ReceiverResultReg]. + topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). + self ssStorePop: popBoolean toReg: topReg. + "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." + self ensureReceiverResultRegContainsSelf. + traceStores > 0 ifTrue: + [self MoveR: topReg R: TempReg. + block value]. + ^objectRepresentation + genStoreSourceReg: topReg + slotIndex: slotIndex + destReg: ReceiverResultReg + scratchReg: TempReg + inFrame: true! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:RemoteTemp:At: (in category 'bytecode generator support') ----- genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex <inline: false> + | topReg topSpilled tempVectReg | - | topReg valueReg topSpilled | self assert: needsFrame. optStatus isReceiverResultRegLive: false. "N.B. No need to check the stack for references because we generate code for remote temp loads that stores the result in a register, deferring only the register push." "Avoid store check for immediate values" (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: + [ tempVectReg := self allocateAnyReg. + self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: tempVectReg. + self ssStorePop: popBoolean toReg: TempReg. - [self ssAllocateRequiredReg: ReceiverResultReg. - self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. - self ssStorePop: popBoolean toPreferredReg: TempReg. traceStores > 0 ifTrue: + [ tempVectReg = ReceiverResultReg ifFalse: + [ self ssAllocateRequiredReg: ReceiverResultReg. + optStatus isReceiverResultRegLive: false. + self MoveR: tempVectReg R: ReceiverResultReg ]. + self CallRT: ceTraceStoreTrampoline]. - [self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: slotIndex + destReg: tempVectReg]. + topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). - destReg: ReceiverResultReg]. - ((topReg := self ssTop registerOrNil) isNil - or: [topReg = ReceiverResultReg]) ifTrue: - [topReg := ClassReg]. self ssPop: 1. "for the ceStoreCheck call in genStoreSourceReg:... below" self ssAllocateCallReg: topReg and: ReceiverResultReg. self ssPush: 1. topSpilled := self ssTop spilled. + self ssStorePop: (popBoolean or: [topSpilled]) toReg: topReg. - valueReg := self ssStorePop: (popBoolean or: [topSpilled]) toPreferredReg: topReg. - valueReg = ReceiverResultReg ifTrue: - [self MoveR: valueReg R: topReg]. popBoolean ifFalse: [topSpilled ifFalse: [self ssPop: 1]. self ssPushRegister: topReg]. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame!

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VM Maker: VMMaker.oscog-cb.1245.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1245.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1245 Author: cb Time: 23 April 2015, 12:58:24.961 pm UUID: 45d37997-2805-4e01-8abf-0edd7e1f6b76 Ancestors: VMMaker.oscog-cb.1244 Simple refactoring for booleans moved to registers. =============== Diff against VMMaker.oscog-cb.1244 =============== Item was changed: ----- Method: StackToRegisterMappingCogit>>genSmallIntegerComparison:orDoubleComparison: (in category 'primitive generators') ----- genSmallIntegerComparison: jumpOpcode orDoubleComparison: jumpFPOpcodeGenerator "Stack looks like return address" | jumpDouble jumpNonInt jumpFail jumpTrue jumpCond | <var: #jumpFPOpcodeGenerator declareC: 'AbstractInstruction *(*jumpFPOpcodeGenerator)(void *)'> <var: #jumpDouble type: #'AbstractInstruction *'> <var: #jumpNonInt type: #'AbstractInstruction *'> <var: #jumpCond type: #'AbstractInstruction *'> <var: #jumpTrue type: #'AbstractInstruction *'> <var: #jumpFail type: #'AbstractInstruction *'> backEnd hasDoublePrecisionFloatingPointSupport ifFalse: [^self genSmallIntegerComparison: jumpOpcode]. self MoveR: Arg0Reg R: TempReg. jumpDouble := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. self CmpR: Arg0Reg R: ReceiverResultReg. "N.B. FLAGS := RRReg - Arg0Reg" jumpTrue := self gen: jumpOpcode. self genMoveFalseR: ReceiverResultReg. self RetN: 0. jumpTrue jmpTarget: (self genMoveTrueR: ReceiverResultReg). self RetN: 0. "Argument may be a Float : let us check or fail" jumpDouble jmpTarget: self Label. objectRepresentation smallIntegerIsOnlyImmediateType ifFalse: [self MoveR: ClassReg R: TempReg. jumpNonInt := objectRepresentation genJumpImmediateInScratchReg: TempReg]. objectRepresentation genGetCompactClassIndexNonImmOf: Arg0Reg into: SendNumArgsReg. objectRepresentation genCmpClassFloatCompactIndexR: SendNumArgsReg. jumpFail := self JumpNonZero: 0. "It was a Float, so convert the receiver to double and perform the operation" objectRepresentation genConvertSmallIntegerToIntegerInReg: ReceiverResultReg. self ConvertR: ReceiverResultReg Rd: DPFPReg0. objectRepresentation genGetDoubleValueOf: Arg0Reg into: DPFPReg1. self CmpRd: DPFPReg1 Rd: DPFPReg0. jumpCond := self perform: jumpFPOpcodeGenerator with: 0. "FP jumps are a little weird" + self genMoveFalseR: ReceiverResultReg. - self annotate: (self MoveCw: objectMemory falseObject R: ReceiverResultReg) - objRef: objectMemory falseObject. self RetN: 0. + jumpCond jmpTarget: (self genMoveTrueR: ReceiverResultReg). - jumpCond jmpTarget: (self annotate: (self MoveCw: objectMemory trueObject R: ReceiverResultReg) - objRef: objectMemory trueObject). self RetN: 0. objectRepresentation smallIntegerIsOnlyImmediateType ifTrue: [jumpFail jmpTarget: self Label] ifFalse: [jumpNonInt jmpTarget: (jumpFail jmpTarget: self Label)]. ^0!

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VM Maker: VMMaker.oscog-cb.1244.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1244.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1244 Author: cb Time: 23 April 2015, 11:36:22.065 am UUID: f9bea40c-9a55-4113-8b12-49e6d23056e2 Ancestors: VMMaker.oscog-cb.1243 Changed #genStorePop: popBoolean LiteralVariable: litVarIndex so it uses register allocation instead of ReceiverResultReg and ClassReg. This method now does not require a frame if the assigned value is an unannotatableConstant. However, it still needs a frame in the other case due to the ceStoreCheck. =============== Diff against VMMaker.oscog-cb.1243 =============== Item was changed: ----- Method: StackToRegisterMappingCogit>>allocateRegForStackEntryAt: (in category 'simulation stack') ----- allocateRegForStackEntryAt: index <inline: true> + ^ self allocateRegForStackEntryAt: index notConflictingWith: 0 - <var: #stackEntry type: #'CogSimStackEntry *'> - | stackEntry | - stackEntry := self ssValue: index. - stackEntry type = SSRegister ifTrue: [ ^ stackEntry register]. - ^ self allocateAnyReg ! Item was added: + ----- Method: StackToRegisterMappingCogit>>allocateRegForStackEntryAt:notConflictingWith: (in category 'simulation stack') ----- + allocateRegForStackEntryAt: index notConflictingWith: regMask + <var: #stackEntry type: #'CogSimStackEntry *'> + | stackEntry | + stackEntry := self ssValue: index. + (stackEntry type = SSRegister and: [ (self register: stackEntry register isInMask: regMask) not ]) ifTrue: + [ ^ stackEntry register]. + ^ self allocateRegNotConflictingWith: regMask + ! Item was changed: ----- Method: StackToRegisterMappingCogit>>allocateRegForStackTopEntry (in category 'simulation stack') ----- allocateRegForStackTopEntry + <inline: true> ^ self allocateRegForStackEntryAt: 0 ! Item was added: + ----- Method: StackToRegisterMappingCogit>>allocateRegForStackTopEntryNotConflictingWith: (in category 'simulation stack') ----- + allocateRegForStackTopEntryNotConflictingWith: regMask + <inline: true> + ^ self allocateRegForStackEntryAt: 0 notConflictingWith: regMask + ! Item was changed: ----- Method: StackToRegisterMappingCogit>>allocateRegForStackTopTwoEntriesInto: (in category 'simulation stack') ----- allocateRegForStackTopTwoEntriesInto: binaryBlock <inline: true> | topRegistersMask rTop rNext | topRegistersMask := 0. self ssTop type = SSRegister ifTrue: + [ rTop := self ssTop register]. - [ topRegistersMask := self registerMaskFor: (rTop := self ssTop register)]. (self ssValue: 1) type = SSRegister ifTrue: + [ topRegistersMask := self registerMaskFor: (rNext := (self ssValue: 1) register)]. - [ topRegistersMask := topRegistersMask bitOr: (self registerMaskFor: (rNext := (self ssValue: 1) register))]. rTop ifNil: [ rTop := self allocateRegNotConflictingWith: topRegistersMask ]. rNext ifNil: [ rNext := self allocateRegNotConflictingWith: (self registerMaskFor: rTop) ]. ^ binaryBlock value: rTop value: rNext ! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:LiteralVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean LiteralVariable: litVarIndex <inline: false> + | topReg assocReg association | - | topReg valueReg association | - self flag: 'with better register allocation this wouldn''t need a frame. e.g. use SendNumArgs instead of ReceiverResultReg'. - self assert: needsFrame. - optStatus isReceiverResultRegLive: false. "N.B. No need to check the stack for references because we generate code for literal variable loads that stores the result in a register, deferring only the register push." association := self getLiteral: litVarIndex. + "Avoid store check for immediate values" + (objectRepresentation isUnannotatableConstant: self ssTop) + ifTrue: + [ assocReg := self allocateAnyReg. + self genMoveConstant: association R: assocReg. + objectRepresentation + genEnsureObjInRegNotForwarded: assocReg + scratchReg: TempReg. + self ssStorePop: popBoolean toReg: TempReg. + traceStores > 0 ifTrue: + [ assocReg = ReceiverResultReg ifFalse: + [ self ssAllocateRequiredReg: ReceiverResultReg. + optStatus isReceiverResultRegLive: false. + self MoveR: assocReg R: ReceiverResultReg ]. + self CallRT: ceTraceStoreTrampoline]. + ^objectRepresentation + genStoreImmediateInSourceReg: TempReg + slotIndex: ValueIndex + destReg: assocReg ] + ifFalse: [ self assert: needsFrame. "because ReceiverResult reg is used for storeCheckTrampoline" ]. + + + topReg := self allocateRegForStackTopEntryNotConflictingWith: (self registerMaskFor: ReceiverResultReg). - (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - [self ssAllocateRequiredReg: ReceiverResultReg. - self genMoveConstant: association R: ReceiverResultReg. - objectRepresentation - genEnsureObjInRegNotForwarded: ReceiverResultReg - scratchReg: TempReg. - self ssStorePop: popBoolean toPreferredReg: TempReg. - traceStores > 0 ifTrue: - [self CallRT: ceTraceStoreTrampoline]. - ^objectRepresentation - genStoreImmediateInSourceReg: TempReg - slotIndex: ValueIndex - destReg: ReceiverResultReg]. - ((topReg := self ssTop registerOrNil) isNil - or: [topReg = ReceiverResultReg]) ifTrue: - [topReg := ClassReg]. self ssPop: 1. self ssAllocateCallReg: topReg. "for the ceStoreCheck call in genStoreSourceReg:... below" self ssPush: 1. + self ssStorePop: popBoolean toReg: topReg. + optStatus isReceiverResultRegLive: false. + self ssAllocateCallReg: ReceiverResultReg. "for ceStoreCheck call in genStoreSourceReg: has to be ReceiverResultReg" + self genMoveConstant: association R: ReceiverResultReg. - valueReg := self ssStorePop: popBoolean toPreferredReg: topReg. - valueReg = ReceiverResultReg ifTrue: - [self MoveR: valueReg R: topReg]. - self ssAllocateCallReg: ReceiverResultReg. - self annotate: (self MoveCw: association R: ReceiverResultReg) objRef: association. objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: ValueIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssStorePop:toPreferredReg: (in category 'simulation stack') ----- ssStorePop: popBoolean toPreferredReg: preferredReg "Store or pop the top simulated stack entry to a register. + Use preferredReg if the entry is not itself a register. - Pop to preferredReg if the entry is not itself a register. Answer the actual register the result ends up in." | actualReg | actualReg := preferredReg. + self ssTop type = SSRegister ifTrue: + [ self assert: self ssTop annotateUse not. + self assert: self ssTop spilled not. + actualReg := self ssTop register]. + self ssStorePop: popBoolean toReg: actualReg. "generates nothing if ssTop is already in actualReg" + ^ actualReg! - popBoolean - ifTrue: [(self ssTop type = SSRegister "and: [self ssTop spilled not]") - ifTrue: [self assert: self ssTop spilled not. - self assert: self ssTop annotateUse not. - actualReg := self ssTop register] - ifFalse: [self ssTop popToReg: preferredReg]. - self ssPop: 1] - ifFalse: [self ssTop type = SSRegister - ifTrue: [self assert: self ssTop annotateUse not. - actualReg := self ssTop register] - ifFalse: [self ssTop storeToReg: preferredReg]]. - ^actualReg! Item was added: + ----- Method: StackToRegisterMappingCogit>>ssStorePop:toReg: (in category 'simulation stack') ----- + ssStorePop: popBoolean toReg: reg + "Store or pop the top simulated stack entry to a register. + N.B.: popToReg: and storeToReg: does not generate anything if + it moves a register to the same register." + popBoolean + ifTrue: [self ssTop popToReg: reg. + self ssPop: 1] + ifFalse: [self ssTop storeToReg: reg].!

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VM Maker: VMMaker.oscog-cb.1243.mcz
by commits＠source.squeak.org 23 Apr '15

23 Apr '15

Eliot Miranda uploaded a new version of VMMaker to project VM Maker: http://source.squeak.org/VMMaker/VMMaker.oscog-cb.1243.mcz ==================== Summary ==================== Name: VMMaker.oscog-cb.1243 Author: cb Time: 23 April 2015, 10:22:23.414 am UUID: 783d50c8-1cf1-4b51-acf9-98aab1d6e486 Ancestors: VMMaker.oscog-eem.1242 Removed a ssAllocateRequiredReg which was not needed. Basically refactored: | constVal | constVal := self ssTop maybeConstant. (self ssTop type = SSConstant and: [(objectRepresentation shouldAnnotateObjectReference: constVal) not]) to: (objectRepresentation isUnannotatableConstant: self ssTop) so I can understand the methods and see if I can change them with better register allocation. I am interested especially in genStorePop: popBoolean LiteralVariable: litVarIndex which has the flag: self flag: 'with better register allocation this wouldn''t need a frame. e.g. use SendNumArgs instead of ReceiverResultReg'. =============== Diff against VMMaker.oscog-eem.1242 =============== Item was changed: ----- Method: SistaStackToRegisterMappingCogit>>genSpecialSelectorComparison (in category 'bytecode generators') ----- genSpecialSelectorComparison "Override to count inlined branches if followed by a conditional branch. We borrow the following conditional branch's counter and when about to inline the comparison we decrement the counter (without writing it back) and if it trips simply abort the inlining, falling back to the normal send which will then continue to the conditional branch which will trip and enter the abort." | nextPC postBranchPC targetBytecodePC primDescriptor branchDescriptor nExts rcvrIsInt argIsInt rcvrInt argInt result jumpNotSmallInts inlineCAB annotateInst counterAddress countTripped counterReg | <var: #countTripped type: #'AbstractInstruction *'> <var: #primDescriptor type: #'BytecodeDescriptor *'> <var: #jumpNotSmallInts type: #'AbstractInstruction *'> <var: #branchDescriptor type: #'BytecodeDescriptor *'> (coInterpreter isOptimizedMethod: methodObj) ifTrue: [ ^ super genSpecialSelectorComparison ]. self ssFlushTo: simStackPtr - 2. primDescriptor := self generatorAt: byte0. argIsInt := self ssTop type = SSConstant and: [objectMemory isIntegerObject: (argInt := self ssTop constant)]. rcvrIsInt := (self ssValue: 1) type = SSConstant and: [objectMemory isIntegerObject: (rcvrInt := (self ssValue: 1) constant)]. "short-cut the jump if operands are SmallInteger constants." (argIsInt and: [rcvrIsInt]) ifTrue: [self cCode: '' inSmalltalk: "In Simulator ints are unsigned..." [rcvrInt := objectMemory integerValueOf: rcvrInt. argInt := objectMemory integerValueOf: argInt]. primDescriptor opcode caseOf: { [JumpLess] -> [result := rcvrInt < argInt]. [JumpLessOrEqual] -> [result := rcvrInt <= argInt]. [JumpGreater] -> [result := rcvrInt > argInt]. [JumpGreaterOrEqual] -> [result := rcvrInt >= argInt]. [JumpZero] -> [result := rcvrInt = argInt]. [JumpNonZero] -> [result := rcvrInt ~= argInt] }. "Must enter any annotatedConstants into the map" self annotateBytecodeIfAnnotated: (self ssValue: 1). self annotateBytecodeIfAnnotated: self ssTop. "Must annotate the bytecode for correct pc mapping." self ssPop: 2. ^self ssPushAnnotatedConstant: (result ifTrue: [objectMemory trueObject] ifFalse: [objectMemory falseObject])]. nextPC := bytecodePC + primDescriptor numBytes. nExts := 0. [branchDescriptor := self generatorAt: (objectMemory fetchByte: nextPC ofObject: methodObj) + (byte0 bitAnd: 256). branchDescriptor isExtension] whileTrue: [nExts := nExts + 1. nextPC := nextPC + branchDescriptor numBytes]. "Only interested in inlining if followed by a conditional branch." inlineCAB := branchDescriptor isBranchTrue or: [branchDescriptor isBranchFalse]. "Further, only interested in inlining = and ~= if there's a SmallInteger constant involved. The relational operators successfully statically predict SmallIntegers; the equality operators do not." (inlineCAB and: [primDescriptor opcode = JumpZero or: [primDescriptor opcode = JumpNonZero]]) ifTrue: [inlineCAB := argIsInt or: [rcvrIsInt]]. inlineCAB ifFalse: [^self genSpecialSelectorSend]. targetBytecodePC := nextPC + branchDescriptor numBytes + (self spanFor: branchDescriptor at: nextPC exts: nExts in: methodObj). postBranchPC := nextPC + branchDescriptor numBytes. argIsInt ifTrue: [(self ssValue: 1) popToReg: ReceiverResultReg. annotateInst := self ssTop annotateUse. self ssPop: 2. self MoveR: ReceiverResultReg R: TempReg] ifFalse: [self marshallSendArguments: 1. self MoveR: Arg0Reg R: TempReg. rcvrIsInt ifFalse: [objectRepresentation isSmallIntegerTagNonZero ifTrue: [self AndR: ReceiverResultReg R: TempReg] ifFalse: [self OrR: ReceiverResultReg R: TempReg]]]. jumpNotSmallInts := objectRepresentation genJumpNotSmallIntegerInScratchReg: TempReg. counterReg := self allocateRegNotConflictingWith: (self registerMaskFor: ReceiverResultReg and: Arg0Reg). "Use this as the count reg, can't conflict with the registers for the arg and the receiver" - self ssAllocateRequiredReg: counterReg. "Use this as the count reg." counterAddress := counters + ((self sizeof: #sqInt) * counterIndex). self flag: 'will need to use MoveAw32:R: if 64 bits'. self assert: objectMemory wordSize = CounterBytes. self MoveAw: counterAddress R: counterReg. self SubCq: 16r10000 R: counterReg. "Count executed" "If counter trips simply abort the inlined comparison and send continuing to the following branch *without* writing back. A double decrement will not trip the second time." countTripped := self JumpCarry: 0. self MoveR: counterReg Aw: counterAddress. "write back" argIsInt ifTrue: [annotateInst ifTrue: [self annotateBytecode: (self CmpCq: argInt R: ReceiverResultReg)] ifFalse: [self CmpCq: argInt R: ReceiverResultReg]] ifFalse: [self CmpR: Arg0Reg R: ReceiverResultReg]. "Cmp is weird/backwards so invert the comparison. Further since there is a following conditional jump bytecode define non-merge fixups and leave the cond bytecode to set the mergeness." self gen: (branchDescriptor isBranchTrue ifTrue: [primDescriptor opcode] ifFalse: [self inverseBranchFor: primDescriptor opcode]) operand: (self ensureNonMergeFixupAt: targetBytecodePC - initialPC) asUnsignedInteger. self SubCq: 1 R: counterReg. "Count untaken" self MoveR: counterReg Aw: counterAddress. "write back" self Jump: (self ensureNonMergeFixupAt: postBranchPC - initialPC). countTripped jmpTarget: (jumpNotSmallInts jmpTarget: self Label). argIsInt ifTrue: [self MoveCq: argInt R: Arg0Reg]. ^self genMarshalledSend: (coInterpreter specialSelector: byte0 - self firstSpecialSelectorBytecodeOffset) numArgs: 1 sendTable: ordinarySendTrampolines! Item was changed: ----- Method: StackToRegisterMappingCogit>>genFramelessStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- genFramelessStorePop: popBoolean ReceiverVariable: slotIndex <inline: false> + | topReg valueReg | - | topReg valueReg constVal | self assert: needsFrame not. self ssFlushUpThroughReceiverVariable: slotIndex. "Avoid store check for immediate values" + (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - constVal := self ssTop maybeConstant. - (self ssTop type = SSConstant - and: [(objectRepresentation shouldAnnotateObjectReference: constVal) not]) ifTrue: [self ensureReceiverResultRegContainsSelf. self ssStorePop: popBoolean toPreferredReg: TempReg. traceStores > 0 ifTrue: [backEnd saveAndRestoreLinkRegAround: [self CallRT: ceTraceStoreTrampoline]]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: slotIndex destReg: ReceiverResultReg]. (topReg := self ssTop registerOrNil) isNil ifTrue: [topReg := ClassReg]. valueReg := self ssStorePop: popBoolean toPreferredReg: topReg. "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." self ensureReceiverResultRegContainsSelf. traceStores > 0 ifTrue: [self MoveR: valueReg R: TempReg. backEnd saveAndRestoreLinkRegAround: [self CallRT: ceTraceStoreTrampoline]]. ^objectRepresentation genStoreSourceReg: valueReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: false! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:LiteralVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean LiteralVariable: litVarIndex <inline: false> + | topReg valueReg association | - | topReg valueReg association constVal | self flag: 'with better register allocation this wouldn''t need a frame. e.g. use SendNumArgs instead of ReceiverResultReg'. self assert: needsFrame. optStatus isReceiverResultRegLive: false. "N.B. No need to check the stack for references because we generate code for literal variable loads that stores the result in a register, deferring only the register push." association := self getLiteral: litVarIndex. - constVal := self ssTop maybeConstant. "Avoid store check for immediate values" + (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - (self ssTop type = SSConstant - and: [(objectRepresentation shouldAnnotateObjectReference: constVal) not]) ifTrue: [self ssAllocateRequiredReg: ReceiverResultReg. self genMoveConstant: association R: ReceiverResultReg. objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. self ssStorePop: popBoolean toPreferredReg: TempReg. traceStores > 0 ifTrue: [self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: ValueIndex destReg: ReceiverResultReg]. ((topReg := self ssTop registerOrNil) isNil or: [topReg = ReceiverResultReg]) ifTrue: [topReg := ClassReg]. self ssPop: 1. self ssAllocateCallReg: topReg. "for the ceStoreCheck call in genStoreSourceReg:... below" self ssPush: 1. valueReg := self ssStorePop: popBoolean toPreferredReg: topReg. valueReg = ReceiverResultReg ifTrue: [self MoveR: valueReg R: topReg]. self ssAllocateCallReg: ReceiverResultReg. self annotate: (self MoveCw: association R: ReceiverResultReg) objRef: association. objectRepresentation genEnsureObjInRegNotForwarded: ReceiverResultReg scratchReg: TempReg. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: ValueIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:ReceiverVariable: (in category 'bytecode generator support') ----- genStorePop: popBoolean ReceiverVariable: slotIndex <inline: false> + | topReg valueReg | - | topReg valueReg constVal | needsFrame ifFalse: [^self genFramelessStorePop: popBoolean ReceiverVariable: slotIndex]. self ssFlushUpThroughReceiverVariable: slotIndex. "Avoid store check for immediate values" + (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - constVal := self ssTop maybeConstant. - (self ssTop type = SSConstant - and: [(objectRepresentation shouldAnnotateObjectReference: constVal) not]) ifTrue: [self ensureReceiverResultRegContainsSelf. self ssStorePop: popBoolean toPreferredReg: TempReg. traceStores > 0 ifTrue: [self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: slotIndex destReg: ReceiverResultReg]. ((topReg := self ssTop registerOrNil) isNil or: [topReg = ReceiverResultReg]) ifTrue: [topReg := ClassReg]. self ssPop: 1. self ssAllocateCallReg: topReg. "for the ceStoreCheck call in genStoreSourceReg:... below" self ssPush: 1. valueReg := self ssStorePop: popBoolean toPreferredReg: topReg. valueReg = ReceiverResultReg ifTrue: [self MoveR: valueReg R: topReg]. "Note that ReceiverResultReg remains live after ceStoreCheckTrampoline." self ensureReceiverResultRegContainsSelf. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: true! Item was changed: ----- Method: StackToRegisterMappingCogit>>genStorePop:RemoteTemp:At: (in category 'bytecode generator support') ----- genStorePop: popBoolean RemoteTemp: slotIndex At: remoteTempIndex <inline: false> + | topReg valueReg topSpilled | - | topReg valueReg constVal topSpilled | self assert: needsFrame. optStatus isReceiverResultRegLive: false. "N.B. No need to check the stack for references because we generate code for remote temp loads that stores the result in a register, deferring only the register push." "Avoid store check for immediate values" + (objectRepresentation isUnannotatableConstant: self ssTop) ifTrue: - constVal := self ssTop maybeConstant. - (self ssTop type = SSConstant - and: [(objectRepresentation shouldAnnotateObjectReference: constVal) not]) ifTrue: [self ssAllocateRequiredReg: ReceiverResultReg. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. self ssStorePop: popBoolean toPreferredReg: TempReg. traceStores > 0 ifTrue: [self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreImmediateInSourceReg: TempReg slotIndex: slotIndex destReg: ReceiverResultReg]. ((topReg := self ssTop registerOrNil) isNil or: [topReg = ReceiverResultReg]) ifTrue: [topReg := ClassReg]. self ssPop: 1. "for the ceStoreCheck call in genStoreSourceReg:... below" self ssAllocateCallReg: topReg and: ReceiverResultReg. self ssPush: 1. topSpilled := self ssTop spilled. valueReg := self ssStorePop: (popBoolean or: [topSpilled]) toPreferredReg: topReg. valueReg = ReceiverResultReg ifTrue: [self MoveR: valueReg R: topReg]. popBoolean ifFalse: [topSpilled ifFalse: [self ssPop: 1]. self ssPushRegister: topReg]. self MoveMw: (self frameOffsetOfTemporary: remoteTempIndex) r: FPReg R: ReceiverResultReg. traceStores > 0 ifTrue: [self MoveR: topReg R: TempReg. self CallRT: ceTraceStoreTrampoline]. ^objectRepresentation genStoreSourceReg: topReg slotIndex: slotIndex destReg: ReceiverResultReg scratchReg: TempReg inFrame: needsFrame! Item was changed: ----- Method: StackToRegisterMappingCogit>>ssStorePop:toPreferredReg: (in category 'simulation stack') ----- ssStorePop: popBoolean toPreferredReg: preferredReg "Store or pop the top simulated stack entry to a register. Pop to preferredReg if the entry is not itself a register. Answer the actual register the result ends up in." | actualReg | actualReg := preferredReg. popBoolean + ifTrue: [(self ssTop type = SSRegister "and: [self ssTop spilled not]") + ifTrue: [self assert: self ssTop spilled not. + self assert: self ssTop annotateUse not. - ifTrue: [(self ssTop type = SSRegister and: [self ssTop spilled not]) - ifTrue: [self assert: self ssTop annotateUse not. actualReg := self ssTop register] ifFalse: [self ssTop popToReg: preferredReg]. self ssPop: 1] ifFalse: [self ssTop type = SSRegister ifTrue: [self assert: self ssTop annotateUse not. actualReg := self ssTop register] ifFalse: [self ssTop storeToReg: preferredReg]]. ^actualReg!

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Vm-dev April 2015